Scribd
Upload
2 views

Module_3_Lecture_5 (1)

The document outlines the BiCMOS fabrication process for integrated circuits, detailing the steps involved in creating NMOS, PMOS, and NPN-BJT devices. It describes the layering and doping processes required to form the necessary components on a P-type substrate. The final stages include the formation of metal contacts for the devices.

Uploaded by

Mohammad Sania 22221882101
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
2 views

Module_3_Lecture_5 (1)

The document outlines the BiCMOS fabrication process for integrated circuits, detailing the steps involved in creating NMOS, PMOS, and NPN-BJT devices. It describes the layering and doping processes required to form the necessary components on a P-type substrate. The final stages include the formation of metal contacts for the devices.

Uploaded by

Mohammad Sania 22221882101
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 17

Course: Introduction to VLSI design (19EEC334)

Unit-III: BiCMOS Fabrication process

Y.V.Appa Rao
Assistant Professor
Department of EECE.
GITAM Institute of Technology (GIT)
Visakhapatnam – 530045
Email: [email protected]
NPN-BJT

C B E

N-Plus
Emitter
P+ p+
P-Base

N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
BICMOS STRUCTURE

NMOS PMOS NPN-BJT

S G D S G D C B E

N-Diff N-Diff P-Diff P-Diff N-Plus


Emitter

N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
P-SUBSTRATE IS TAKEN

P-SUBSTRATE

P-TYPE SUBSTRATE IS COVERED WITH OXIDE LAYER

P-SUBSTRATE
A WINDOW IS OPENED THROUGH OXIDE LAYER

P-SUBSTRATE

THROUGH THE WINDOW N TYPE IMPURITIES IS HEAVILY DOPED

N Plus Buried Layer

P-SUBSTRATE
P-EPITAXY LAYER IS GROWN ON THE ENTIRE SURFACE

P-EPITAXY

N Plus Buried Layer


P-SUBSTRATE
THE ENTIRE SURFACE IS COVERED WITH OXIDE LAYER AND TWO WINDOWS
ARE OPENED THROUGH THE OXIDE LAYER

P-EPITAXY

N Plus Buried Layer


P-SUBSTRATE
THROUGH THE TWO WINDOWS N-TYPE IMPURITIES ARE DIFFUSED TO
FORM N-WELLS

N-Well
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THREE WINDOWS ARE OPENED THROUGH THE OXIDE LAYER , IN THESE
THREE WINDOWS THREE ACTIVE DEVICES NMOS,PMOS AND NPN BJT
ARE FORMED

N-Well
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THE ENTIRE SURFACE IS COVERED WITH THINOX AND POLYSILICON
AND ARE PATTERNED TO FORM THE GATE TERMINALS OF THE NMOS
AND PMOS

N-Well
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THROUGH THE 3RD WINDOW THE P-IMPURITIES ARE MODERATELY
DOPED TO FORM THE BASE TERMINAL OF BJT
N-WELL ACTS LIKE THE COLLECTOR TERMINAL

N-Well P-Base
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THE N-TYPE IMPURITES ARE HEAVILY DOPED TO FORM

1.SOURCE AND DRAIN REGION OF NMOS


2.EMITTER TERMINAL OF BJT
3.AND INTO NWELL COLLECTOR REGION FOR CONTACT PURPOSE

N-Diff N-Diff N-Plus


Emitter

N-Well P-Base
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THE P-TYPE IMPURITES ARE HEAVILY DOPED TO FORM

1.SOURCE AND DRAIN REGION OF PMOS


2.AND INTO P-BASE REGION FOR CONTACT PURPOSE

N-Diff N-Diff P-Diff P-Diff N-Plus


Emitter

N-Well P-Base
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THE ENTIRE SURFACE IS COVERED WITH THICK OXIDE LAYER

N-Diff N-Diff P-Diff P-Diff N-Plus


Emitter

N-Well P-Base
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
THE ENTIRE SURFACE IS COVERED WITH THICK OXIDE LAYER AND IS
PATTERNED FOR CONTACT CUTS

N-Diff N-Diff P-Diff P-Diff N-Plus


Emitter

N-Well P-Base
N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE
METAL CONTACTS ARE FORMED

NMOS PMOS NPN-BJT

S G D S G D C B E

N-Diff N-Diff P-Diff P-Diff N-Plus


Emitter

N-Well (Collector)
P-EPITAXY
N Plus Buried Layer
P-SUBSTRATE

You might also like