Toroidal Power Unit (TPU)

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Steven Marks

Toroidal Power Unit (TPU)


TP600 - TPU PULSER
-

A useful tool for TPU and other research

Prepared by: Document Date: Revision:

Darren Kozey (z_p_e) 2007/JUL/23 TP600.1

THE P600 TPU PULSER

PREFACE After folks have read through the SM material and feel they are ready to begin experimenting with ideas, one must have tool they need is a unit that can be used to pulse their coils. It is the aim of this document to provide the design for such a tool. Keep in mind that the TP600 is for pulsing 3 coils only. It was not intended to pulse multiple coils in a sequence fashion.that would be another design project. For now though, the TP600 provides for 3 separate and independently controlled square wave generators, capable of frequencies from 0.4 Hz up to about 13 MHz. In addition, by changing the mode switch over to SYNCHRONIZED, the 3 outputs are harmonically related, and synchronized in time. The design is by no means perfect or without the possibility of improvement, but as shown, should provide for a useful tool in many areas of research involving pulsed coils. Good luck and enjoy, Sincerely, Darren (z_p_e)

TP600 - TPU PULSER Revised: Monday, July 23, 2007 TP600.1 Revision: zeropoint electronics

Bill Of Materials

July 23,2007

19:36:32

Page1

Item Quantity Reference Part ______________________________________________ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 5 5 3 3 3 3 3 3 3 4 3 3 3 1 3 1 1 2 1 2 1 3 1 1 1 1 9 3 C1,C16,C26,C28,C30 C2,C17,C27,C29,C31 C3,C18,C20 C4,C10,C19 C5,C11,C21 C6,C12,C22 C7,C13,C23 C8,C14,C24 C9,C15,C25 D1,D2,D3,D4 M1,M2,M3 R1,R3,R5 R2,R4,R6 R7 SW1,SW2,SW3 SW4 TB1 U1,U10 U2 U3,U7 U4 U5,U11,U12 U6 U8 U9 U13 C32-C40 HS1-HS3 4.7u Tantalum 0.1u Film, Mono, or Ceramic 100p 10p 1n 10n 100n 1u Film 10u Film MUR1520 Diode, Ultrafast IRF3710 Power MOSFET 1k 100k Potentiometer 220 Rotary Switch, 12-position Switch, SPDT Terminal Block, 6-position 74AC107 Dual "JK" Flip-Flop 74AC14 Hex Schmitt Inverter 74AC04 Hex Inverter 74AC08 Quad "AND" Gate MAX4420 MOSFET Driver, Low-side 74AC74 Dual "D" Flip-Flop 74AC02 Quad "OR" Gate 74AC157 Quad Data Multiplexer L78M05/TO220 5V Regulator 0.1u Mono or Ceramic Heat Sink, suitable for MOSFETs

VDD U1B R1 1k U2A R2 100k

F3 FREQUENCY
U4A TPF3

8 9
U3A U3B U3C U3D U3E

CLR

11

Q CLK Q K 10

5 6
V+ 74AC107 C1 4.7u Tant.

U5 MAX4420

2 1 8
C2 0.1u

IN VDD VDD

OUT OUT GND GND

6 7

2
74AC14

2
74AC04

4
74AC04

6
74AC04

11

10
74AC04

1 2
74AC08

M1 IRF3710 D1 MUR1520

74AC04

45

nc nc nc nc

11 10 9 8 7 6

13

12 1 2 3 4 5

nc

VDD

U6A

TPF2 U7A U7B U7C

CLR PRE

2
C5 1n C6 10n C7 100n C8 1u C9 10u

5 6

2
74AC04

4
74AC04

6
74AC04

C4 10p

SW1 1RSW12 C3 100p

CLKQ 1

74AC74

F3 RANGE

VDD VDD U8A U7D U1A 74AC107 1 J 3 12 CLKQ 2 4 K Q TPF1

2
R3 1k U2B R4 100k

74AC02 VDD

74AC04

10

4
74AC14 U7E

U6B

12 10
74AC04

CLR PRE

9 8

13

CLR

F2 FREQUENCY

13

nc nc nc nc

11 10 9 8 7 6
C18 100p

12 1 2 3 4 5

11
nc

11

CLKQ

74AC74

CLR

VDD VDD

C10 10p

SW2 1RSW12

C11 1n

C12 10n

C13 100n

C14 1u

C15 10u

INDEPENDENT F2 RANGE SYNCHRONIZED

1 3

SW4

U9 74AC157 2 I0A ZA 4 3 I1A 5 I0B ZB 7 6 I1B 14 I0C ZC 12 13 I1C 11 I0D ZD 9 10 I1D nc 1 S E 15

13

VDD U10A

1 12 4

Q CLK Q K 13

3 2
V+ 74AC107 C16 4.7u Tant.

U11 MAX4420

2 1 8
C17 0.1u

IN VDD VDD

OUT OUT GND GND

6 7

M2 IRF3710 D2 MUR1520

45

R5 1k U2C

R6 100k

F1 FREQUENCY

6
74AC14

nc nc nc nc

11 10 9 8 7 6

13

12 1 2 3 4 5

nc

DESIGN NOTES: 1) The "74AC" series was chosen for its high speed and low propagation delay, which becomes quite significant at 13MHz.
C21 1n C22 10n C23 100n C24 1u C25 10u

C19 10p

SW3 C20 1RSW12 100p

2) Additional gates in the F3, F2, F1 divider section are for propagation delay matching. As shown, all rising and falling edges are within 4ns. If further matching is necessary, unused gates are available. 3) Outputs are guaranteed 50% duty cycle.

VDD U10B

8 9 11

F1 RANGE 4) Place the MAX4420 and IRF3710 as close together as possible.


POSITION 1 2 3 4 5 6 7 ~ FREQUENCY RANGE 0.4Hz~40Hz 4Hz~400Hz 40Hz~4kHz 400Hz~40kHz 4kHz~400kHz 40kHz~3.33MHz 275kHz~13MHz V+

CLR

Q CLK Q K 10

5 6
V+ 74AC107 C26 4.7u Tant.

U12 MAX4420

2 1 8
C27 0.1u

IN VDD VDD

OUT OUT GND GND

6 7

M3 IRF3710 D3 MUR1520

5) Keep the noisy "V+" ground separate from the CMOS "VDD" ground until the Terminal Block TB1 where they are tied together. 6) In the "SYNCHRONIZED" mode, only the "F3" FREQUENCY and RANGE controls are used.

45

VDD D4 R7 220 C28 4.7u Tant. C29 0.1u U13 L78M05/TO220 TB1 F3 1 F2 2 F1 3 C31 0.1u V+ nc
4 5 6

VDD 14 U2 74AC14 9 11 13 7 C32 0.1u 7

VDD 14 U3 74AC04 13 C33 0.1u 7

VDD 14 U7 74AC04 13 C34 0.1u

VDD 14 U4 74AC08

VDD 14 U6 74AC74

VDD 14 U8 5 74AC026 8 9 11 12 U1 74AC107

VDD 14 U10 74AC107

VDD 14 U9 74AC157

VDD 16

MUR1520

GND

VIN VOUT

4 5 9 10 12 13 7

C30 4.7u Tant.

C35 0.1u

C36 0.1u

C37 0.1u

C38 0.1u

C39 0.1u

C40 0.1u

Designed by z_p_e
Title

TP600 - TPU PULSER


Size Document Number

C
Date:

TP600.1 Monday, July 23, 2007


Sheet

Rev -

of

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