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CERN Document Server Encontrados 60 registros  1 - 10siguientefinal  ir al registro: La búsqueda tardó 0.68 segundos. 
1.
A Hardware Track Finder for ATLAS Trigger / Volpi, G ; Andreani, A ; Andreazza, A ; Citterio, M ; Favareto, A ; Liberali, V ; Meroni, C ; Riva, M ; Sabatini, F ; Stabile, A et al.
The existing three level ATLAS trigger system is deployed to reduce the event rate from the bunch crossing rate of 40 MHz to ~400 Hz for permanent storage at the LHC design luminosity of 10^34 cm^-2 s^-1. When the LHC reaches beyond the design luminosity, the load on the Level-2 trigger system will significantly increase due to both the need for more sophisticated algorithms to suppress background and the larger event sizes. [...]
ATL-DAQ-SLIDE-2012-359.- Geneva : CERN, 2012 - 15 p. Fulltext: ATL-DAQ-SLIDE-2012-359 - PDF; volpi_rt2012 - PPTX; External link: Original Communication (restricted to ATLAS)
In : 18th IEEE Real-Time Conference 2012, Berkeley, California, 11 - 15 Jun 2012
2.
Associative Memory Design for the FastTrack Processor (FTK) at ATLAS / Annovi, A (Frascati) ; Beretta, M (Frascati) ; Volpi, G (Frascati) ; Beccherle, R (INFN, Pisa ; Pisa U.) ; Bossini, E (INFN, Pisa ; Pisa U.) ; Crescioli, F (INFN, Pisa ; Pisa U.) ; Dell'Orso, M (INFN, Pisa ; Pisa U.) ; Giannetti, P (INFN, Pisa ; Pisa U.) ; Amerio, S (Fermilab) ; Hoff, J (Fermilab) et al.
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. [...]
ATL-DAQ-PROC-2011-045.
- 2011. - 6 p.
Original Communication (restricted to ATLAS) - Full text
3.
Associative Memory Design for the Fast TracKer Processor (FTK)at ATLAS / Annovi, A (INFN Laboratori Nazionali di Frascati, Frascati, Italy) ; Amerio, S (FERMILAB, Batavia, USA) ; Beretta, M (INFN Laboratori Nazionali di Frascati, Frascati, Italy) ; Bossini, E (INFN Sezione di Pisa, Pisa, Italy) ; Crescioli, F (INFN Sezione di Pisa, Pisa, Italy) ; Dell'Orso, M (INFN Sezione di Pisa, Pisa, Italy) ; Giannetti, P (INFN Sezione di Pisa, Pisa, Italy) ; Hoff, J (FERMILAB, Batavia, USA) ; Liu, T (FERMILAB, Batavia, USA) ; Liberali, V (University of Milano, Milano, Italy) et al.
We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. [...]
ATL-DAQ-SLIDE-2011-682.- Geneva : CERN, 2011 - 10 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 2011 IEEE Nuclear Science Symposium and Medical Imaging Conference, Valencia, Spain, 23 - 29 Oct 2011
4.
ATLAS FTK: Fast Track Trigger / Amerio, S (INFN, Padua) ; Andreani, A (INFN, Milan ; Milan U.) ; Andreazza, A (INFN, Milan ; Milan U.) ; Annovi, A (Frascati) ; Beretta, M (Frascati) ; Bevacqua, V (INFN, Pisa ; Pisa U.) ; Bogdan, M (Chicago U.) ; Bossini, E (INFN, Siena ; Siena U.) ; Boveia, A (Chicago U.) ; Cavaliere, V (Illinois U., Urbana) et al.
A track reconstruction system for the trigger of the ATLAS detector at the Large Hadron Collider is described. [...]
ATL-DAQ-PROC-2011-022.
- 2011. - 10 p.
Original Communication (restricted to ATLAS) - Full text
5.
A new Variable Resolution Associative Memory for High Energy Physics / Annovi, A ; Amerio, S ; Beretta, M ; Bossini, E ; Crescioli, F ; Dell'Orso, M ; Giannetti, P ; Hoff, J ; Liberali, V ; Liu, T et al.
We describe an important advancement for the Associative Memory device (AM). The AM is a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture. [...]
ATL-UPGRADE-SLIDE-2011-225.- Geneva : CERN, 2011 - 17 p. Fulltext: ANIMMA2011_volpi_v2 - PPTX; ATL-UPGRADE-SLIDE-2011-225 - PDF; External link: Original Communication (restricted to ATLAS)
In : 2nd International Conference on Advancements in Nuclear Instrumentation, Measurement Methods and their Applications, Ghent, Belgium, 6 - 9 Jun 2011
6.
A new “Variable Resolution Associative Memory” for High Energy Physics / Annovi, A (Frascati) ; Amerio, S (INFN, Padua) ; Beretta, M (Frascati) ; Bossini, E (INFN, Pisa) ; Crescioli, F (INFN, Pisa) ; Dell'Orso, M (INFN, Pisa) ; Giannetti, P (INFN, Pisa) ; Hoff, J (Fermilab) ; Liberali, V (INFN, Milan) ; Liu, T (Fermilab) et al.
We describe an important advancement for the Associative Memory device (AM). [...]
ATL-UPGRADE-PROC-2011-004.
- 2011. - 8 p.
Original Communication (restricted to ATLAS) - Full text - Full text
7.
Enhancement of the ATLAS Trigger System with a Hardware Tracker Finder FTK / Zhang, J (Argonne) ; Andreani, A (INFN, Milan ; Milan U.) ; Andreazza, A (INFN, Milan ; Milan U.) ; Annovi, A (Frascati) ; Beretta, M (Frascati) ; Bevacqua, V (INFN, Pisa ; Pisa U.) ; Bogdan, M (Chicago U.) ; Bossini, E (Frascati) ; Boveia, A (Chicago U.) ; Canelli, F (Chicago U. ; Fermilab) et al.
The existing three-level ATLAS trigger system is deployed to reduce the event rate from the bunch crossing rate of 40 MHz to ~200 Hz for permanent storage at the LHC design luminosity of 10^34 cm^-2 s^-1. [...]
ATL-DAQ-PROC-2010-043.
- 2010. - 5 p.
Original Communication (restricted to ATLAS) - Full text - IOP Open Access Article
8.
The FastTrack Real Time Processor and Its Impact on Muon Isolation, Tau and b-Jet Online Selections at ATLAS / Crescioli, F (INFN, Pisa ; Pisa U.) ; Andreani, A (INFN, Milan ; Milan U.) ; Zhang, J (Argonne) ; Boveia, A (Chicago U.) ; Bevacqua, V (INFN, Pisa ; Pisa U.) ; Cheng, Y (Chicago U.) ; Canelli, F (Fermilab ; Chicago U.) ; Bogdan, M (Chicago U.) ; Dell'Orso, M (INFN, Pisa ; Pisa U.) ; Bossini, E (Frascati) et al.
As the LHC luminosity is ramped up to 31034 cm−2 s−1 and beyond, the high rates, multiplicities, and energies of particles seen by the detectors will pose a unique challenge. [...]
ATL-DAQ-PROC-2010-014.
- 2010. - 8 p.
Original Communication (restricted to ATLAS) - Full text
9.
Associative Memory design for the FastTrack processor (FTK) at ATLAS / Annovi, A (INFN Frascati) ; Beretta, M (INFN Frascati) ; Bossini, E (INFN Frascati ; INFN, Pisa) ; Crescioli, F (INFN, Pisa) ; Dell'Orso, M (INFN, Pisa) ; Giannetti, P (INFN, Pisa) ; Piendibene, M (INFN, Pisa) ; Sacco, I (Pisa, Scuola Normale Superiore) ; Sartori, L (INFN, Ferrara) ; Tripiccione, R (INFN, Ferrara)
We propose a new generation of VLSI processor for pattern recognition based on Associative Memory architecture, optimized for on-line track finding in high-energy physics experiments. [...]
ATL-DAQ-PROC-2010-013.
- 2010. - 3 p.
Original Communication (restricted to ATLAS) - Full text
10.
Associative Memory design for the Fast TracK processor (FTK) at Atlas / Annovi, A (INFN Frascati) ; Beretta, M (INFN Frascati) ; Bossini, E (Università di Pisa and INFN Frascati) ; Crescioli, F (Università di Pisa and INFN, Pisa) ; Dell'Orso, M (Università di Pisa and INFN, Pisa) ; Giannetti, P (INFN, Pisa) ; Piendibene, M (Università di Pisa and INFN, Pisa) ; Sacco, I (Scuola Superiore Sant'Anna di Pisa) ; Sartori, L (Università di Ferrara and INFN Ferrara) ; Tripiccione, R (Università di Ferrara and INFN Ferrara)
We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. [...]
ATL-DAQ-SLIDE-2010-097.- Geneva : CERN, 2010 - 1 p. Fulltext: PDF; External link: Original Communication (restricted to ATLAS)
In : 17th IEEE NPSS Real Time Conference, Lisbon, Portugal, 24 - 28 May 2010

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Vea también: autores con nombres similares
2 Tripiccione, R.
3 Tripiccione, Raffaele
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