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1.28 and 5.12 Gbps multi-channel twinax cable receiver ASICs for the ATLAS Inner Tracker Pixel Detector Upgrade
/ Chen, Chufeng (Southern Methodist U. ; Hua-Zhong Normal U.) ; Gong, Datao (Southern Methodist U.) ; Hou, Suen (Academia Sinica, Taiwan) ; Huang, Guangming (Hua-Zhong Normal U.) ; Huang, Xing (Southern Methodist U. ; Hua-Zhong Normal U.) ; Kulis, Szymon (CERN) ; Leroux, Paul (Leuven U.) ; Liu, Chonghan (Southern Methodist U.) ; Liu, Tiankuan (Southern Methodist U.) ; Moreira, Paulo (CERN) et al.
We present two prototypes of a gigabit transceiver ASIC, GBCR1 and GBCR2, both designed in a 65-nm CMOS technology for the ATLAS Inner Tracker Pixel Detector readout upgrade. The first prototype, GBCR1, has four upstream receiver channels and one downstream transmitter channel with pre-emphasis. [...]
arXiv:2008.09738.-
2020-11-21 - 7 p.
- Published in : Nucl. Instrum. Methods Phys. Res., A 981 (2020) 164439
Fulltext: PDF;
In : 12th international "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD), Hiroshima, Japan, 14 - 18 Dec 2019, pp.164439
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3.
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Development of a low power 5.12 Gbps data serializer and wireline transmitter circuit for the VeloPix chip
/ Gromov, V (NIKHEF, Amsterdam) ; Zivkovic, V (NIKHEF, Amsterdam) ; Beuzekom, M van (NIKHEF, Amsterdam) ; Llopart, X (CERN) ; Poikela, T (CERN ; Turku U.) ; Buytaert, J (CERN) ; Gaspari, M De (CERN) ; Campbell, M (CERN) ; Wyllie, K (CERN)
A new front-end chip (VeloPix) is being developed for the readout of the silicon vertex locator detector (VELO) in the LHCb experiment after the upgrade scheduled for 2018. The chip with an active area of 2 cm(2) will run at a very high hit rate (up to 500 Mhitcm(−)(2)sec(−)(1)) and will transmit large amounts of data (> 15 Gbit-per-sec) over a 1 meter low-mass copper cable. [...]
2015 - 7 p.
- Published in : JINST 10 (2015) C01054
In : Topical Workshop on Electronics for Particle Physics 2014, Aix En Provence, France, 22 - 26 Sep 2014, pp.C01054
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4.
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A Radiation-Tolerant 25.6-Gb/s High-Speed Transmitter in 28-nm CMOS With a Tolerance of 1 Grad
/ Klekotko, A (CERN ; Leuven U.) ; Biereigel, S (CERN) ; Baszczyk, M (CERN) ; Moreira, P (CERN) ; Martina, F (CERN) ; Prinzie, J (Leuven U.) ; Kulis, S (Leuven U.)
This article presents a 25.6-Gbit $\cdot $ s−1 high-speed transmitter (HST) manufactured using 28-nm CMOS technology. The HST macroblock includes an all-digital phase-locked loop (ADPLL), duty cycle corrector (DCC) circuit, data pattern generator, serializer, and a driver capable of driving the differential 100- $\Omega $ line as well as a silicon photonics (SiPh) ring modulator (RM). [...]
2024 - 9 p.
- Published in : IEEE Trans. Nucl. Sci. 71 (2024) 2124-2132
Fulltext: PDF;
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A 10MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65m CMOS
/ Kishishita, T (UBONN) ; Hemperek, T (UBONN) ; Krüger, H (UBONN) ; Koch, M (UBONN) ; Germic, L (UBONN) ; Wermes, N (UBONN)
The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal–metal capacitor array and a dynamic two-stage comparator. [...]
AIDA-PUB-2013-016.-
Geneva : CERN, 2013
- Published in : Nucl. Instrum. Methods Phys. Res., A 732 (2013) 506-510
Fulltext: PDF;
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High speed data transmission on small gauge cables for the ATLAS Phase-II Pixel detector upgrade
/ Shahinian, J (UC, Santa Cruz) ; Volk, J (UC, Santa Cruz) ; Fadeyev, V (UC, Santa Cruz) ; Grillo, A A (UC, Santa Cruz) ; Meimban, B (UC, Santa Cruz) ; Nielsen, J (UC, Santa Cruz) ; Wilder, M (UC, Santa Cruz)
The High Luminosity LHC will present a number of challenges for the upgraded ATLAS detector. In particular, data transmission requirements for the upgrade of the ATLAS Pixel detector will be difficult to meet. [...]
2016
- Published in : JINST 11 (2016) C03024
In : Topical Workshop on Electronics for Particle Physics, Lisbon, Portugal, 28 Sep - 2 Oct 2015, pp.C03024
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E-link : A Radiation-Hard Low-Power Electrical Link for Chip-to-Chip Communication
/ Bonacini, S (CERN) ; Kloukinas, K (CERN) ; Moreira, P (CERN)
The e-link, an electrical interface suitable for transmission of data over PCBs or electrical cables, within a distance of a few meters, at data rates up to 320 Mbit/s, is presented. The elink is targeted for the connection between the GigaBit Transceiver (GBTX) chip and the Front-End (FE) integrated circuits. [...]
CERN, 2009
Published version from CERN: PDF;
In : Topical Workshop on Electronics for Particle Physics, Paris, France, 21 - 25 Sep 2009, pp.422-425 (CERN-2009-006)
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The design and test results of A Giga-Bit Cable Receiver (GBCR) for the ATLAS Inner Tracker Pixel Detector
/ Zhang, L. (Southern Methodist U. ; Hua-Zhong Normal U.) ; Gong, D. (Southern Methodist U.) ; Liu, T. (Southern Methodist U.) ; Chen, C. (Southern Methodist U.) ; Deng, B. (HBPU, Huangshi) ; Hou, S. (Academia Sinica, Taiwan) ; Huang, G. (Hua-Zhong Normal U.) ; Huang, X. (Southern Methodist U.) ; Liu, C. (Southern Methodist U.) ; Moreira, P. (CERN ; Southern Methodist U.) et al.
This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for the HL-LHC upgrade of the ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, and GBCR3) have been designed in the CERN-identified 65 nm CMOS technology. [...]
arXiv:2301.13399; FERMILAB-PUB-23-069-PPD.-
2023-03-07 - 7 p.
- Published in : JINST
Fulltext: 2301.13399 - PDF; b31c20c7db9c702f29204331571c99f1 - PDF; External link: Fermilab Library Server
In : Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C03005
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Module and electronics developments for the ATLAS ITK pixel system
/ Munoz Sanchez, Francisca Javiela (School of Physics and Astronomy, University of Manchester)
/ATLAS Collaboration
ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. [...]
ATL-ITK-SLIDE-2017-575.-
Geneva : CERN, 2017 - 22 p.
Fulltext: ATL-ITK-SLIDE-2017-575 - PDF; iWoRiD2017_fmunoz_ITkpixel - PDF; External link: Original Communication (restricted to ATLAS)
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