The future of the LHC programme and machine (p. 3) |
by Bertolucci, Sergio |
HEP experiments in Japan : The Next Generation(p. 14) |
by Itoh, Ryosuke |
ILC-CLIC (p. 21) |
by Kluge, Alex |
Experiment protection at the LHC and damage limits in LHC(b) silicon detectors (p. 37) |
by Ferro-Luzzi, M |
A ten thousand frames per second readout MAPS for the EUDET beam telescope (p. 47) |
by Hu-Guo, C |
Front end electronics for pixel detector of the PANDA MVD (p. 52) |
by Kugathasan, Thanushan |
Advanced pixel architectures for scientific image sensors (p. 57) |
by Coath, R |
Performance of the ABCN-25 readout chip for the ATLAS Inner Detector Upgrade (p. 62) |
by Anghinolfi, F |
Reduction techniques of the back gate effect in the SOI Pixel Detector (p. 68) |
by Ichimiya, R |
Low noise, low power front end electronics for pixelized TFA sensors (p. 72) |
by Poltorak, K |
Commissioning of the CMS DT electronics under magnetic field (p. 81) |
by Fernandez-Bedoya, C |
Data acquisition system for a proton imaging apparatus (p. 86) |
by Sipala, V |
Commissioning and performance of the Preshower off-detector readout electronics in the CMS experiment (p. 91) |
by Antchev, G |
In-situ performance of the CMS Preshower Detector (p. 96) |
by Bialas, W |
Low Power Analog Design in Scaled Technologies (p. 103) |
by Baschirotto, A |
Gossipo-3 : A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors(p. 113) |
by Brezina, Christpoh |
DIRAC v2 : a DIgital Readout Asic for hadronic Calorimeter(p. 117) |
by Gaglione, R |
HARDROC, Readout chip of the Digital Hadronic Calorimeter of ILC (p. 122) |
by Callier, S |
Design of High Dynamic Range Digital to Analog Converters for the Calibration of the CALICE Si-W Ecal readout electronics (p. 127) |
by Gallin-Martel, L |
LAPAS: A SiGe Front End Prototype for the Upgraded ATLAS LAr Calorimeter (p. 132) |
by Dressnandt, N |
Replacing full custom DAQ test system by COTS DAQ components on example of ATLAS SCT readout (p. 139) |
by Dwuznik, M |
Integrated test environment for a part of the LHCb calorimeter - TWEPP09 (p. 144) |
by Abellan, C |
Picosecond time measurement using ultra analog memories (p. 149) |
by Breton, Dominique |
Measurement of Radiation Damage to 130nm Hybrid Pixel Detector Readout Chips (p. 157) |
by Plackett, R |
Radiation Tests on the Complete System of the Instrumentation of the LHC Cryogenics at the CERN Neutrinos to Gran Sasso (CNGS) Test Facility (p. 161) |
by Gousiou, E |
Development of new readout electronics for the ATLAS LAr Calorimeter at the sLHC (p. 165) |
by Strässner, A |
Buses and Boards : Making the right choice(p. 173) |
by Gipper, Jerry |
Integrated Trigger and Data Acquisition system for the NA62 experiment at CERN (p. 179) |
by Collazuol, G |
A digital calorimetric trigger for the COMPASS experiment at CERN (p. 182) |
by Friedrich, J |
The Level 0 Trigger Decision Unit for the LHCb experiment (p. 186) |
by Chanal, H |
Performance of the CMS Regional Calorimeter Trigger (p. 191) |
by Klabbers, P |
Analogue Input Calibration of the ATLAS Level-1 Calorimeter Trigger : TWEPP-09(p. 196) |
by Morris, J D |
Precise Timing Adjustment for the ATLAS Level1 Endcap Muon Trigger System (p. 200) |
by Suzuki, Y |
Framework for Testing and Operation of the ATLAS Level-1 MUCTPI and CTP (p. 204) |
by Spiwoks, R |
Construction and Performance of a Double-Sided Silicon Detector Module Using the Origami Concept (p. 211) |
by Irmler, C |
Application of a new interconnection technology for the ATLAS pixel upgrade at SLHC (p. 216) |
by Macchiolo, A |
3D electronics for hybrid pixel detectors – TWEPP-09 (p. 220) |
by Godiot, S |
Design of Low Noise Detectors (p. 229) |
by Johnson, Marvin |
Feasibility studies of a Level-1 Tracking Trigger for ATLAS (p. 239) |
by Warren, M |
Design of a trigger module for the CMS Tracker at SLHC (p. 243) |
by Hall, G |
Trigger R&D for CMS at SLHC (p. 249) |
by Iles, G |
Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC operations (p. 254) |
by Acosta, D |
The GCT Matrix Card and its Applications (p. 259) |
by Jones, J |
Progress on DC-DC Converters for a Silicon Tracker for the sLHC Upgrade (p. 267) |
by Dhawan, S |
Experimental Studies Towards a DC-DC Conversion Powering Scheme for the CMS Silicon Strip Tracker at SLHC (p. 271) |
by Klein, K |
System Integration Issues of DC to DC converters in the sLHC Trackers (p. 276) |
by Allongue, B |
Performance and Comparison of Custom Serial Powering Regulators and Architectures for SLHC Silicon Trackers (p. 281) |
by Tic, Thomas |
Power and Submarine Cable Systems for the KM3NeT kilometre cube Neutrino Telescope (p. 286) |
by Sedita, M |
Key technologies for present and future optical networks (p. 293) |
by Antona, Jean-Christophe |
Smart Analogue Sampler for the Optical Module of a Cherenkov Neutrino Detector (p. 303) |
by Caponetto, L |
PARISROC, a Photomultiplier Array Integrated Read Out Chip (p. 308) |
by Conforti Di Lorenzo, S |
The 8 bits 100 MS/s Pipeline ADC for the INNOTEP Project – TWEPP-09 (p. 313) |
by Crampon, S |
A latchup topology to investigate novel particle detectors (p. 318) |
by Gabrielli, A |
A 5 Gb/s Radiation Tolerant Laser Driver (p. 321) |
by Amaral, L |
The GBTIA, a 5 Gbit/s Radiation-Hard Optical Receiver for the SLHC Upgrades (p. 326) |
by Menouni, M |
The Radiation Hardness of Certain Optical fibres for the LHC upgrades at −25°C (p. 333) |
by Issever, C |
Study of the Radiation-Hardness of VCSEL and PIN (p. 338) |
by Gan, K K |
The GBT Project (p. 342) |
by Moreira, P |
The Versatile Transceiver Proof of Concept (p. 347) |
by Troska, J |
Passive Optical Networks for the Distribution of Timed Signals in Particle Physics Experiments (p. 352) |
by Papakonstantinou, I |
Low Power SoC Design (p. 359) |
by Piguet, Christian |
Two-Phase Cooling of Targets and Electronics for Particle Physics Experiments (p. 366) |
by Thome, J R |
A Prototype Front-End Readout Chip for Silicon Microstrip Detectors Using an Advanced SiGe Technology (p. 379) |
by Grillo, A A |
DC-DC switching converter based power distribution vs serial power distribution : EMC strategies(p. 384) |
by Arteche, F |
Study of the Radiation Hardness Performance of PiN diodes for the ATLAS Pixel Detector at the SLHC upgrade (p. 390) |
by Abi, B |
Interference coupling mechanisms in Silicon Strip Detectors - CMS tracker "wings" : A learned lesson for SLHC(p. 394) |
by Arteche, F |
Development and commissioning of the ALICE pixel detector control system (p. 400) |
by Bortolin, C |
Upgrade of the BOC for the ATLAS Pixel Insertable B-Layer (p. 404) |
by Dopke, J |
Improved performance for the ATLAS ReadOut System with the switchbased architecture (p. 407) |
by Schroer, N |
Development of a 1 GS/s high-resolution transient recorder (p. 410) |
by Bartknecht, S |
Novel Charge Sensitive Amplifier Design Methodology suitable for Large Detector Capacitance Applications (p. 413) |
by Thomas Noulis a, |
Readout and Data Processing Electronics for the Belle-II Silicon Vertex Detector (p. 417) |
by Friedl, M |
E-link : A Radiation-Hard Low-Power Electrical Link for Chip-to-Chip Communication(p. 422) |
by Bonacini, S |
A Zero Suppression Micro-Circuit for Binary Readout CMOS Monolithic Sensors (p. 426) |
by Himmi, A |
Commissioning of the CSC Level 1 Trigger Optical Links at CMS (p. 431) |
by Acosta, A |
Upgrade of the Cold Electronics of the ATLAS HEC Calorimeter for sLHC Generic Studies of Radiation Hardness and Temperature Dependence (p. 435) |
by Rudert, A |
Radiation hardness studies of a 130 nm Silicon Germanium BiCMOS technology with a dedicated ASIC (p. 439) |
by Díez, S |
OMEGAPIX : 3D integrated circuit prototype dedicated to the ATLAS upgrade Super LHC pixel project(p. 443) |
by Thienpont, D |
Design and measurements of 10 bit pipeline ADC for the Luminosity Detector at ILC (p. 448) |
by Idzik, Marek |
A 10-bit 40MS/s Pipelined ADC in a 0.13μm CMOS Process (p. 452) |
by França-Santos, Hugo |
A Self Triggered Amplifier/Digitizer Chip for CBM (p. 457) |
by Armbruster, A |
Measurement of the performances of a Low-Power Multi-Dynamics Front-End for Neutrino (p. 462) |
by Sipala, V |
The Control System for a new Pixel Detector at the sLHC (p. 466) |
by Boek, J |
High-Speed Serial Optical Link Test Bench Using FPGA with Embedded Transceivers (p. 471) |
by Xiang, Annie C. |
The Design of a High Speed Low Power Phase Locked Loop (p. 476) |
by Liu, Tiankuan |
Development of A 16:1 serializer for data transmission at 5 Gbps (p. 481) |
by Gong, Datao |
Characterization of Semiconductor Lasers for Radiation Hard High Speed Transceivers (p. 486) |
by Silva, Sérgio |
Presentation of the “ROC” Chips Readout (p. 491) |
by Dulucq, F |
Position Measurements with Micro-Channel Plates and Transmission lines using Pico-second Timing and Waveform Analysis (p. 495) |
by Adamsa, Bernhard |
Hardware studies for the upgrade of the ATLAS Central Trigger Processor (p. 500) |
by Berge, D |
SPIROC (SiPM Integrated Read-Out Chip) : Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out(p. 504) |
by Bouchel, Michel |
An FPGA-based Emulation of the G-Link Chip-Set for the ATLAS Level-1 Barrel Muon Trigger (p. 509) |
by Aloisio, A |
A 40 MHz Trigger-free Readout Architecture for the LHCb Experiment (p. 514) |
by Alessio, F |
Calibration of the Prompt L0 Trigger of the Silicon Pixel Detector for the ALICE Experiment (p. 520) |
by Cavicchioli, C |
A programmable 10 Gigabit injector for the LHCb DAQ and its upgrade (p. 525) |
by Delord, V |
Wafer Screening of ABCN-25 readout ASIC (p. 529) |
by Phillips, Peter W |
A Digitally Calibrated 12 bits 25 MS/s Pipelined ADC with a 3 input multiplexer for CALICE Integrated Readout (p. 533) |
by Rarbi, F |
Standalone, battery powered radiation monitors for accelerator electronics (p. 539) |
by Wijnands, T |
On-chip Phase Locked Loop (PLL) design for clock multiplier in CMOS Monolithic Active Pixel Sensors (MAPS) (p. 543) |
by Sun, Q |
Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS (p. 548) |
by Kruth, A |
ATLAS Silicon Microstrip Tracker Operation (p. 553) |
by Vankov, P |
The GBT-SCA, a radiation tolerant ASIC for detector control applications in SLHC experiments (p. 557) |
by Gabrielli, A |
A facility and a web application for real-time monitoring of the TTC backbone status (p. 561) |
by Jurga, P |
A Low-cost Multi-channel Analogue Signal Generator (p. 566) |
by Muller, F |
A Radiation Tolerant 4.8 Gb/s Serializer for the Giga-Bit Transceiver (p. 570) |
by Çobanoglu, Ö |
Detector Control System for the Electromagnetic Calorimeter of the CMS experiment (p. 575) |
by Adzic, P |
An integrated DC-DC step-up charge pump and step-down converter in 130 nm technology (p. 579) |
by Bochenek, M |
Error-Free 10.7 Gb/s Digital Transmission over 2 km Optical Link Using an Ultra-Low-Voltage Electro-Optic Modulator (p. 584) |
by Janner, D |
ALICE TPC control and read-out system (p. 586) |
by Larsen, T D |
Simple parallel stream to serial stream converter for Active Pixel Sensor readout (p. 589) |
by Kushpil, V |
Total dose effects on deep-submicron SOI technology for Monolithic Pixel Sensor development (p. 591) |
by Mattiazzo, S |
AFTER, the front end ASIC of the T2K Time Projection Chambers (p. 596) |
by Baron, P |
The Online Error Control and Handling of the ALICE Pixel Detector (p. 601) |
by Caselle, M |
Low power discriminator for ATLAS pixel chip (p. 606) |
by Menouni, M |
Design of the CMS-CASTOR subdetector readout system by reusing existing designs (p. 610) |
by Beaumont, W |
Advances in Architectures and Tools for FPGAs and their Impact on the Design of Complex Systems for Particle Physics (p. 617) |
by Gregerson, Anthony |
A flash high-precision time-to-digital converter implemented in FPGA technology (p. 627) |
by Branchini, P |
Implementing the GBT data transmission protocol in FPGAs (p. 631) |
by Baron, S |
FPGA-based Bit-Error-Rate Tester for SEU-hardened Optical Links (p. 636) |
by Detraz, S |
TWEPP-09 Executive summary (xix) |
by Christiansen, J |
Experimental Studies Towards a DC-DC Conversion Powering Scheme for the CMS Silicon Strip Tracker at SLHC |
by Klein, Katja |
Design of the CMS-CASTOR sub detector readout system by reusing existing designs |
by Beaumont, Willem |
Commissioning and performance of the Preshower off-detector readout electronics in the CMS experiment |
by Antchev, Georgy |
Design Considerations for an Upgraded Track-Finding Processor in the Level-1 Endcap Muon Trigger of CMS for SLHC Operations |
by Madorsky, Alexander |
The CMS ECAL Detector Control System |
by Leshev, Georgi |
ATLAS Silicon Microstrip Tracker Operation |
by Vankov, P |
LAPAS: A SiGe Front End Prototype for the Upgraded ATLAS LAr |
by Rescia, S |
Development of new readout electronics for the ATLAS LAr calorimeter at the sLHC |
by Strässner, A |
Analogue Input Calibration of the ATLAS Level-1 Calorimeter Trigger |
by Morris, J D |