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    Mos Ram

    Uploaded by

    Dr. MNV Kiranbabu
    This document is a lesson plan for a class on semiconductor memories. It introduces static and dynamic MOS RAM cells. For static MOS RAM, it explains the working of a cell consisting of two cross-coupled MOS inverters. For dynamic MOS RAM, it describes a cell using four transistors that stores data on stray capacitances, requiring periodic refreshing. The objectives are to explain the working of these two types of MOS RAM cells.

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    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd

    Mos Ram

    Uploaded by

    Dr. MNV Kiranbabu
    2K views15 pages
    This document is a lesson plan for a class on semiconductor memories. It introduces static and dynamic MOS RAM cells. For static MOS RAM, it explains the working of a cell consisting of two cross-coupled MOS inverters. For dynamic MOS RAM, it describes a cell using four transistors that stores data on stray capacitances, requiring periodic refreshing. The objectives are to explain the working of these two types of MOS RAM cells.

    Original Description:

    About MOS RAM cells

    Original Title

    MOS RAM

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    This document is a lesson plan for a class on semiconductor memories. It introduces static and dynamic MOS RAM cells. For static MOS RAM, it explains the working of a cell consisting of two cross-coupled MOS inverters. For dynamic MOS RAM, it describes a cell using four transistors that stores data on stray capacitances, requiring periodic refreshing. The objectives are to explain the working of these two types of MOS RAM cells.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    2K views15 pages

    Mos Ram

    Uploaded by

    Dr. MNV Kiranbabu
    This document is a lesson plan for a class on semiconductor memories. It introduces static and dynamic MOS RAM cells. For static MOS RAM, it explains the working of a cell consisting of two cross-coupled MOS inverters. For dynamic MOS RAM, it describes a cell using four transistors that stores data on stray capacitances, requiring periodic refreshing. The objectives are to explain the working of these two types of MOS RAM cells.

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    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
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    You are on page 1of 15

    DEPARTMENT OF TECHNICAL EDUCATION

    ANDHRA PRADESH
    Name
    Designation
    Branch
    Institute
    Year/semester
    Subject
    Subject code
    Topic
    Duration
    Sub Topic
    Teaching Aids

    : C.V.S.B.UMA VANI
    : Lecturer
    : ECE
    : GPW ,Palamaner.
    : III semester
    : Digital Electronics
    : CM-305
    : Semiconductor Memories (5/10)
    : 50 Mts
    : MOS RAM Cells
    : ppt , Diagrams
    CM305.70

    OBJECTIVES
    On completion of this period you would be able
    to
    Explain the working of Static MOS RAM Cell.

    Explain the working of Dynamic MOS RAM Cell.

    CM305.70

    Recap

    In the last class we have studied about


    The Memory Cell.
    Working of basic Bipolar RAM Cell.

    CM305.70

    Do You Know ?

    What is meant by Memory Cell ?

    The Working of Bipolar RAM Cell

    CM305.70

    MOS RAMs
    MOS devices use two different techniques to store
    information.
    Depending on the type of basic memory cell it can be
    static or dynamic.
    Static MOS devices are slower but easier to drive
    than dynamic memories.
    Static memories use a flip-flop as a basic memory
    cell.
    Dynamic MOS circuits make use of temporary
    storage of data on the parasitic capacitances.
    CM305.70

    Static MOS RAM Cell

    Fig.1 Static MOS RAM Cell


    CM305.70

    A RAM Memory Cell consisting of two cross coupled


    MOS inverters is shown in Fig.1

    Addressed by setting Ax and Ay to 1.


    When Ax =1 the cell is connected to data and data line.

    When Ay =1 the Transistors T7 and T8 are ON.


    To Write into the Cell, set W=1, Transistor T9 becomes

    ON.

    CM305.70

    If Data input is 1,makes T3 ON and level D =0.


    If Data input is 0, makes T3 OFF and level D =1.

    To Read the state of the Flip-Flop, we set R=1 this


    connects data output to D.

    CM305.70

    Dynamic MOS RAM Cell

    Fig.2 Dynamic MOS RAM Cell


    CM305.70

    A Dynamic cell uses 4 transistors in place of 6 used in


    static cell. This reduces the chip area and saving of
    power.
    The 4 Transistor dynamic MOS RAM Cell is shown in Fig.2
    The state of the cell is stored on the stray capacitances C1

    and C2 .
    The cell is addressed by making Ax = Ay =1.
    In one state of the cell, the voltage across C1 is large and
    T1 is ON and C2 has zero voltage and T2 is OFF.
    CM305.70

    10

    In the other state the voltages on C1 and C2 and the


    conducting states of T1 and T2 are reversed.
    For Writing into the cell, we set W=1
    For reading from the cell we set R=1

    CM305.70

    11

    Summary

    We have discussed about


    The working of Static MOS RAM Cell.
    The working of dynamic MOS RAM Cell.

    CM305.70

    12

    QUIZ
    (1) The Memory Cell in which the refreshing
    circuitry is required
    (a) Static MOS RAM Cell
    (b) Dynamic MOS RAM Cell

    (c) Bipolar static RAM Cell


    (d) None of the above

    CM305.70

    13

    (2) Static memories are ---------- compared


    to dynamic memories.

    (a) Faster
    (b) Complicated
    (c) Slower
    (d) None of the above

    CM305.70

    14

    QUESTIONS

    (1) Explain the working of Static MOS RAM Cell with a


    neat circuit.

    (2) Explain the working of dynamic MOS RAM Cell with a


    neat circuit.

    CM305.70

    15

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