8085 Architecture
8085 Architecture
Subject: Electronics
Semester: 5
Paper : 5
Title of the paper: Microprocessor (Intel 8085)
w.e.f. 2018 - 19 ADMITTED BATCH
Topic : Architecture of 8085 Microprocessor
Internal Architecture of 8085
The internal architecture of the 8085 microprocessor determines
how and what operations can be performed with the data operations
are,
Store 8-bit data.
Perform arithmetic and logical operations.
Test for conditions.
Sequence the execution of instructions.
Store data temporarily in read write memory called stack.
Registers
The 8085 has 6 general purpose registers to store 8-bit data during
program execution.
These 6 registers are identified as B, C, D, E, H and L.
They can be combined as register pairs BC, DE and HL to perform
some 16-bit operations.
These registers are programmable. It can use to load or transfer data
from the registers by using instructions.
Accumulator
This unit is used to select a register out of all the available registers.
This unit behaves as Multiplexer (MUX) when data going from the
register to the internal data bus.
It behaves as Demultiplexer(DEMUX) when data is coming to a
register from the internal data bus of the processor.
The register select will behave as the function of selection lines at
the Mux / Demux.
Address Buffer