Full Opcodes Tables of CPUs: Z80A, Z80180 (HD64180)
Full Opcodes Tables of CPUs: Z80A, Z80180 (HD64180)
Full Opcodes Tables of CPUs: Z80A, Z80180 (HD64180)
0x NOP LD BC,d16 LD (BC),A INC BC INC B DEC B LD B,d8 RLCA EX AF,AF' ADD HL,BC LD A,(BC) DEC BC INC C DEC C LD C,d8 RRCA 0x
1x DJNZ disp LD DE,d16 LD (DE),A INC DE INC D DEC D LD D,d8 RLA JR disp ADD HL,DE LD A,(DE) DEC DE INC E DEC E LD E,d8 RRA 1x
2x JR NZ,disp LD HL,d16 LD (addr),HL INC HL INC H DEC H LD H,d8 DAA JR Z,disp ADD HL,HL LD HL,(addr) DEC HL INC L DEC L LD L,d8 CPL 2x
3x JR NC,disp LD SP,d16 LD (addr),A INC SP INC (HL) DEC (HL) LD (HL),d8 SCF JR C,disp ADD HL,SP LD A,(addr) DEC SP INC A DEC A LD A,d8 CCF 3x
4x LD B,B LD B,C LD B,D LD B,E LD B,H LD B,L LD B,(HL) LD B,A LD C,B LD C,C LD C,D LD C,E LD C,H LD C,L LD C,(HL) LD C,A 4x
5x LD D,B LD D,C LD D,D LD D,E LD D,H LD D,L LD D,(HL) LD D,A LD E,B LD E,C LD E,D LD E,E LD E,H LD E,L LD E,(HL) LD E,A 5x
6x LD H,B LD H,C LD H,D LD H,E LD H,H LD H,L LD H,(HL) LD H,A LD L,B LD L,C LD L,D LD L,E LD L,H LD L,L LD L,(HL) LD L,A 6x
7x LD (HL),B LD (HL),C LD (HL),D LD (HL),E LD (HL),H LD (HL),L HALT LD (HL),A LD A,B LD A,C LD A,D LD A,E LD A,H LD A,L LD A,(HL) LD A,A 7x
8x ADD A,B ADD A,C ADD A,D ADD A,E ADD A,H ADD A,L ADD A,(HL) ADD A,A ADC A,B ADC A,C ADC A,D ADC A,E ADC A,H ADC A,L ADC A,(HL) ADC A,A 8x
9x SUB A,B SUB A,C SUB A,D SUB A,E SUB A,H SUB A,L SUB A,(HL) SUB A,A SBC A,B SBC A,C SBC A,D SBC A,E SBC A,H SBC A,L SBC A,(HL) SBC A,A 9x
Ax AND A,B AND A,C AND A,D AND A,E AND A,H AND A,L AND A,(HL) AND A,A XOR A,B XOR A,C XOR A,D XOR A,E XOR A,H XOR A,L XOR A,(HL) XOR A,A Ax
Bx OR A,B OR A,C OR A,D OR A,E OR A,H OR A,L OR A,(HL) OR A,A CP A,B CP A,C CP A,D CP A,E CP A,H CP A,L CP A,(HL) CP A,A Bx
Cx RET NZ POP BC JP NZ,addr JP addr CALL NZ,addr PUSH BC ADD A,d8 RST #0000 RET Z RET JP Z,addr D.II.3 CALL Z,addr CALL addr ADC A,d8 RST #0008 Cx
Dx RET NC POP DE JP NC,addr OUT (port),A CALL NC,addr PUSH DE SUB A,d8 RST #0010 RET C EXX JP C,addr IN A,(port) CALL C,addr D.II.4 SBC A,d8 RST #0018 Dx
Ex RET PO POP HL JP PO,addr EX (SP),HL CALL PO,addr PUSH HL AND A,d8 RST #0020 RET PE JP (HL) JP PE,addr EX DE,HL CALL PE,addr D.II.2 XOR A,d8 RST #0028 Ex
Fx RET P POP AF JP P,addr DI CALL P,addr PUSH AF OR A,d8 RST #0030 RET M LD SP,HL JP M,addr EI CALL M,addr D.II.5 CP A,d8 RST #0038 Fx
x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
ED x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF ED
NOP NOP NOP NOP NOP NOP
0x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 0x
INO B,(port) OUTO (port),B TST B INO C,(port) OUTO (port),C TST C
NOP NOP NOP NOP NOP NOP
1x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 1x
INO D,(port) OUTO (port),D TST D INO E,(port) OUTO (port),E TST E
NOP NOP NOP NOP NOP NOP
2x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 2x
INO H,(port) OUTO (port),H TST H INTO L,(port) OUTO (port),L TST L
NOP NOP NOP NOP
3x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 3x
TST (HL) INO A,(port) OUTO (port),A TST A
NEG
4x IN B,(BC) OUT (BC),B SBC HL,BC LD (addr),BC NEG RETN IM 0 LD I,A IN C,(BC) OUT (BC),C ADC HL,BC LD BC,(addr) RETI IM 0 LD R,A 4x
MLT BC
NEG
5x IN D,(BC) OUT (BC),D SBC HL,DE LD (addr),DE NEG RETN IM 1 LD A,I IN E,(BC) OUT(BC),E ADC HL,DE LD DE,(addr) RETI IM 2 LD A,R 5x
MLT DE
NEG NEG
6x IN D,(BC) OUT (BC),H SBC HL,HL LD (addr),HL RETN IM 0 RRD IN L,(BC) OUT (BC),L ADC HL,HL LD HL,(addr) RETI IM 0 RLD 6x
TST d8 MLT HL
NEG IM 1 NEG
7x IN F,(BC) OUT (BC),0 SBC HL,SP LD (addr),SP RETN NOP IN A,(BC) OUT (BC),A ADC HL,SP LD SP,(addr) RETI IM 2 NOP 7x
TSTIO port SLP MLT SP
NOP NOP
8x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 8x
OTIM OTDM
NOP NOP
9x NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP 9x
OTIMR OTDMR
Ax LDI CPI INI OUTI NOP NOP NOP NOP LDD CPD IND OUTD NOP NOP NOP NOP Ax
Bx LDIR CPIR INIR OTIR NOP NOP NOP NOP LDDR CPDR INDR OTDR NOP NOP NOP NOP Bx
Cx NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP Cx
Dx NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP Dx
Ex NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP Ex
Fx NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP Fx
ED x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF ED
CB x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF CB
0x RLC B RLC C RLC D RLC E RLC H RLC L RLC (HL) RLC A RRC B RRC C RRC D RRC E RRC H RRC L RRC (HL) RRC A 0x
1x RL B RL C RL D RL E RL H RL L RL (HL) RL A RR B RR C RR D RR E RR H RR L RR (HL) RR A 1x
2x SLA B SLA C SLA D SLA E SLA H SLA L SLA (HL) SLA A SRA B SRA C SRA D SRA E SRA H SRA L SRA (HL) SRA A 2x
3x SLA1 B SLA1 C SLA1 D SLA1 E SLA1 H SLA1 L SLA1 (HL) SLA1 A SRL B SRL C SRL D SRL E SRL H SRL L SRL (HL) SRL A 3x
4x BIT 0,B BIT 0,C BIT 0,D BIT 0,E BIT 0,H BIT 0,L BIT 0,(HL) BIT 0,A BIT 1,B BIT 1,C BIT 1,D BIT 1,E BIT 1,H BIT 1,L BIT 1,(HL) BIT 1,A 4x
5x BIT 2,B BIT 2,C BIT 2,D BIT 2,E BIT 2,H BIT 2,L BIT 2,(HL) BIT 2,A BIT 3,B BIT 3,C BIT 3,D BIT 3,E BIT 3,H BIT 3,L BIT 3,(HL) BIT 3,A 5x
6x BIT 4,B BIT 4,C BIT 4,D BIT 4,E BIT 4,H BIT 4,L BIT 4,(HL) BIT 4,A BIT 5,B BIT 5,C BIT 5,D BIT 5,E BIT 5,H BIT 5,L BIT 5,(HL) BIT 5,A 6x
7x BIT 6,B BIT 6,C BIT 6,D BIT 6,E BIT 6,H BIT 6,L BIT 6,(HL) BIT 6,A BIT 7,B BIT 7,C BIT 7,D BIT 7,E BIT 7,H BIT 7,L BIT 7,(HL) BIT 7,A 7x
8x RES 0,B RES 0,C RES 0,D RES 0,E RES 0,H RES 0,L RES 0,(HL) RES 0,A RES 1,B RES 1,C RES 1,D RES 1,E RES 1,H RES 1,L RES 1,(HL) RES 1,A 8x
9x RES 2,B RES 2,C RES 2,D RES 2,E RES 2,H RES 2,L RES 2,(HL) RES 2,A RES 3,B RES 3,C RES 3,D RES 3,E RES 3,H RES 3,L RES 3,(HL) RES 3,A 9x
Ax RES 4,B RES 4,C RES 4,D RES 4,E RES 4,H RES 4,L RES 4,(HL) RES 4,A RES 5,B RES 5,C RES 5,D RES 5,E RES 5,H RES 5,L RES 5,(HL) RES 5,A Ax
Bx RES 6,B RES 6,C RES 6,D RES 6,E RES 6,H RES 6,L RES 6,(HL) RES 6,A RES 7,B RES 7,C RES 7,D RES 7,E RES 7,H RES 7,L RES 7,(HL) RES 7,A Bx
Cx SET 0,B SET 0,C SET 0,D SET 0,E SET 0,H SET 0,L SET 0,(HL) SET 0,A SET 1,B SET 1,C SET 1,D SET 1,E SET 1,H SET 1,L SET 1,(HL) SET 1,A Cx
Dx SET 2,B SET 2,C SET 2,D SET 2,E SET 2,H SET 2,L SET 2,(HL) SET 2,A SET 3,B SET 3,C SET 3,D SET 3,E SET 3,H SET 3,L SET 3,(HL) SET 3,A Dx
Ex SET 4,B SET 4,C SET 4,D SET 4,E SET 4,H SET 4,L SET 4,(HL) SET 4,A SET 5,B SET 5,C SET 5,D SET 5,E SET 5,H SET 5,L SET 5,(HL) SET 5,A Ex
Fx SET 6,B SET 6,C SET 6,D SET 6,E SET 6,H SET 6,L SET 6,(HL) SET 6,A SET 7,B SET 7,C SET 7,D SET 7,E SET 7,H SET 7,L SET 7,(HL) SET 7,A Fx
CB x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF CB
DD x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF DD
0x NOP LD BC,d16 LD (BC),A INC BC INC B DEC B LD B,d8 RLCA EX AF,AF' ADD IX,BC LD A,(BC) DEC BC INC C DEC C LD C,d8 RRCA 0x
1x DJNZ disp LD DE,d16 LD (DE),A INC DE INC D DEC D LD D,d8 RLA JR disp ADD IX,DE LD A,(DE) DEC DE INC E DEC E LD E,d8 RRA 1x
2x JR NZ,disp LD IX,d16 LD (addr),IX INC IX INC IXH DEC IXH LD IXH,d8 DAA JR Z,disp ADD IX,IX LD IX,(addr) DEC IX INC IXL DEC IXL LD IXL,d8 CPL 2x
3x JR NC,disp LD SP,d16 LD (addr),A INC SP INC (IX+disp) DEC (IX+disp) LD (IX+disp),d8 SCF JR C,disp ADD IX,SP LD A,(addr) DEC SP INC A DEC A LD A,d8 CCF 3x
4x LD B,B LD B,C LD B,D LD B,E LD B,IXH LD B,IXL LD B,(IX+disp) LD B,A LD C,B LD C,C LD C,D LD C,E LD C,IXH LD C,IXL LD C,(IX+disp) LD C,A 4x
5x LD D,B LD D,C LD D,D LD D,E LD D,IXH LD D,IXL LD D,(IX+disp) LD D,A LD E,B LD E,C LD E,D LD E,E LD E,IXH LD E,IXL LD E,(IX+disp) LD E,A 5x
6x LD IXH,B LD IXH,C LD IXH,D LD IXH,E LD IXH,IXH LD IXH,IXL LD H,(IX+disp) LD IXH,A LD IXL,B LD IXL,C LD IXL,D LD IXL,E LD IXL,IXH LD IXL,IXL LD L,(IX+disp) LD IXL,A 6x
7x LD (IX+disp),B LD (IX+disp),C LD (IX+disp),D LD (IX+disp),E LD (IX+disp),H LD (IX+disp),L HALT LD (IX+disp),A LD A,B LD A,C LD A,D LD A,E LD A,IXH LD A,IXL LD A,(IX+disp) LD A,A 7x
8x ADD A,B ADD A,C ADD A,D ADD A,E ADD A,IXH ADD A,IXL ADD A,(IX+disp) ADD A,A ADC A,B ADC A,C ADC A,D ADC A,E ADC A,IXH ADC A,IXL ADC A,(IX+disp) ADC A,A 8x
9x SUB A,B SUB A,C SUB A,D SUB A,E SUB A,IXH SUB A,IXL SUB A,(IX+disp) SUB A,A SBC A,B SBC A,C SBC A,D SBC A,E SBC A,IXH SBC A,IXL SBC A,(IX+disp) SBC A,A 9x
Ax AND A,B AND A,C AND A,D AND A,E AND A,IXH AND A,IXL AND A,(IX+disp) AND A,A XOR A,B XOR A,C XOR A,D XOR A,E XOR A,IXH XOR A,IXL XOR A,(IX+disp) XOR A,A Ax
Bx OR A,B OR A,C OR A,D OR A,E OR A,IXH OR A,IXL OR A,(IX+disp) OR A,A CP A,B CP A,C CP A,D CP A,E CP A,IXH CP A,IXL CP A,(IX+disp) CP A,A Bx
Cx RET NZ POP BC JP NZ,addr JP addr CALL NZ,addr PUSH BC ADD A,d8 RST #0000 RET Z RET JP Z,addr D.II.6 CALL Z,addr CALL addr ADC A,d8 RST #0008 Cx
Dx RET NC POP DE JP NC,addr OUT (port),A CALL NC,addr PUSH DE SUB A,d8 RST #0010 RET C EXX JP C,addr IN A,(port) CALL C,addr D.II.4 SBC A,d8 RST #0018 Dx
Ex RET PO POP IX JP PO,addr EX (SP),IX CALL PO,addr PUSH IX AND A,d8 RST #0020 RET PE JP (IX) JP PE,addr EX DE,HL CALL PE,addr D.II.2 XOR A,d8 RST #0028 Ex
Fx RET P POP AF JP P,addr DI CALL P,addr PUSH AF OR A,d8 RST #0030 RET M LD SP,IX JP M,addr EI CALL M,addr D.II.5 CP A,d8 RST #0038 Fx
DD x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF DD
FD x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF FD
0x NOP LD BC,d16 LD (BC),A INC BC INC B DEC B LD B,d8 RLCA EX AF,AF' ADD IY,BC LD A,(BC) DEC BC INC C DEC C LD C,d8 RRCA 0x
1x DJNZ disp LD DE,d16 LD (DE),A INC DE INC D DEC D LD D,d8 RLA JR disp ADD IY,DE LD A,(DE) DEC DE INC E DEC E LD E,d8 RRA 1x
2x JR NZ,disp LD IY,d16 LD (addr),IY INC IY INC IYH DEC IYH LD IYH,d8 DAA JR Z,disp ADD IY,IY LD IY,(addr) DEC IY INC IYL DEC IYL LD IYL,d8 CPL 2x
3x JR NC,disp LD SP,d16 LD (addr),A INC SP INC (IY+disp) DEC (IY+disp) LD (IY+disp),d8 SCF JR C,disp ADD IY,SP LD A,(addr) DEC SP INC A DEC A LD A,d8 CCF 3x
4x LD B,B LD B,C LD B,D LD B,E LD B,IYH LD B,IYL LD B,(IY+disp) LD B,A LD C,B LD C,C LD C,D LD C,E LD C,IYH LD C,IYL LD C,(IY+disp) LD C,A 4x
5x LD D,B LD D,C LD D,D LD D,E LD D,IYH LD D,IYL LD D,(IY+disp) LD D,A LD E,B LD E,C LD E,D LD E,E LD E,IYH LD E,IYL LD E,(IY+disp) LD E,A 5x
6x LD IYH,B LD IYH,C LD IYH,D LD IYH,E LD IYH,IYH LD IYH,IYL LD H,(IY+disp) LD IYH,A LD IYL,B LD IYL,C LD IYL,D LD IYL,E LD IYL,IYH LD IYL,IYL LD L,(IY+disp) LD IYL,A 6x
7x LD (IY+disp),B LD (IY+disp),C LD (IY+disp),D LD (IY+disp),E LD (IY+disp),H LD (IY+disp),L HALT LD (IY+disp),A LD A,B LD A,C LD A,D LD A,E LD A,IYH LD A,IYL LD A,(IY+disp) LD A,A 7x
8x ADD A,B ADD A,C ADD A,D ADD A,E ADD A,IYH ADD A,IYL ADD A,(IY+disp) ADD A,A ADC A,B ADC A,C ADC A,D ADC A,E ADC A,IYH ADC A,IYL ADC A,(IY+disp) ADC A,A 8x
9x SUB A,B SUB A,C SUB A,D SUB A,E SUB A,IYH SUB A,IYL SUB A,(IY+disp) SUB A,A SBC A,B SBC A,C SBC A,D SBC A,E SBC A,IYH SBC A,IYL SBC A,(IY+disp) SBC A,A 9x
Ax AND A,B AND A,C AND A,D AND A,E AND A,IYH AND A,IYL AND A,(IY+disp) AND A,A XOR A,B XOR A,C XOR A,D XOR A,E XOR A,IYH XOR A,IYL XOR A,(IY+disp) XOR A,A Ax
Bx OR A,B OR A,C OR A,D OR A,E OR A,IYH OR A,IYL OR A,(IY+disp) OR A,A CP A,B CP A,C CP A,D CP A,E CP A,IYH CP A,IYL CP A,(IY+disp) CP A,A Bx
Cx RET NZ POP BC JP NZ,addr JP addr CALL NZ,addr PUSH BC ADD A,d8 RST #0000 RET Z RET JP Z,addr D.II.7 CALL Z,addr CALL addr ADC A,d8 RST #0008 Cx
Dx RET NC POP DE JP NC,addr OUT (port),A CALL NC,addr PUSH DE SUB A,d8 RST #0010 RET C EXX JP C,addr IN A,(port) CALL C,addr D.II.4 SBC A,d8 RST #0018 Dx
Ex RET PO POP IY JP PO,addr EX (SP),IY CALL PO,addr PUSH IY AND A,d8 RST #0020 RET PE JP (IY) JP PE,addr EX DE,HL CALL PE,addr D.II.2 XOR A,d8 RST #0028 Ex
Fx RET P POP AF JP P,addr DI CALL P,addr PUSH AF OR A,d8 RST #0030 RET M LD SP,IY JP M,addr EI CALL M,addr D.II.5 CP A,d8 RST #0038 Fx
FD x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF FD
DDCB x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF DDCB
RLC:B RLC:C RLC:D RLC:E RLC:H RLC:L RLC RLC:A RRC:B RRC:C RRC:D RRC:E RRC:H RRC:L RRC RRC:A
0x 0x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
RL:B RL:C RL:D RL:E RL:H RL:L RL RL:A RR:B RR:C RR:D RR:E RR:H RR:L RR RR:A
1x 1x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SLA:B SLA:C SLA:D SLA:E SLA:H SLA:L SLA SLA:A SRA:B SRA:C SRA:D SRA:E SRA:H SRA:L SRA SRA:A
2x 2x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SLL:B SLL:C SLL:D SLL:E SLL:H SLL:L SLL SLL:A SRL:B SRL:C SRL:D SRL:E SRL:H SRL:L SRL SRL:A
3x 3x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
BIT:B 0, BIT:C 0, BIT:D 0, BIT:E 0, BIT:H 0, BIT:L 0, BIT 0, BIT:A 0, BIT:B 1, BIT:C 1, BIT:D 1, BIT:E 1, BIT:H 1, BIT:L 1, BIT 1, BIT:A 1,
4x 4x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
BIT:B 2, BIT:C 2, BIT:D 2, BIT:E 2, BIT:H 2, BIT:L 2, BIT 2, BIT:A 2, BIT:B 3, BIT:C 3, BIT:D 3, BIT:E 3, BIT:H 3, BIT:L 3, BIT 3, BIT:A 3,
5x 5x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
BIT:B 4, BIT:C 4, BIT:D 4, BIT:E 4, BIT:H 4, BIT:L 4, BIT 4, BIT:A 4, BIT:B 5, BIT:C 5, BIT:D 5, BIT:E 5, BIT:H 5, BIT:L 5, BIT 5, BIT:A 5,
6x 6x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
BIT:B 6, BIT:C 6, BIT:D 6, BIT:E 6, BIT:H 6, BIT:L 6, BIT 6, BIT:A 6, BIT:B 7, BIT:C 7, BIT:D 7, BIT:E 7, BIT:H 7, BIT:L 7, BIT 7, BIT:A 7,
7x 7x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
RES:B 0, RES:C 0, RES:D 0, RES:E 0, RES:H 0, RES:L 0, RES 0, RES:A 0, RES:B 1, RES:C 1, RES:D 1, RES:E 1, RES:H 1, RES:L 1, RES 1, RES:A 1,
8x 8x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
RES:B 2, RES:C 2, RES:D 2, RES:E 2, RES:H 2, RES:L 2, RES 2, RES:A 2, RES:B 3, RES:C 3, RES:D 3, RES:E 3, RES:H 3, RES:L 3, RES 3, RES:A 3,
9x 9x
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
RES:B 4, RES:C 4, RES:D 4, RES:E 4, RES:H 4, RES:L 4, RES 4, RES:A 4, RES:B 5, RES:C 5, RES:D 5, RES:E 5, RES:H 5, RES:L 5, RES 5, RES:A 5,
Ax Ax
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
RES:B 6, RES:C 6, RES:D 6, RES:E 6, RES:H 6, RES:L 6, RES 6, RES:A 6, RES:B 7, RES:C 7, RES:D 7, RES:E 7, RES:H 7, RES:L 7, RES 7, RES:A 7,
Bx Bx
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SET:B 0, SET:C 0, SET:D 0, SET:E 0, SET:H 0, SET:L 0, SET 0, SET:A 0, SET:B 1, SET:C 1, SET:D 1, SET:E 1, SET:H 1, SET:L 1, SET 1, SET:A 1,
Cx Cx
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SET:B 2, SET:C 2, SET:D 2, SET:E 2, SET:H 2, SET:L 2, SET 2, SET:A 2, SET:B 3, SET:C 3, SET:D 3, SET:E 3, SET:H 3, SET:L 3, SET 3, SET:A 3,
Dx Dx
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SET:B 4, SET:C 4, SET:D 4, SET:E 4, SET:H 4, SET:L 4, SET 4, SET:A 4, SET:B 5, SET:C 5, SET:D 5, SET:E 5, SET:H 5, SET:L 5, SET 5, SET:A 5,
Ex Ex
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
SET:B 6, SET:C 6, SET:D 6, SET:E 6, SET:H 6, SET:L 6, SET 6, SET:A 6, SET:B 7, SET:C 7, SET:D 7, SET:E 7, SET:H 7, SET:L 7, SET 7, SET:A 7,
Fx Fx
(IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp) (IX+disp)
DDCB x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF DDCB
FDC FDC
x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
B B
RLC:B RLC:C RLC:D RLC:E RLC:H RLC:L RLC RLC:A RRC:B RRC:C RRC:D RRC:E RRC:H RRC:L RRC RRC:A
0x 0x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
RL:B RL:C RL:D RL:E RL:H RL:L RL RL:A RR:B RR:C RR:D RR:E RR:H RR:L RR RR:A
1x 1x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SLA:B SLA:C SLA:D SLA:E SLA:H SLA:L SLA SLA:A SRA:B SRA:C SRA:D SRA:E SRA:H SRA:L SRA SRA:A
2x 2x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SLL:B SLL:C SLL:D SLL:E SLL:H SLL:L SLL SLL:A SRL:B SRL:C SRL:D SRL:E SRL:H SRL:L SRL SRL:A
3x 3x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
BIT:B 0, BIT:C 0, BIT:D 0, BIT:E 0, BIT:H 0, BIT:L 0, BIT 0, BIT:A 0, BIT:B 1, BIT:C 1, BIT:D 1, BIT:E 1, BIT:H 1, BIT:L 1, BIT 1, BIT:A 1,
4x 4x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
BIT:B 2, BIT:C 2, BIT:D 2, BIT:E 2, BIT:H 2, BIT:L 2, BIT 2, BIT:A 2, BIT:B 3, BIT:C 3, BIT:D 3, BIT:E 3, BIT:H 3, BIT:L 3, BIT 3, BIT:A 3,
5x 5x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
BIT:B 4, BIT:C 4, BIT:D 4, BIT:E 4, BIT:H 4, BIT:L 4, BIT 4, BIT:A 4, BIT:B 5, BIT:C 5, BIT:D 5, BIT:E 5, BIT:H 5, BIT:L 5, BIT 5, BIT:A 5,
6x 6x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
BIT:B 6, BIT:C 6, BIT:D 6, BIT:E 6, BIT:H 6, BIT:L 6, BIT 6, BIT:A 6, BIT:B 7, BIT:C 7, BIT:D 7, BIT:E 7, BIT:H 7, BIT:L 7, BIT 7, BIT:A 7,
7x 7x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
RES:B 0, RES:C 0, RES:D 0, RES:E 0, RES:H 0, RES:L 0, RES 0, RES:A 0, RES:B 1, RES:C 1, RES:D 1, RES:E 1, RES:H 1, RES:L 1, RES 1, RES:A 1,
8x 8x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
RES:B 2, RES:C 2, RES:D 2, RES:E 2, RES:H 2, RES:L 2, RES 2, RES:A 2, RES:B 3, RES:C 3, RES:D 3, RES:E 3, RES:H 3, RES:L 3, RES 3, RES:A 3,
9x 9x
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
RES:B 4, RES:C 4, RES:D 4, RES:E 4, RES:H 4, RES:L 4, RES 4, RES:A 4, RES:B 5, RES:C 5, RES:D 5, RES:E 5, RES:H 5, RES:L 5, RES 5, RES:A 5,
Ax Ax
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
RES:B 6, RES:C 6, RES:D 6, RES:E 6, RES:H 6, RES:L 6, RES 6, RES:A 6, RES:B 7, RES:C 7, RES:D 7, RES:E 7, RES:H 7, RES:L 7, RES 7, RES:A 7,
Bx Bx
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SET:B 0, SET:C 0, SET:D 0, SET:E 0, SET:H 0, SET:L 0, SET 0, SET:A 0, SET:B 1, SET:C 1, SET:D 1, SET:E 1, SET:H 1, SET:L 1, SET 1, SET:A 1,
Cx Cx
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SET:B 2, SET:C 2, SET:D 2, SET:E 2, SET:H 2, SET:L 2, SET 2, SET:A 2, SET:B 3, SET:C 3, SET:D 3, SET:E 3, SET:H 3, SET:L 3, SET 3, SET:A 3,
Dx Dx
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SET:B 4, SET:C 4, SET:D 4, SET:E 4, SET:H 4, SET:L 4, SET 4, SET:A 4, SET:B 5, SET:C 5, SET:D 5, SET:E 5, SET:H 5, SET:L 5, SET 5, SET:A 5,
Ex Ex
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
SET:B 6, SET:C 6, SET:D 6, SET:E 6, SET:H 6, SET:L 6, SET 6, SET:A 6, SET:B 7, SET:C 7, SET:D 7, SET:E 7, SET:H 7, SET:L 7, SET 7, SET:A 7,
Fx Fx
(IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp) (IY+disp)
FDC FDC
x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
B B
7 6 5 4 3 2 1 0
F S Z 5 H 3 P/V N C
LD A,R 0 IFF2 0
LD A,I 0 IFF2 0
To know state of IFF2
To know state of IFF2