OPEN CARD.

PRTR
MVC PRINT•BLANK

PAGE HEADI

UNPK PAGEFR.PAGEPK SET UP

MVZ PAGEPR+2 ( 1 ) , PAC-EPR
PUTPR
AP
ZAP
PRTR .PRHEAD.WSP2
PAGEPK ,=P* 1•
LIN£PK,=P'0#

MAIN PRCCESS ING ROUTINE

UflGE
GET CARD .CARDIN READ RECORD
CLC ACC IN.PRE V NEW ACCOUNT < PREV ACCT?
SL RIOSEQER YES - CANCEL JOB

PACK VARPK.BUDGETIN PACK BUDGET A

PACK ACTPK,ACTUAL IN ACTUAL AMOUNTS
SP VARPK,ACTPK CALCULATE VARIANCE
BNM B20 IS VARIANCE NEGATIVE?
MV I VARCUT + 7 » C' -• YES - INSERT SIGN

CP VARPK,=P*-500.00* VARIANCE > 500.00 NEGATIVE?

BNL 820 NO - BYPASS .. *■
MVC MESSAGOT,=C*GVER LIMIT' YES - PRINT WARNING

MVC ACCOT,ACCIN MOVE ACCOUNT NO. TO PRINT AREA

UNPK VAROUT.VARPK UNPACK VARIANCE INTO PRINT AREA

MVZ VAR0UT+6C1).VAROUT+5 CORRECT ZONE IN UNITS POSITION
MVC BUDGCUT.BUDGET IN MOVE BUDGET TO PRINT AREA
ZAP ACTPK.ACTPK IS ACTUAL NEGATIVE?
BNM B3C NO - BYPASS

MVC ACTOUT•ACTUALIN MOVE ACTUAL EXPENSE

MVZ ACTOUT4-5(1) .ACTOUT-*-4 CORRECT ZONE IN UNITS POSITION
PUTPR PRTR.PRI NT , WSP 1 PRINT ACCOUNT
MVC PRINT.BLANK CLEAR PRINT AREA

AP LINEPK,=P»1'
CP LINEPK.-P*10*
BL bioread
'
a A10HEAD
Diagnostics, registers, operations, and much more
in this auth.oritative handhotflc/reference.
PR[]GRF«ME
ASSEMBLER
LANGUAGE
PETER ABEL
ASSEMBLER programmers are always in
great demand because of their expertise in
understanding machine language and intri¬
cate computer operations. While other high-
level languages sometimes mask how com¬
puters accomplish tasks, ASSEMBLER bears
a close relationship with machine language.
ASSEMBLER is often more efficient than
other languages, providing an alternative to
such languages as COBOL or PL/1.
PROGRAMMING ASSEMBLER LANG¬
UAGE is a concise, detailed analysis of this
challenging language. It looks at all the im¬
portant strengths of the language, and high¬
lights the capabilities and usages that pro¬
grammers find so technically interesting.
Each chapter covers a separate area of
ASSEMBLER and includes sample programs,
end-of-chapter exercises, and debugging tips
to help newcomers to ASSEMBLER develop
effective programming strategy. Programming
assignments allow experimentation with the
language, and technical notes clarify details.
After completing the first three chapters,
the user can study the more advanced topics
in any sequence. This flexible design makes
PROGRAMMING ASSEMBLER LANG¬
UAGE valuable both as an introduction to the
language and as a technical reference later
on. The advanced topics include writing
macros, subprograms and overlays, operating
systems, and floating-point operations, all
extremely important considerations for the
technically ambitious programmer. This ad¬
vanced section presents these challenging
areas in clear, easy-to-understand terms that
promote fast learning.

(continued on the bach flap)

PROGRAMMING
ASSEMBLER
LANGUAGE
 Digitized by the Internet Archive
in 2018 with funding from
Kahle/Austin Foundation

https://archive.org/details/programmingassemOOOOabel
PROGRAMMING
ASSEMBLER
LANGUAGE

Peter Abel
British Columbia Institute of Technology

RESTON PUBLISHING COMPANY, INC.

Reston, Virginia
A Prentice-Hall Company
Library of Congress Cataloging in Publication Data

Abel, Peter
Programming assembler language.

Includes index.
1. Assembler language (Computer program language)
2. IBM 360 (Computer)—Programming. 3. IBM 370
(Computer)—Programming. I. Title.
QA76.73.A8A23 001.6'424 79-255
ISBN 0-8359-5658-X

© 1979 by
Reston Publishing Company, Inc.
A Prentice-Hall Company
Reston, Virginia 22090

All rights reserved. No part of this book may be

reproduced in any way, or by any means,
without permission in writing from the
publisher.

10 98765432

Printed in the United States of America.

CONTENTS

PREFACE
ACKNOWLEDGMENT

PART I INTRODUCTION TO THE COMPUTER

AND THE ASSEMBLER

0 BASIC COMPUTER CONCEPTS 3

Introduction, 3
The Computer System, 4
Input/Output Devices, 6
Binary Number System, 8
Bits and Bytes, 9
S/360 and S/370 Organization, 10
Operating Systems and the Supervisor, 13
Hexadecimal Representation, 14
Problems, 1 5

1 THE ASSEMBLER 17
Languages, 1 7
The Assembler, 18
The Assembler Coding Sheet, 21
Assembler Instruction Statements, 24
The Assembler Card, 26
Coding Conventions, 26
The Assembled Program Listing, 29
Assembler Diagnostic Messages, 30
Problems, 32

2 PROGRAM EXECUTION 34
Program Execution Statements, 34
Condition Code, 38
VI CONTENTS

Input Data, 40
Flowchart Logic, 44
Job Control, 47
Problems, 47

PART II BASIC ASSEMBLER CODING

3 PROGRAMMING FOR CHARACTER DATA
Declaratives, 51
Character Instructions, 58
Storage-to-Storage Format, 58
Move Characters—MVC, 58
Compare Logical Character—CLC, 62
Storage Immediate Format, 65
Literals, 66
Equate Symbol—EQU, 68
Sample Program—Read and Print Customer Records, 69
Debugging Tips, 73
Problems, 73

4 DECIMAL DATA AND ARITHMETIC 1

Flexadecimal Constants, 76
Move Numeric (MVN) and Move Zones (MVZ), 77
Zoned Decimal Data, 78
Packed Decimal Data, 80
Packed Operations, 82
Formatting the Print Area, 90
Sample Program—Budget Statement, 91
Debugging Tips, 96
Problems, 98

5 DECIMAL ARITHMETIC II
Editing—ED, 101
Multiply Packed—MP, 106
Move With Offset—MVO, 108
Divide Packed—DP, 110
Sample Program—Inventory Update, 113
ORG—Set Location Counter, 119
PDUMP—Partial Dump of Main Storage, 121
Debugging Tips, 123
Problems, 123
VII CONTENTS

BASE REGISTERS AND INSTRUCTION

FORMAT
The General Purpose Registers, 126
Base Register Addressing, 127
Instruction Format, 130
Control Sections, 135
Assigning Base Registers, 136
Loading the Base Register, 137
OS Initialization, 139
Technical Note Re: BCR and BC, 141
Debugging Tips, 142
Problems, 142

7 INPUT AND OUTPUT 144

Input/Output Control System, 145
Imperative Macros, 146
The DOS DTF File Definition Macro, 150
The OS DCB File Definition Macro, 153
Locate Mode, 156
Device Independence Under DOS, 158
Abnormal Termination, 160
Debugging Tips, 160
Problems, 161

8 STRATEGY, STYLE, AND STANDARDS 162

Programming Objectives, 162
Subroutines and Linkage, 163
Programming Style, 166
Program Documentation, 167
Debugging Tips, 1 82
Problems, 182

PART III BINARY OPERATIONS

9 REGISTERS AND BINARY PROGRAMMING 185
Binary Data Representation, 186
Binary Constants, 187
Conversion of Decimal and Binary Data—CVB and CVD, 191
Loading Registers—L, LH, LR, LM, LA, 192
Store Register Operations—ST, STH, STM, 196
Binary Arithmetic—A, S, AH, SH, AR, SR, 198
Binary Comparison—C, CH, CR, 199
Multiplication—M, MH, MR, 201
VIII CONTENTS

Register Shift Instructions, 203

Binary Division—D, DR, 205
Conversion of Double-Precision Binary to Decimal Format, 208
Sample Partial Program—Finance Charge Rebates, 210
Debugging Tips, 210
Problems, 212

10 EXPLICIT USE OF BASE REGISTERS 213

Operations Explicitly Using Base Registers, 215
Tables, 218
Direct Table Addressing, 224
Sorting Data in Storage, 226
Binary Search, 227
Sample Program—Calculate Stock Value, 227
Debugging Tips, 234
Problems, 235

11 LOGICAL OPERATIONS AND BIT

MANIPULATION 237
Logical Operations, 237
Boolean Logic, 241
Other Operations, 244
Binary Operations—Summary, 255
Problems, 255

PART IV EXTERNAL STORAGE

12 MAGNETIC TAPE 259
Uses of Magnetic Tape, 260
Magnetic Tape Characteristics, 260
DOS Tape Programming Example—Creating a Tape File, 262
OS Coding for Magnetic Tape, 265
Tape File Organization, 265
IOCS For Magnetic Tape, 270
Variable Length Records, 272
Problems, 276

13 DIRECT ACCESS STORAGE 277

DASD Characteristics, 278
File Organization, 282
DOS Programming Example—Creating a Sequential
Disk File, 282
OS Program Examples, 284
IX CONTENTS

Disk Labels, 284

Indexed Sequential File Organization, 287
Processing DOS Indexed Sequential Files, 290
Processing OS Indexed Sequential Files, 296
Problems, 299

PART V ADVANCED TOPICS

14 MACRO WRITING 303
Writing Macros, 304
Conditional Assembly Instructions, 310
Other Instructions, 313
Set Symbols, 314
System Variable Symbols, 319
Global Set Symbols, 320
Extended Example—Table Look-Up Macro, 321
Problems, 322

15 SUBPROGRAMS AND OVERLAYS 323

CSECT—Control Section, 323
DSECT—Dummy Section, 324
Subprogram Linkage, 326
Linking Two Control Sections, 329
Passing Parameters, 331
Linking Phases, 333
Overlay Considerations, 338
Problems, 339

16 OPERATING SYSTEMS 340

Operating Systems, 340
The Supervisor, 344
The Program Status Word—PSW, 347
Interrupts, 348
Channels, 350
Physical IOCS, 353
Problems, 355

17 FLOATING-POINT OPERATIONS 357

Floating-Point Formats, 357
Declaratives, 362
Floating-Point Registers, 363
Floating-Point Instructions, 364
Conversion From Packed to Float, 374
X CONTENTS

Conversion From Float to Packed, 374

Problems, 376

APPENDICES
A HEXADECIMAL AND DECIMAL
CONVERSION 377

B PROGRAM INTERRUPTS BY CODE 379

C 360/370 INSTRUCTION SET 382

D DOS AND OS JOB CONTROL 384

E SPECIAL MACROS: IN IT, PUTPR, DEFCD,

DEFPR, EOJ 388

INDEX 392
PREFACE

Assembler language is the fundamental "low-level” language of the IBM 360 and
370 computers. As such, it is directly translatable into machine language; thus, one
Assembler instruction typically generates one machine code instruction. "High-
level languages like COBOL and PL/I are easier to learn. Why then an emphasis on
learning Assembler language? An understanding of Assembler language can help the
programmer in a number of ways:

— A knowledge of Assembler can facilitate learning of any other language, includ¬

ing "high-level" languages and other assembly languages. And with a back¬
ground in Assembler, the user can more clearly understand what the computer is
doing.
— A knowledge of Assembler can help the programmer become more efficient.
High-level languages like COBOL and PL/I can be deceptive, and appear to
execute in some mysterious fashion. A programmer familiar with Assembler can
code high-level languages with an understanding of what machine code they
generate, and what is the more efficient technique. For example, why in COBOL
does the use of COMPUTATIONAL, COMPUTATIONAL-3, and SYNC have con¬
siderable effect on the program's efficiency? What is the significance in PL/I of
Decimal Fixed, Aligned, and Defined? With knowledge of Assembler, a pro¬
grammer can examine the generated code to determine more efficient ways to
write certain routines.
— Although most high-level languages provide extensive debugging aids, there are
times when the programmer needs to delve into the generated machine code or
examine storage dumps.
— Programs written in Assembler may be considerably more efficient in storage
space and execute-time, a useful consideration if such programs are run fre¬
quently.
— Some advanced areas, such as technical support and telecommunications, re¬
quire an extensive knowledge of Assembler.

Although the material in this text has been used successfully as an introduction
to programming, most educational institutes would not teach Assembler as an intro¬
ductory language. Generally, the concepts of logic and programming style are easier
to learn when there is less need for concern with rigorous rules and field sizes. The
text does not, however, assume that the reader has had much, if any, programming
experience. The approach of the text is to introduce simple processing using card

xi
XII PREFACE

input and printer output, first with character data only, and then with simple decimal
arithmetic, all by Chapter 4. In this way, packed (decimal) data and editing are
introduced early, and the user is soon writing quite realistic programs.
The book should provide both a practical guide for the Assembler student and
also may act subsequently as a useful reference. These two objectives are accom¬
plished by:

1. A step-by-step progression of material, from simple processing through to com¬

plex. There are many practical examples of complete and partial programs to
illustrate concepts as they are introduced.
2. Chapters organized by logical topics, such as character data, packed, binary,
input/output. The user can concentrate on mastering one programming area at a
time, and most related material is contained in its own chapter.

The complexities of base/displacement addressing and file definition are de¬

layed through use of several simple macros, similar to those used in many colleges.
The text drops these macros by Chapters 6 and 7, where the technical material is
covered in detail. Appendix E provides a listing of the macros for those who want to
catalogue them on their own system.
The two major IBM operating systems are DOS and OS. The text covers the
differences between them, giving examples for both.
It is possible to proceed through the text by several routes. Chapters 0 through 3
are fundamental, and the normal steps would be to continue sequentially with dec¬
imal arithmetic in Chapters 4 and 5. It is recommended next to cover the important
material in Chapter 6 on base/displacement addressing and the instruction format,
and then the elements of input/output in Chapter 7. By this point the user should be
capable of coding some quite advanced programs. Chapter 8 on Programming
Strategy could be covered in part or total, perhaps the sooner the better to get the user
into subroutine logic. Following Chapter 8, the chapters need not all be covered
sequentially. The following diagram indicates related chapters in boxes that may be
taken in any sequence following Chapters 6 and 7:

6, 7
c =5= zn
8 9, 10, 11,17 12, 13 14 16

Chapters 9, 10, and 11 develop related material on processing binary data. Chapter
12 on Magnetic Tape introduces basic material required for an understanding of Disk
Storage in Chapter 13. To complete Chapter 14 (Macro Writing) would require some
familiarity with the material in Chapter 9. Anyone interested in linking separately
assembled programs could attempt Chapter 15 directly after Chapter 7, perhaps
referencing Chapter 9 for some basic binary operations. Chapter 16 on Operating
Systems is presented for general useful information, although not entirely related to
Assembler programming as such.
XIII PREFACE

Among the users of earlier versions of this text, many have worked ahead of the
course, experimenting with binary operations, macro writing, and subprogram link¬
age. Such motivation is certainly commendable and should be encouraged.
The IBM manuals concerned with the material in this text require a bookshelf
about five feet wide. Readers should not expect, therefore, that this or any other
single book will provide all there is to know about the Assembler language and
related topics. Eventually the IBM manuals have to be referenced for current detailed
information. The following IBM manuals or their equivalent are especially recom¬
mended:

IBM FORM TITLE

GA22-7000 IBM System/370 Principles of Operation. (370 system organization,

machine instructions, input/output.)
GC33-401 0 OS/VS-DOS/VS-VM/370 Assembler Language. (Assembler statements
and macros.)
GC33-5373 DOS/VS Supervisor and Input/Output Macros.
GC28-6646 OS Supervisor Services and Macro Instructions.
GC26-3746 OS Data Management Services Guide.
GC26-3794 OS Data Management Macro Instructions.

Other useful manuals include those on Job Control, disk file organization, tape
labels, disk labels, and the operating system.

Peter Abel
.
ACKNOWLEDGMENT

The author is grateful for the assistance from all those who contributed typing,
reviews, and suggestions, and to IBM for permission to reproduce some of their
copyrighted materials. The following materials are printed with permission, and with
modifications from publications copyrighted in 1966, 1970, 1972, 1973, and 1974
by International Business Machines Corporation as IBM form numbers GA22-7000,
GX20-1 850 and GC20-1 649: Figures 2-2, 1 3-2, 1 6-3, Appendix A, and Appendix C.

xv
 PART I

INTRODUCTION TO
THE COMPUTER AND
THE ASSEMBLER
 CHAPTER 0

BASIC COMPUTER
CONCEPTS

INTRODUCTION

This chapter discusses computer concepts and systems in general terms, then intro¬
duces basic technical detail concerned specifically with the 360 and 370 computers.
The three main areas are general computer systems, binary number system, and
360/370 organization.
The first generation of computers was introduced in the early 1950s. These
computers were characterized by many vacuum tubes and relatively slow processing
speed. The second generation, introduced in 1957-1958, used transistorized cir¬
cuitry that permitted smaller size, higher speed storage, and lower costs. Finally, the
third generation computers, introduced in the early 1960s, replaced the tran¬
sistorized computers with integrated circuits. These computers featured higher
speeds, greater storage capacity, and more facilities.
IBM introduced System/360, a third generation computer, in 1964 to replace
and to improve upon a variety of then existing IBM computers. Some had been
specialized for business applications, others for scientific purposes. The 360 pro¬
vided a single computer designed to serve effectively in both fields. The 360 (and
computers of other manufacturers) provided many other advantages over the second

3
4 BASIC COMPUTER CONCEPTS

generation computers. First, its performance was considerably faster. Second, it had a
greater size and capacity for performing more functions. These characteristics ena¬
bled the computer to handle larger and more complex applications. Finally, the 360
had the ability to expand. IBM adopted a building block concept to enable the user to
increase the size of computer storage without always requiring a different computer.
Similarly, because the programming languages were standardized for 360 models,
little reprogramming was required when transferring to a larger system.
An important feature of the 360 (and of many other computers) was its super¬
visor capability. It contained a control program that permitted error recovery, storing
of programs and data on disk storage or magnetic tape for subsequent processing,
continuous job processing with limited operator intervention, and multiprogramming
(concurrent processing of several data processing jobs).
In 1970 IBM introduced System/370 with significant improvement in comput¬
ing performance over the 360. Although the 370 has some additional instructions
and capabilities, it was designed for compatibility with the 360, with the same
languages and control programs. This text cavers differences where applicable.
In 1977, the 370 was further extended into a more complex processor system:
the 3031, 3032, and 3033. In 1979, IBM announced the 4300 series. Through all
the various improvements, the basic Assembler language remains the same.

THE COMPUTER SYSTEM

Although computers have evolved radically since the 1940s, and although there are
many manufacturers and models, their basic structure remains the same. Figure 0-1
illustrates the four main components: input/output, storage, arithmetic/logic, and
control. Arithmetic/logic and control together form what is called the Central Pro¬
cessing Unit (CPU).

FIGURE 0-1 Basic computer components.

5 The Computer System

INPUT/OUTPUT. The computer must be able to access new data. The computer
reads data into its storage from such input devices as card readers and magnetic
tape. Also, because the computer must communicate its results to the user, it
writes” data from storage onto such devices as printers and tape.

STORAGE, OR MEMORY. We write a program using computer instructions to

solve a specific problem. The program consists of instructions (such as read, add, and
compare) and data (numbers used in calculations, and areas to develop answers and
to read input data). The instructions and.data area may be on punched cards which
are read (loaded) into the computer storage. This program in storage is the stored
program that reads input data, makes calculations, and writes output according to the
program instructions. Another program loaded in storage can replace the previous
program to work on a different problem and data. Figure 0-2 depicts a layout of
instructions and data areas.

Instructions
T-

Main Data area I Input area Areas may be anywhere in storage,

-»-L--
storage Output area I in any sequence.
_I

Unused

FIGURE 0-2 Simplified map of main storage.

The size of storage varies considerably by computer model, from as little as a

few thousand storage positions to millions. Storage size in an installation depends
generally on the volume of data and the complexity of the problems. Each storage
location is numbered, the first position being zero, the second number one, etc. An
instruction may require only a few locations. An area for data may require from one
position to hundreds.
Here is a simple example using an imaginary computer. We are to add the
number '005' to '125'. Assume the '005' is in locations 1 338, 1 339, and 1340, and
that the '125' is in locations 1263, 1264, and 1265:

1 2 5 0 0 5
storage location: 1263 f 1 265 1338f 1340
1264 1339

Assume that an add operation is the letter 'A'. The instruction to add the contents of
locations 1338-1340 to the contents of locations 1263-1265 could be:
A 1 2 6 3 1 3 3 8 . (The 360/370 work similarly to this.) Locations
1263-1265 now contain '1 30'. Locations 1338-1340 still contain '005', unchanged
by the add operation. This instruction would itself require nine storage locations
consisting of three parts. A is the operation, telling the computer what function
6 BASIC COMPUTER CONCEPTS

to perform; '1263' and '1338' are respectively operand-1 and operand-2 that
specify which storage positions to process.

CENTRAL PROCESSING UNIT.

ARITHMETIC/LOGIC. In order to solve problems, the computer must be able to

perform arithmetic and make decisions.

ARITHMETIC. Computers add and subtract, and most can multiply and divide.
With these basic functions, the computer can be programmed to perform, for exam¬
ple, square roots, trigonometric functions, and calculus.

LOGIC. A program generally must make tests and comparisons. For example, does
a divisor have a zero value? If so, then a division cannot be performed. Is a value
negative? If so, we cannot calculate its square root. Similarly, we may have to check
if a value is greater than, less than, or equal to another. The ability to make such
decisions is the computer logic.

CONTROL. The computer requires a component to control its actions. The control
device that performs this function does the following:

— Causes the computer to execute each instruction in the stored program, step-by-
step. Typically, each instruction is stored and executed one after another, such as
"Read”, "Add", "Move", "Print".
— Involves control of the input/output devices.
— Handles the transfer of data between storage positions.
— Handles the transfer of data between storage and arithmetic/logic.

The time required to transfer data is known as access time. Access time is measured
in thousandths of a second, millionths (microseconds), or even billionths
(nanoseconds). The number and type of input/output devices, the size of storage, the
type and complexity of arithmetic/logic circuitry, and the access time vary consider¬
ably by computer model.

INPUT/OUTPUT DEVICES

There are many types of input/output devices, of various capacities and speeds. This
section discusses the two basic common ones, the card reader and the printer. Later
chapters cover magnetic tape and disk storage devices.

THE PUNCHED CARD. A common source of input data is the punched card. The
card represents data by means of small rectangular holes punched by a keypunch
machine. The holes in the card, when read by a card reader, are translated into
electrical impulses and transferred into storage.
7 Input/Output Devices

The punched card normally has 80 vertical columns (numbered columns 1

through 80) for storing data. (Other systems may use different card sizes.) Each
column represents one character of data by means of the punched holes in any of its
twelve horizontal rows. The rows are numbered as in Figure 0-3. Digits 0 through 9
are punched as a single hole, from row 0 through row 9. Alphabetic and special
characters are punched with multiple holes: the 0-9 numeric rows and the zone
rows, 10, 11 and 12. (Note that the numeric row 0 is the same as zone row 10.) For
example, the letter A in column 1 6 consists of zone 12 and numeric 1.

CN 0123456789ABCDEFGHIJkLMNOPQRS TUVUXYZtrj $. -+_><&> ; ! < ax* <./

i/i i— -- Minim I I II I I
O '~ -- MIIMMI I I I I I I
N O | 0 0 0 3 0 0 0 0 0 0 0 0 G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11111111 |oooo|ooo|ooo|ooooo|oo|oocnooooooonQooooooo
I : ■ 4 5 6 7 8 9 10 11 12 13 M 15 16 17 18 19 20 :i 22 /3 24 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 45 4? 43 44 45 40 4? 48 49 50 51 5? 53 54 55 56 57 58 59 bO b! 6? 63-64 C. 06 07 W G9 70 II U IS M 1'j Jb ’/ R /0 HO

II n it 1111| n n 1111 ■ i ii 111 ii ii n i n 1111 ii n h n i ii 111 n ii ii |n ii ii ii i v i ii 11 in it

22|22222222|22222222|2222222|222222222222222|22|22222|22222222222222222222222222
I 333|33333333|33333333|3333333|333333||||3333333333333333333333333333333333333333
CD
4444|44444444|44444444|4444444|444444444444444444444444 ■ III 444444444444444444444

o 5 5 5 5 5 | 5 5 5 5 5 5 5 5 1 5 5 5 5 5 5 5 5 | 5 5 5 5 5 5 5 1 5 5 5 5 5 5 5 5 5 5 || 5 5 5 5 5 1 5 5 5 5 1 5 5 5 5 5 5 S 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
o'
666666|66666666|6666G666|6666666|666G6666|6666|6|6B6|66666GS6C36S6G6G66S666GGSB6

/777777|77777777|77777777|7777777|777?777777777777||7777777777777/7777777777777?

x88g8888|888868B8|88888888|8888888|8||||8||||8|||||||||||||888388383388888S88888

999999999|99999339|99999999|9999999|999999999999999999999993399999S9939999993999
7 J « 5 K I » 0 '0 II ’’ •' ‘ ■« ’• •« >9 7C ?' 22 23 7* 75 26 27 78 29 30 31 32 33 34 35 36 37 3B 39 «0 *1 42 43'',M5 46 4/ 48 4'J SO 51 52 53 54 55 56 57 58 OS 60 61 6; C3 64 60 6bGi 13 G9 70 I) U 73 74 75 75 77 78 79 HO

FIGURE 0-3 Punched cards featuring keypunch codes.

A field is one or more related columns. A record consists of one or more fields.
The card itself is a record of data, and may be subdivided into fields. Some fields
contain alphabetic data, such as customer name. Other fields contain numeric data,
such as an invoice amount. (A field such as address may contain alphameric data,
mixed alphabetic and numeric.) Not all card columns need be defined or punched.
Fields may contain subfields: a date field could contain subfields month, day, and
year.
A minus sign indicates that a field has a negative value. In data processing, the
minus sign is usually an 11 -zone punch over the units position of the amount field.
For example, if an amount field in columns 63-67 is minus, we punch an 11 -zone in
column 67.
The punched card serves two main purposes:

1. To record programs.
2. To record data. Information for data processing is supplied to the keypunch
department on source documents. Examples are customer payments, sales, and
employee hours worked. These data are punched according to a predesigned
card format. The cards are then submitted as input to the computer department for
processing.
8 BASIC COMPUTER CONCEPTS

A group of records (card, tape, or disk) that contains related information is

called a file, or data set.

THE PRINTER. There are many different types of printers, but all have certain
common features. They print at speeds ranging from a few hundred to several
thousand lines per minute. Many can print 60 or more different characters, including
the numbers 0 through 9, letters A through Z, and various characters such as $, #, *,
and + . Typical printers print 10 characters to the inch, and 1 20, 1 32, or 160 charac¬
ters on a line.
The paper used for printing is called continuous forms. The forms are perfo¬
rated horizontally so that each sheet may be separated after printing. Manufacturers
supply the forms in various widths, such as 11" and 15", and lengths such as 8V2".
This length at six lines per inch permits up to 60 lines of print per page. It is available
in single-part, or, with carbon inserts, two or more parts. The forms may be pre¬
printed according to the user's design (e.g., customer bills), or they may contain only
horizontal lines or bars {"stock tab" forms or "continuous printout").

BINARY NUMBER SYSTEM

Binary numbers provide the basic numbering system of computers. Whereas a dec¬
imal (base 10) number has ten digits, a binary (base 2) number has two: 0 and 1. For
both decimal and binary, the position of the digit determines the value. Consider the
decimal number 1111:

decimal 1111

= (1 xIO3) + (1 xIO2) + (1 xIO1) + (1 x 10°)

-1000 +100 + 10 + 1

Whereas a decimal number uses the base of ten, a binary number uses the base of
two. Consider the same number, 1111, this time expressed as binary:

binary 1111

- decimal (1 x23) + (1 x22) + (1 X21) + (1 x2°)

= 8 + 4 + 2 + 1 = 15 (or 24-1)

As another example, the value of the decimal number 1010 is determined as:

decimal 1010

= (1 XIO3) + (0x102) + (1 X101) + (0X10°)

= 1000 + 0 + 10 + 0
9 Bits and Bytes

A decimal digit zero as shown has no value, nor has a binary digit zero. The number
1010 expressed in binary is:

binary 1010

= decimal (1 x23) + (0x22) + (1 X21) + (0x2°)

= 8 + 0+2+0 = 10 (decimal)

Through the use of digits 0 and 1, binary numbers can represent any decimal value.
For example, the binary number 101101 equals:

25 + 04 + 23 + 22 + 01 + 2°
= decimal 32 + 0 + 8 + 4 + 0+1 =45

A binary value may also have a binary point, equivalent to the decimal point. We
calculate a binary number with a point such as 101.1101 as:

22 + 01 + °+
2 2'1 + 2-2 + O-3 + 2~4

= 4 + 0 + 1+ -^+-^ + -^ + y4

= 4 + 1 +| + |+o + ^
= 5 + .5 + .25 + .0625

= 5.8125

Later chapters cover binary representation and binary arithmetic in detail.

BITS AND BYTES

In computer terminology, a binary digit is called for short a "bit". A storage location
consists of a specified number of bits, and can be related to binary digits, since a
computer bit can be OFF (zero) or ON (one). The number of bits in a storage location
varies by computer (the 360 and 370 use nine bits). Assume a storage position that
contains five bits. Four bits represent data and the other is a parity bit:

bits:
value: p 8 4 2 1 one storage location
contents: 0 0 0 0 0 with five bits

r
Parity
Data
10 BASIC COMPUTER CONCEPTS

In the diagram, each bit is indicated by a 'O', with the binary value of the bit
above it. Each bit can contain the value 0 or 1, so if the bit numbered 1 on the right is
ON, the contents of the byte are 00001, and the value is 1. If only bit 2 (second from
the right) is ON, the contents are 00010, and the value is 2. Both bits 1 and 2 ON
(00011) represent 3, and combinations of ON bits provide values 1 through 9. All bits
OFF means zero.
The bit on the left is the parity bit. The typical storage location must have "odd
parity"; the number of bits ON must always be an odd number. For example, the
value in a location is 7; bits 4, 2, and 1 are ON. Because this is an odd number of
bits, the computer sets the parity bit OFF:

p 8 4 2 1
0 0 1 1 1 value = 7, odd parity

Assume that the value in a location is 9: bits 8 and 1 are ON. To force odd
parity, the computer sets the parity bit ON:

P 8 4 2 1
1 0 1 value = 9, parity bit ON for odd parity
JL o

Setting bits ON and OFF is entirely an automatic process over which we have
no control. When processing the contents of a location, the computer automatically
checks the parity. If the parity is not odd, the computer circuitry may require servic¬
ing; the computer signals a warning to the operator and may stop processing.
On the 360/370, the configuration in a storage location (a "byte") is eight data
bits and one parity bit. A hardware malfunction such as losing odd parity causes a
"machine interrupt", as explained in Chapter 16.

S/360 AND S/370 ORGANIZATION

As Figure 0-1 illustrated, the computer system consists of the following units: the
Central Processing Unit (CPU), which contains the arithmetic/logic unit and the
control section, input and output devices and facilities, and Main Storage or Mem¬
ory. In addition, the 360 and 370 have a special unit called general purpose registers
that serve such purposes as arithmetic and addressing. Most 360s and all 370s have
as well floating-point registers that perform floating-point arithmetic. Another fea¬
ture, Program Status Word (PSW), controls the sequence of instructions executed by
the program and records the current status of the program. The next sections briefly
describe the CPU, Input/Output, Storage, the general registers, and the PSW.

THE CENTRAL PROCESSING UNIT (CPU). The CPU is the control center of the
360/370 computer system. It consists of two sections: control and arithmetic/logic,
and provides facilities for the following features:
11 S/360 and S/370 Organization

1. Addressing of main storage locations.

2. Accessing data from storage and storing data in storage.
3. Arithmetic and logical processing of data.
— Arithmetic operations (add, subtract, multiply, and divide) can be performed
on data in three different formats: ordinary decimal (packed), fixed-point
binary, and floating-point. This text covers each format.
— Logic operations include comparing, testing, translating of characters, and
editing (sign and punctuation control).
4. Executing instructions in main storage in the required sequence.
5. Initiating communications between main storage and the input/output (I/O) de¬
vices.

INPUT AND OUTPUT (I/O) DEVICES. There are various models of each input/
output device, providing different capabilities and I/O speeds. Disk and magnetic
tape supply external data storage of practically unlimited capacity. Among the I/O
devices that most 360 and 370 models may use are:

DEVICE INPUT OUTPUT TYPICAL USES

Direct Access Storage X X Large external storage of data.

Devices (Disk & Drum)
Magnetic Ink Character X Processing checks in banks.
Readers (MICR)
Magnetic Tape X X Large external storage of data.
Manual Controls X X Communication between the com¬
(console typewriter) puter operating system and the
human operator.
Optical Readers X Reading bills printed by a computer,
and cash register tapes.
Printers X Printing reports, programs, and diag¬
nostic messages.
Punched Card Devices X X Reading and punching the common
punched card.
Visual Display Terminals X X Used to enter data into the computer
from a remote location, and to
make inquiries.

MAIN STORAGE. Each 1,024 storage positions is called IK. Addressable storage
varies from a minimum of 8,192 (8K) locations to a maximum of 16,777,216
(16,384K).

BITS. Storage on the 360 is composed of ring-shaped magnetized ferrite cores, each
of which is a bit. The cores may be magnitized clockwise as ON and assigned the
value one, or magnetized counterclockwise as OFF and assigned the value zero.
Combinations of bits represent the various digits and characters used in computer
processing. 370 data is stored in small ''chips” called monolithic circuits.
12 BASIC COMPUTER CONCEPTS

BYTES. The basic building block of main storage is the byte, which represents a
single storage location. Each byte consists of nine bits. Eight bits represent data. The
ninth is the parity bit to ensure odd parity, and is not a programming consideration.
The eight data bits are “split” into two portions of four bits (half-bytes), a zone and a
numeric portion:

Byte The value represented in a byte varies from zero

VS-byte ’/2-byte (all bits OFF, 0000 0000) through 255 (all bits ON,
bits: 0 0 0 0 0 0 0 0 1111 1111). The CPU normally executes a program
by accessing bytes or groups of bytes.
00

value: 4 2 1 8 4 2 1
portion: zone numeric

Bytes serve different purposes and may represent:

'I. Instructions. A 360/370 instruction is always 2, 4, or 6 bytes, depending on the

type of instruction. Every instruction begins on an even-numbered storage loca¬
tion.
2. Data. Although some instructions can access bits or half-bytes, we consider the
byte the smallest data length. We may define data so that it is represented
in bytes in various formats:

Character Format. A character field (such as the letters A through Z, the numbers 1
through 9, and special characters as $ or * or &) requires one byte for each
character. The eight bits in a byte can represent 256 (28) possible characters. For
example, the ON bits 1100 0001 represent the letter A. The character code is
called the "extended binary-coded-decimal-interchange code" (EBCDIC).
Decimal, or Packed, Format. For ordinary decimal arithmetic, the digits 0 through 9
are "packed" two digits per byte. For example, the digits 4 and 7 appear in a
byte as the bits 0100 0111. Whereas a character 'V requires a full byte
(11110001), a packed digit 'V uses a half-byte (0001).
Binary Format. For binary arithmetic, addressing, and special features, each bit rep¬
resents a binary 0 or 1. The binary value 01000111 equals the decimal value 71.
Floating-Point Format. Used to represent extremely small or large values.

GENERAL PURPOSE REGISTERS. The 360 and 370 have 16 general purpose reg¬
isters (GPR's), numbered 0 through 1 5. Instead of being part of main storage, they are
special circuitry. Each register consists of 32 bits. The two main uses of registers are:

1. Addressing storage positions, by means of “base displacement addressing." Every

reference to a location in main storage is by means of a “base address" in a
register and a “displacement" from that address.
2. Performing binary arithmetic in the registers, done at extremely high speed.
13 Operating Systems and the Supervisor

PROGRAM STATUS WORD (PSW). The Program Status Word (PSW) is a 64-bit
hardware feature in the control section of the CPU. The PSW contains the current
status of the computer and controls the sequence of instructions being executed.
One PSW feature important to the programmer is the 2-bit "condition code"
that indicates the result of an arithmetic test (minus/zero/plus) or a logical compari¬
son (low/equal/high). Another field, the 24-bit "instruction address" contains the
address of the next instruction to be executed.

OPERATING SYSTEMS AND THE SUPERVISOR

Computer manufacturers supply various programs (software) to support the computer

system. These programs include language translators such as Assembler, COBOL,
and PL/I, and "utility” programs to facilitate disk and tape processing. Except for the
smallest models, the 360 and 370 are supplied with a set of related programs called
an "operating system" to provide for preparation and execution of the user's pro¬
grams and to minimize operator intervention. The two major IBM operating systems
are Disk Operating System (DOS) for medium-sized users, and Operating System
(OS) for large users. The operating system programs are stored on disk (or tape), and
the heart of the operating system, the Supervisor, is at all times stored in the lower
part of the computer's main storage, as indicated in Figure 0-4.

IBM
supervisor
program
Main
storage
User
program(s)

FIGURE 0-4 Supervisor and user programs.

Among the functions of the Supervisor are:

_ Determine the sequence in which programs will be executed.

_ "Loading" a program into main storage prior to its execution.
_ Generally control and coordinate the various programs being executed.
— Handle all input/output operations.
— Provide error message and error recovery where possible.

Both the programmer and the computer operator can request the Supervisor to
perform certain actions. For example, if we want the system to "assemble" a pro-
14 BASIC COMPUTER CONCEPTS

gram, we can enter a job control statement such as //EXEC ASSEMBLY that tells the
Supervisor to arrange for the assembling of the program following.

PROGRAM INTERRUPTION. The Program Status Word contains bits that record
the status of the program. Among these conditions are bits to record “program
interrupts." An interrupt occurs when our program asks the Supervisor to perform
some special task, such as input/output. Basically, our program is "interrupted," and
control is passed to the Supervisor program. An interrupt also occurs, for example,
when a serious processing error occurs—such as invalid data in an arithmetic opera¬
tion. The Supervisor may have to "flush" the interrupted program and resume pro¬
cessing with the next job.

HEXADECIMAL REPRESENTATION

A hexadecimal numbering system uses base-1 6. Hexadecimal (or hex) numbers are 0
tnrough 9 and A through F, for the decimal values 0-15. We use hexadecimal
numbers to represent the contents of storage. Hexadecimal is only a representation of
storage—at no time does the computer actually work in base-16 as such. One hex
digit depicts four bits of a byte, and two hex digits represent all eight bits in a byte.
Figure 0-5 lists the equivalent decimal, binary, and hexadecimal numbers.

Decimal Binary Hexadecimal Decimal Binary Hexadecimal

0 0000 0 8 1000 8
1 0001 1 9 1001 9
2 0010 2 10 1010 A
3 0011 3 11 1011 B
4 0100 4 12 1100 C
5 0101 5 13 1101 D
6 0110 6 14 1110 E
7 0111 7 15 1111 F

FIGURE 0-5 Decimal, binary, and hex representation.

Two hex digits can represent the contents of any storage location, regardless of
the data format that it contains. For example, a byte contains the character 'A'. The
binary representation of A in main storage is 1100 0001, and the hex representation
of this is 'Clor as commonly notated, X'CI'. Thus, if an input record contains an 'A'
in a certain position, when read into storage, it appears in a byte as 1100 0001, and
we can represent its contents as either character A or as hex 'Cl'.
Since there are 256 possible bit configurations in a byte, there is no way to
represent each possibility as a single character (there are only about 60 different print
characters). Assume that a byte contains the packed digits 4 and 5. The binary
representation of the byte's contents is 0100 0101. There is no single character that
can represent this 8-bit code, but we can represent it with two hex digits as X'45'.
15 Problems

A byte used for binary data could contain 0101 1011 (which equals decimal
value 91). The hexadecimal representation is X'5B'. In this way, hex format can
represent all 360/370 formats, such as character, packed, and binary, one hex digit
for each half-byte (four bits). The computer Supervisor and the Assembler both use
hex extensively to represent the contents of storage, although only the programmer
knows that the specific contents of bytes and fields are in a particular format. Among
the uses of hexadecimal format are:

1. The Assembler converts source code to object code. It prints the locations of
instructions and their object code entirely in hex format.
2. To facilitate tracing program errors, we can instruct the Supervisor to print a
"storage dump". The dump prints the contents of storage, two hex digits per byte.
3. Some special purpose characters, for example, control the printer carriage (spac¬
ing lines, skipping to a new page), and "edit” data fields with punctuation and
sign (as $1,250.00CR). Many of these special characters are bit configurations that
cannot be printed. We can represent them, however, in our Assembler program
with hex numbers.

Since the Supervisor and the Assembler print storage addresses in hex, a
knowledge of hexadecimalarithmetic is quite useful (and so would be 1 6 fingers for
doing it). Note how X'F' overflows when we add 1:

DECIMAL VALUE HEX VALUE

15 F
+_2 +_L
16 10

Thus, X'l 0' equals the decimal value 1 6. Also, note that X'5' + X'5' = X'A', and X'8'
+ X'8' = X'l O'. The following examples illustrate more hex addition:

X'21' X'385' X'412A' X'53A6'

+ 15 + 385 + 94 + 924y
X'36' X'70A' X'41 BE' X'5CDO'

Appendix A provides conversion of hexadecimal numbers to decimal, and

decimal to hex, a useful reference. Understanding hex notation is extremely impor¬
tant in Assembler programming, and you are urged to grasp it fully.

Now complete the remaining problems in this chapter.

PROBLEMS

0-1. What are the basic components of a digital computer? What is the function of
each one?
0-2. Distinguish between instructions and data.
16 BASIC COMPUTER CONCEPTS

0-3. What holes are punched in a card for the letters READ?
0-4. Define the following: (a) Stored program; (b) Access time; (c) Field; (d) Re¬
cord; (e) File, or data set; (f) Alphameric data.
0-5. What is the decimal value of binary (a) 1110; (b) 11001; (c) 101101?
0-6. What is a "bit"? What is a bit's relationship to a "byte"?
0-7. The left four bits of a byte are the_portion; the right four bits are
the-portion. The ninth bit is called_; what is its purpose?
0-8. What are the two main purposes of the general registers?
0-9. What is the purpose of an "operating system"?
0-10. Where is the Supervisor stored? What are its main functions?
0-11. What is a "program interrupt"?
0-12. What action does the system take when a serious processing error occurs?
0-13. What is the purpose of hexadecimal representation?
0-14. Give the hexadecimal representation for the following binary values: (a) 1110'
(b) 01 01 1101; (c) 1011 0011; (d) 11 11 001 0 11 00 111 0.
0-15. Convert the following decimal values to hexadecimal (refer to Appendix Al¬
la) 10; (b) 16; (c) 24; (d) 32; (e) 275; (f) 2048; (g) 4096.
0-16. Convert the following hex values to decimal: (a) F; (b) 10- (c) 2D' (d) 4F- Ip)
80; (f) 800; (g) 1000. ' K [
0-17. Add the following hex values: (a) 24 + 6; (b) 3A +7; (c) AAA + 555- (d) FFF +
1; (e) 437B + 2A4B.
 CHAPTER 1

THE ASSEMBLER

The previous chapter examined the computer organization and its "hardware" fea¬
tures. This chapter covers the Assembler program, a "software" feature, and the
requirements for coding and assembling a program in Basic Assembler Language.
This text recommends standard coding practices, such as naming conventions for
fields and files, in order to make computer programs more comprehensible and more
easily maintained.

LANGUAGES

The 360/370 come equipped with a set of executable machine instructions similar
for all models. Instructions include the ability to read input data, move data in
storage, add and subtract the contents of storage locations, compare, and print data
records.

MACHINE LANGUAGE. The 360/370 execute only instructions that are in

machine language. The Supervisor must enter or "load" these instructions into main
storage where they become the "stored program". Each storage location (byte) has a

17
18 THE ASSEMBLER

unique numeric address; the "operands” of the machine language instructions refer¬
ence the addresses of storage locations by their number. On the earliest computers,
programmers coded at this basic level. On the 360/370 and most other current
computers, however, coding in machine language is far too complex.

SYMBOLIC LANGUAGE. Because of the complexity of machine language, pro¬

grammers code in "symbolic languages”. These are special languages the manufac¬
turers design to facilitate program coding. An earlier example showed a hypothetical
machine instruction A 1263 1 338 that adds the contents of storage locations 1 338-
1340 to those of 1263-1265. Such an instruction could be coded in a symbolic
language like Assembler as ADD ACCUM,AMOUNT. We then use a translator
program such as Assembler, COBOL, PL/I or FORTRAN to translate the operation
(ADD) into a machine code instruction and the symbolic addresses to machine
language addresses.

THE ASSEMBLER

Basic Assembler Language (BAL) with which this text deals is the fundamental 360/
370 language. It is reasonably standardized for all models. Although we code pro¬
grams in symbolic Assembler language, the computer cannot execute such instruc¬
tions. The Assembler translator program is required to "assemble” or translate the
symbolic language into computer machine language.

PROGRAMMING STEPS. The following explains the steps in programming, from

coding through assembling and testing.

CODING. We code the source program in symbolic language on special Assem¬

bler coding sheets. The program consists of Assembler instructions and data areas.

KEYING. These sheets are then keyed onto punched cards, or onto disk via a
terminal.

ASSEMBLY. We ask the Supervisor (through a job control statement) to assemble

the source program, and the Supervisor loads the Assembler program from disk into
main storage. The Assembler program then reads our source program as data into the
computer. The Assembler program performs the following:

— Accounts for the amount of storage required for each instruction and each data
area, and assigns storage locations to them in the sequence in which they are
coded.

— Supplies messages for programming errors, such as the invalid use of an instruc¬
tion and spelling errors.

— Includes any required routines that are written in Assembler language and are
catalogued on disk.
19 The Assembler

— Prints the original symbolic coding and the translated machine language on a
printed form. This print-out is necessary to "debug” the program and to make
subsequent changes.
— Writes the machine language object program onto an output device such as a
card punch, disk, or tape, for use when the program is to be executed.

The Assembler uses a location counter to account for the length of each data
field and instruction. If the Assembler has just assigned a 4-byte instruction starting at
location 10,024, the location counter now contains 10,028, the starting address of
the next instruction. The Assembler always assigns the address to the leftmost byte of
a data area or constant.

ERROR CHECKING. We correct any errors that the Assembler signals, reassemble
the program and execute it using test data. The Assembler cannot recognize errors in
our program logic—these errors we must find through testing and "debugging”.

ADDRESSING. The first storage location is numbered zero, with subsequent bytes
numbered consecutively. Therefore, a size of 16,384 has addresses numbered zero
through 1 6,383. (Note that 1 K = 1024 bytes.) Addressing is done by means of the
rightmost 24 bits of a register. These 24 bits provide a capacity of 224 or 16,777,21 6
addressable bytes of storage. Machine language uses a two-address system for ad¬
dressing. It consists of:

1. A base register (any available general purpose register). The base register contains
the beginning address of an area in storage used by the program, and provides a
reference point for the next 4096 bytes. The program requires one base register for
each 4096 bytes used.
2. A displacement, or the number of bytes from zero to 4095, from the first byte of
the area to which the base register points.

At this point, it is not necessary to understand base/displacement addressing,

and a full discussion will be given in a later chapter.
When we code an Assembler program, we do not know, or need to know,
where in storage our instructions and addresses will be. We code in symbolic lan¬
guage, assigning names to the various instructions and data fields. For example, an
instruction may have the name A1 OREAD, and an accumulator to count the number
of pages printed may be called PAGECTR. The name we give refers only to a single
storage location, the leftmost byte of the field. For example, the contents of PAGECTR
may be three bytes long, and the Assembler assigns it to locations 10516, 10517, and
10518. A reference to PAGECTR is to a three-byte field beginning in location 10516:

PAGECTR

t t t
10516 10517 10518
20 THE ASSEMBLER

RELATIVE ADDRESSING. We may reference a storage position relative to a sym¬

bolic address. For example, we define an area of 80 bytes called CARDIN for reading
and storing 80-column cards. The name CARDIN refers to the first byte of the area.
We may reference the second byte as CARDIN +1, the third byte as CARDIN + 2, and
the 80th as CARDIN + 79:

80 bytes

t t
CARDIN CARDIN + 79
CARDIN + 1

Any location in main storage can be referenced by similar relative addressing.

INSTRUCTION FORMAT. The Assembler translates our symbolic instructions into

machine-language object instructions, with correct format and length. The Assem¬
bler aligns the first byte of every instruction on an even-numbered storage location.
When the computer executes a machine-language instruction, it accesses the
operation-code from storage, and recognizes from the operation-code the format and
the length of the instruction. There are five basic instruction formats, with instruction
lengths of two, four, and six bytes. The operation code (such as Add, Subtract, Move)
in machine-language is always the first byte, therefore providing for 256 possible
op-codes. (The 370 has a sixth type, called S-format, that has a two-byte operation
code.) The instruction usually contains one or more operands. Typically, an operand
is a reference to a storage location or a register. Data may be transferred between
registers, between registers and storage, or between storage locations.
The five main instruction formats are RR (Register-to-Register), RX (Register-to-
Indexed Storage), RS (Register-to-Storage), SI (Storage Immediate), and SS (Storage-
to-Storage), as shown in Figure 1-1. The 370 has a special sixth one called S-format.

Length
in bytes Format Typical use

2 RR Register-to-Register Data movement

between registers.
4 RX Register-to-lndexed Data movement between
Storage a register and storage.
4 RS Register-to-Storage Data movement between
a register and storage.
4 SI Storage Immediate Data movement from one-byte constant
in the instruction to storage.
6 SS Storage-to-Storage Data movement between two
areas in storage.

FIGURE 1-1 Assembler instruction formats.

For example, an RR format instruction, AR, can be used to add the contents of
register-8 to register-6. It is coded in Assembler language as:
21 The Assembler Coding Sheet

^AR
operation code 'operand-2
operand-1

The machine language code for AR is XT A'. The Assembler translates the symbolic
instruction to two bytes of object code, in hexadecimal as ITAl68l. The object code
for operands that reference storage-is more complex because the Assembler converts
their addresses to base/displacement format, explained in Chapter 6.

MACRO INSTRUCTIONS. Assembler is a "low-level" language—that is, close to

machine-language level. The Assembler translates one symbolic instruction into
one machine-language instruction. But there is provision for macro instructions,
specially written instructions that the Assembler recognizes. Depending on its re¬
quirements, the macro causes the Assembler to generate one or more machine-
language instructions. IBM supplies macros to facilitate Supervisor and input/output
operations, for example, CALL, GET, RETURN. In contrast to the low-level Assembler
language are "high-level" languages such as COBOL, FORTRAN, and PL/I which we
code entirely with macro instructions.

THE ASSEMBLER CODING SHEET

Figure 1-2 depicts the IBM Assembler coding sheet, Form GX09-0010, used for the
coding of Assembler programs. The coding on the form is strictly illustrative, and is
not intended to be understandable at this time. The space at the top of the form for
the program name, programmer name, date, and page number should be completed
on each page. There are 80 columns for punching onto the standard 80-column card.
Some characters that are written alike may be key-punched incorrectly. Al¬
though there is no universal standard, the following conventions may be used to
distinguish among certain easily confused characters:

— Code the digit zero as 0, and the letter O as 0 (some use the opposite conven¬
tion).
— Code the digit one and the letter I clearly.
— Code the letter Z as Z to distinguish it from the digit 2.
— There is often confusion between the digit 5 and the letter S, between the left
parenthesis ('(') and the letter C, and between the letters U and V.
— Where not otherwise clear, indicate a blank position byt>.

The Assembler accepts coding that is "free-form"; that is, although the form has
predefined columns for Name, Operation, and Operand, we do not have to code
these fields in the defined columns. Flowever, there is little need to vary from the
 c fN C o Q 0 Q D c C c c) c c c
0 0 V. U 2 vfl T~ 0- o vl r- 6.9 Q
0 0 0 0 o 0 o 0 o T- -n -- •*■ i ■*-j 0 0 c
j . -r-
o o 0 0 0 0 0 0 0 0 0 0 c C 0 ’-
1 e b h
V- h e b e p b b i— b e e b b
| co V] <j] 10 00 (/ to 01 v s VI VI V
H H H H e e P e h H e e e b H p e
a
-J •u - -J -u -J - L -J - -J -J - _
A

A
U
H
-j b
2
bl
b P
0- V
£■ <
J3 O
<v b
A b
-O 00 X
b lu
0- Uj <; >
Uj
O' <t b a
Uj P 'b 2
-J 5? d \r~ Ui
co 5 H UJ 1 a cl oc Uj 1
8 t UJ Uj P l H 1
y LU tU S <1 l •© 1
i •< Pi
< z VI H U) l d P P b 1
5 3
VJ _J O X H 1 H 1
IBM System/360 Assembler Coding Form

<r *U 1 ■< f) . X I
t
H b l ~D 1
z h^bl b
o2 Uj b p 2 l UJ z I
z~ Q
_J H H H Z) l X D 1
0- > \ * V P l -© V l
il
t H 0/1 0- -Rj, 1 S' ffj IS] l
? <sz t 1 1
*< • OsT 1 & 1
X z
X 5 Ijj H t t 1
o i l 1
J- l h 1 \ 0 1
CNJ t l 1
<2 1 H l > _l 1
s; l H P 1 H ■H 1
zi
MJ I V to el l A U. M t
i t/J 1 P U) 1
> H » 4 < l c 5 u_ 1
Uj i A Q l 0 1
vfet -J I P 1 4 Nb 1 l
■iS- i tin Ui 1 r 1
A, ■2 l Uj 3: X 1 > o H u. 1
r t b

Assembler coding sheet.

i P 'il -Uh J M Cjo Ui 1
< H I 2 p 1 A P 1
b • H < 4 1 <2 o 4 1
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22
23 The Assembler Coding Sheet

defined columns, and there is a need for standardized, legible programs. The exam¬
ples in this text use only the defined columns.

CODING FORMAT. There are three types of coding statements:

1. Instructions, such as add and compare, that provide the program logic for execu¬
tion.
2. Declaratives, such as accumulators and constants, used by instructions.
3. Comments, used as documentation to make the program clearer. They do not
become part of the machine-language code.

The fields on the coding sheet are described as follows:

COLUMN

1 -8 NAME. We assign a name to each instruction and declarative that we intend

to reference in the program. In Figure 1-2, for example, A1 OREAD is the
name of an instruction. The rules governing the name (or label) are:
— The name that defines the address of an instruction or declarative must be
unique in the program—defined only once.
— The name may be one to eight characters long. The first character must be
a letter A through Z (and $, #, or although these are not recom¬
mended). Remaining characters may be letters or digits, as A1 OREAD.
The name may not contain any blank characters.
— There must be at least one blank position between the name and the next
field, Operation.
If column 1 is blank, the Assembler assumes that the instruction or declara¬
tive has no name; Figure 1-2 shows many such unnamed instructions. If
column 1 contains an asterisk (*), the Assembler assumes that the entire line
is a comment—see Figure 1-2.
10-14 OPERATION. This is the symbolic (mnemonic) operation code for an in¬
struction, declarative or macro. The Assembler must be able to recognize it.
Figure 1 -2 shows operations such as TITLE and PRINT. There must be at least
one blank position between Operation and the next field, Operand.
16-71 OPERAND. The operand identifies data on which the operation is to act.
Depending on the operation, there may be none, one, or more operands.
A comma separates each operand, with no blank spaces either within operands
or between them; the Assembler assumes that a blank ends the operands. In
the following, Name is A20ADD, Operation is AP (add), and Operand is
ACCUM,FIVE.

oper¬
name ation operand erand_,
column: 1 '0 ^6 operand-2
I
A20ADD AP ACCUM,FIVE
no blanks
24 THE ASSEMBLER

Comments may be indicated for an entire line by an asterisk in column 1.

They may also appear on a line following an instruction, with at least one blank
between the operand and the comment. The coding in Figure 1-2 aligns
comments beginning in column 41 for readability and to facilitate keypunch¬
ing. For example:

column: 10 16 comments

MP HOURS,RATE CALCULATE WAGE

COLUMN
72 CONTINUATION. Operands and comments may not continue past column
71. If more columns are required, then we must do the following:
— Code any character in column 72. This text uses a plus ( + ) sign.
— Continue coding the statement on the next line beginning in column 1 6.
The first statement in Figure 1-2, TITLE, illustrates continuation. Depend¬
ing on the Assembler version, one or more continuations are permitted.
73-80 IDENTIFICATION SEQUENCE. We may optionally use this field to identify
the program—a recommended practice. A useful identification sequence is
as follows. Columns 73-76 contain the program identification, such as P023
for Payroll program 023. Columns 77-80 contain a card sequence number. If
the sequence numbers are consecutive, then we cannot insert additional
instructions between them. Therefore, a good practice is to number the se¬
quence in intervals of ten, such as 0010, 0020, 0030. Major program sections
may begin with a value such as 1000 or 2000.
We may force the Assembler to check the sequence of card columns
73-80 by coding an Assembler card with the instruction ISEQ (Input Se¬
quence Checking), discussed in the section Assembler Instruction Statements.

ASSEMBLER INSTRUCTION STATEMENTS

The Assembler translates instructions such as AP (Add) or MVC (Move) into

machine-language executable code. Others, such as DC, LTORG, START, and TITLE,
the Assembler recognizes as requests to perform certain operations during assembly.
The Assembler acts on them during the assembly and generates no executable code.

NAME OPERATION OPERAND

[symbol] TITLE 1-100 characters, within apostrophes
omit EJECT blank
omit SPACE blank or a number
omit PRINT one, two, or three operands
omit ISEQ blank, or 2 digits of the form, /, r
omit END blank or a symbol
25 Assembler Instruction Statements

TITLE. The purpose of TITLE is to identify the assembly listing and the object card
deck (if any). See Figure 1-2 for an example. The name field may be omitted. If it is
present, the Assembler punches the first four characters into columns 73-76 of the
object program card deck, if any.
The operand field is enclosed in apostrophes to denote the start and end of the
title. It contains any descriptive title that we want printed at the top of each page of
the Assembler listing (see the top line of Figure 1-4). The maximum length is 100
characters. But, if the title exceeds 56 characters, we must code a continuation
character in column 72, and continue the title on the next line in column 16. An
apostrophe or ampersand used in the operand must be coded as two apostrophes or
ampersands. The Assembler stores and prints only one. Example: TITLE 'JEAN &&
SAM"S PROGRAM'.

EJECT. After printing a full page, the Assembler automatically ejects to the top of
the next page. EHowever, we may want to eject the page before it is fully printed, for
example, to print the declaratives or the start of a new major routine. We code EJECT,
causing the Assembler to start a new page for the listing.

SPACE. The SPACE instruction tells the Assembler to space one or more blank lines
on the listing. We code the number of lines to be spaced in the operand. If we leave
the operand blank, the Assembler assumes a space of one line:

Column 10 16
SPACE Space 1 line
SPACE 1 Space 1 line
SPACE 2 Space 2 lines
SPACE 3 Space 3 lines

Note: The Assembler acts on EJECT and SPACE but does not print them.
It does, however, increment the statement (STMT) number on the listing;
see, for example, missing statement number 73 in Figure 1-4.

PRINT. This instruction controls the general format of the program listing. It con¬
tains any or all of the following three operands, in any sequence. The common
requirement is PRINT ON,NOGEN,NODATA.

ON Print the program listing from this point on.

OFF Do not print the listing.
GEN Print all statements generated by macro instructions.
NOGEN Suppress statements generated by macros. In Figure 2-1, OPEN is a
macro; its generated code is seldom of value, so we normally suppress it.
26 THE ASSEMBLER

DATA Print the full hexadecimal contents of constants (on the left side of the
listing, under OBJECT CODE).
NODATA Print only the leftmost 8 bytes, or 16 hex digits. We normally code
NODATA because the full hex printed contents of constants are of little
value.

ISEQ. This instruction causes the Assembler to sequence-check the input source
cards. The operands / and r specify the leftmost and rightmost card columns of the
field being checked. The field is normally the "Identification Sequence" between
columns 73 and 80, and the instruction is coded as ISEQ 73,80, as shown in the
example coding. Since each card checked must contain a higher sequence value
than the previous one, low, equal, or blank fields cause error messages. ISEQ with a
blank operand will terminate sequence-checking.

END. The END instruction must be the last statement of the program. It causes
termination of the program's assembly. We may code the operand with a symbolic
address, such as END PROG02. The operand PROG02 in this case designates an
address in the program to which control is to transfer when the program is loaded for
execution. Thus, the address is that of the program's normal first executable instruc¬
tion.
Remember that these instructions simply tell the Assembler how to handle the
program, and generate no machine code. This section provides the most commonly
required information. The Assembler manual contains more detail on these instruc¬
tions. Later chapters cover other instructions, such as EQU, LTORG ORG and
USING.

THE ASSEMBLER CARD

Figure 1 -3 shows the IBM Assembler card (one of the cards punched from the coding
sheet in Figure 1-2). The cards are punched column for column, one card for each
line. Since the operators who punch the cards are normally unfamiliar with Assem¬
bler language, we must code clearly and neatly. Unclear printing causes many
programming errors.

CODING CONVENTIONS

This text uses certain clear and meaningful conventions to define the names of fields
and instructions.

DECLARATIVE NAMES. A declarative is a nonexecutable instruction that defines

constants, counters, input/output areas, etc. There are two types:
27 Coding Conventions

MVC PRIN^+10(^0) »CfjRDIN | |MDVE |CARD |CDNTE]MTS T|D PRI|NT LIST016q

operpAjh II I I II MraJo ANO COMdAdtII I I ( f (
OPERATlrf
■ill *1 ■ J | OPERAND 1 ( w~
OPERATION
WKTTKATCIW
000000000 0 0 0 0 0 0 0 0 [0 0 (0 0 [Floo o¥o o¥ oooooTofo o o o oTo o (o olo o o o o]o o oTo 0 ( (0 (|e 0 0 0 0 0T0 0 0 0 oodlol
1 1 1 4 1 I 1 I It II I! 11 ID II 11 II I! ID n u n it ii it ii H n m|ii h u H u « 37 14 n 4I|4I 47 41 44 45 a di 1111 ii 11 11 11 M 11 51 57 51 50 H tl 11 11 U II it 1111 n n 11 71 74 75 ft II It 70 10
111111111 I1111 11111 1 (1 1 1 I 1 1 I It I 1 1 1 I II I AJ/ 1111 1(111 Mill 11111 Mill 11 11 II MMl(ll

222222232 222222 2 2 2 2 2 2 2 2 2 2 22222222222222 222222222 2 2 2 2 2 2 2(22 2 2 2 2 2 222222 22(22222

333333333 3 3 13 3 3 3333(33333 3 3 ((3 3 3 3 3 3 3 3 3 3 3 3 3 3 (3 3 3 3 3 3(3 3 (3 3 ( 3 3 3 3 3 3(3333 33(3333

44444444 4|44444 4 4 4 4 4 4 4 4 4 4 444444(4444444 >^4 4 4 4 4 4 4 (4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 444444 44444444

55555555 55(5555 5 5 5 (5 5 5 5 (5 5(555555(55555 5 ( ( 5 5 5 5 5 5 5 5 ( 5 (( 5 5 5 5 5 5 5 5 5 (55555 55555555

00666660 6666666 6 6 6 6 6 (6 6 6 6 66666666666666 (6 6 6 6 6 6 6 6 6(666 6 6 6 6 6 (6 6 6 6 666666 666666(6

U 13 J 7 7 I J ) 7 J J 7 777717777 77717777777777 7 7 7 7 7777777777 7 7 7 7 7 7 7 (? 7 777777 7! 7 7 7 7 7 7

(8 8(IS((S 8 I I M I I I 6 8 8 8 8 8 8 6 8 8 8 9 8 8 8 8 8 6 8 8 0 8

99990909 999999 9 9((9 9 9 9 9 9 9 9 9 9 9 ) (9(0 9 9 9 9 9 9 9 9 9 9 9(99 9 9 9 9 9 9 9 9 9 9 9 9 9 II 999999 9(999999

] * i t i t 9 10 II 17 <: u lb 17 13 19 70 71 77 71 74 75 70 71 TO 71 » » 11 II ID 47 4} 44 45 40 47 41 40 SI 11 H ID ii M II 11 H ID tl 07 63 64 65| tt 67 68 SO 70 II 73 14 15 )6 17 '? "i 00,

FIGURE 1-3 The Assembler card.

DEFINE STORAGE, DS. DS defines an area of storage within the program, such as
an inputyoutput area. When the program first executes, the contents of a DS are
unpredictable, and could contain any “garbage." The instruction CARDIN DS CL80
defines a field called CARDIN, character format, length 80 bytes. Each time a record
reads into this area, it erases the previous contents of CARDIN.

DEFINE CONSTANT, DC. DC defines an area containing a constant value. The

instruction HEADING DC C'FORD MOTORS' defines a field called HEADING con¬
taining a character constant used for a report heading. In this case, the contents of
HEADING are intended never to change during the program's execution.

In both cases, CARDIN and HEADING, the name references the leftmost byte of
the defined field. A DS or DC, however, need not have a name.
Declarative names should be unique and descriptive. Since a name (or label)
can be up to eight characters long, it is more meaningful to use, for example, the
name EXPENSE rather than EXP. Also, it is often useful to identify a packed field with
a suffix PK, such as AMOUNTPK, and a binary field with BIN, as AMTBIN. We may
give input/output areas descriptive labels as CARDIN for a card input area, and
PRINT for a print area. (The declarative PRINT in Figure 1-4 is the name of a
1 33-byte field. It should not be confused with the assembler instruction PRINT. This
symbol PRINT illustrates how we can use the same name for both an operation and a
declarative; the Assembler can tell from the use of the symbol whether it references a
declarative or an instruction.)

ADDRESS NAMES. We give an instruction a name if it is referenced elsewhere in the

program. The example in Figure 1 -4 reads and prints card records. In order to repeat
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29 The Assembled Program Listing

the read operation, we "branch back" to read the next record of the read (GET
CARD,CARDIN). In order to reference the GET, we must give it a name—in this case
A1 OREAD. The program uses the instruction B A1 OREAD to branch to A1 OREAD, the
address of the GET instruction.
This text uses a convention that requires that the first character of an address
label be an alphabetic letter, A through Z. The next two or three characters are digits,
for example, A10, D35, P200. In the first main logical section of the program, the
labels begin with A. Address labels, where required, are numbered within this sec¬
tion starting with At 0, then increasing by intervals of ten, such as A20, A30, etc. This
practice facilitates the following:

— All labels are sequential, and therefore easy to locate.

— Because all labels are clearly in sequence, there is less chance of using duplicate
labels in the program.
— We can easily insert additional labels where required, such as A12 and A15.

The next main logical section and all others begin with a letter higher than the
previous, such as B, E, G, and X. Each section uses digits starting with 10 and
increasing by intervals of 10. The first label of a logical section and all other labels to
which we branch from outside the section are given descriptive suffixes, such as
A1 OREAD and XIOEOF. An examination of the sample programs throughout this text
should make clear the advantages of such coding conventions.

THE ASSEMBLED PROGRAM LISTING

Figure 1-4 provides a sample Assembler program that reads cards and lists them in
"80/80" format (the 80 card columns are printed column-for-column in 80 print
positions). This section briefly describes the assembled program listing. Some of the
detail may not be clear until after Chapter 3:

1. The first line lists the contents of the TITLE card (if any) at the top of each page.
The Assembler prints the page number to the right.

The second line is described next:

2. LOC, for Assembler Location Counter, is the assembled location or address of the
first (leftmost) byte of the object code instruction or declarative, in hexadecimal
format. The first address shown is X'ODAl 32', which is the address of the leftmost
byte of the instruction on that line. (The Supervisor occupies the lower part of
main storage, and this program occupies a following area.)
3. OBJECT CODE lists the hexadecimal object code instruction, or the contents of a
constant, as assembled. The column shows the actual contents of storage. In the
listing, the first executable instruction is the INIT statement. Because INIT is a
macro, and we coded PRINT NOGEN earlier, the Assembler has suppressed
30 THE ASSEMBLER

printing INIT's generated code. The first object code listed is for statement 64,
D24F 336A 3310. The first byte, D2, is the machine-language code for the sym¬
bolic operation MVC (Move Character). The D2 is stored in location X'0DA132'.
The second byte, 4F, gives the hexadecimal length of operand-1, and the other
four bytes are the machine code operands. The actual machine operand ad¬
dresses consist of a “base register" and a “displacement". This section merely
describes the purpose of these columns—do not expect to understand the assem¬
bled object code at this time!
4. ADDR1 ADDR2 shows the "effective" addresses of operand-1 and operand-2.
These addresses do not appear in main storage as part of the machine code; the
Assembler prints them only as a convenience to the programmer. The first line
printed shows DA3E4 DA38A, which refers to the actual storage locations of
operand-1 and operand-2 of the MVC instruction (PRINT+10 and CARDIN re¬
spectively).
5. STMT means Statement Number. The Assembler counts each statement in the
program and prints the assigned statement number in this column. The first in¬
struction, TITLE, and the second, EJECT, are not listed. The first statement number
in this example is 3 for the PRINT ON instruction. Certain other statements are
also not printed. Statement 57, for example, is the instruction SPACE, which the
Assembler counts but does not print. Similarly, because we coded PRINT NO¬
GEN, the printing of instructions generated by macros (such as GET) is sup¬
pressed. (The instruction PRINT GEN will force the Assembler to list generated
macro-code.)
6. SOURCE STATEMENT lists our original source code from Assembler cards,
exactly as coded.
7. DOS/VS ASSEMBLER REL shows the “release" and “version" number, which
varies by computer system.

The declaratives are coded in an area separate from the instructions. The
declarative CARDIN, for example, begins here in location (LOC) X'0DA38A'. The
contents of DC's (but not DS's) are shown in hexadecimal format under OBJECT
CODE. Since PRINT NODATA was specified, the Assembler lists only the first eight
bytes (16 hex digits) of DC contents, as shown by statement 151. Note that the object
code contents of PRINT show eight hexadecimal 40's, the 360/370 blank character.
Coding PRINT DATA would cause the Assembler to print the entire hex constant,
resulting in more printed lines of little value to the programmer.

ASSEMBLER DIAGNOSTIC MESSAGES

Figure 1-5 provides the assembled program listing, similar to the previous example,
with a random assortment of coding errors. Immediately following the program is a
list of any errors that the Assembler has identified, along with the statement number
and explanation. (The code numbers under ERROR NO. can help locate further
explanations in the IBM Assembler manual, although this is seldom necessary.)
 LOC OEJECT CODE ADORi A0DR2 STMT SOURCE STATEMENT

3 PRINT ON.NODATA.NOGEN

5 4 INITIALIZA T I 0 N

7 PR0G2B 1NIT INITIALIZE

28 OPEN CARD.PRTR

38 PUT PR PR INTER.PRHEAD.SKI SKIP TO NEtf PAGE

45 PUTPR PRINTER.PRHEAD.VSP2 PRINT HEADING

53 444 READ 4 PRIN T ROUTINE

55 A I OREAD GET CARD.CARDIN READ RECORD

61 PRINT*10180).CARDIN MOVE TO PRINT
444 ERROR 444
62 PUTPR PRINTER.PRINT.WSP1 4 PRINT
0 C A 1 46 OOOO 0000 69 B /A20READ^) GET NEXT RECORD
*** ERROR **♦

71 444 END-OF-F IL E ROUTINE

73 B1CEND PUTPR PR INTER.PR I NT.SKI SKIP PAGE

80 CLOSE CARD.PRINTER
89 EO J • END OF JOB

93 444 DECLARATIV E S

95 CARD DEFCO BIOEND OEFINE READER

1 19 PRINTER DEFPR DEFINE PRINTER

144 CARDIN CL 80 INPUT AREA

444 ERROR 444

0CA38A 4 04 0404 0404 04040 146 PRINT OC CL 133• • print area

C0A40F 148 PRHEAD OS 0CL133 HEADING LINE

0CA4CF 4040404040404040 149 DC CLIO* ‘ 4
0DA4l9 0 7D9C6C7D9CI0440 150 DC CL123‘PR0GRAM TO LIST CARDS'
151 ^SAPcr)
444 ERROR 444
CDA498 152 LTORG • LITERALS
0DA49 8 5B5BC2D6D7C50540 153 =C'**BOPEN •
0DA4AO 585BC2C30306E2C5 154 =C'**BCLOSE•
0DA4A8 00000000 155 =V(PC0CIT>
0DA4AC OOOCA250 156 =AIPRINTEH)
0CA4B0 OCODA40F 157 = A CPRHEAO)
ODA404 OCODA 178 158 =A(CARD)
OCA408 OCOOOOOO 159 =AICARDIN)
444 ERROR 444
0DA4BC OOOC A38 A 160 *A I PR I NT)

162 END END OF ASSEMBLY

**# ERROR ***

DIAGNOSTICS AND STATISTICS

MNT ERROR NO MESSAGE

35 IPK156 SYMBOL •PR TR• UNDEFINED

IPK097 UNDEFINED OP CODE 'MCV*. OR MACRO NOT FOUND
61
69 IPK156 SYMBOL ‘A20REAO* UNDEFINED
IPK128 CONSTANT FIELD MISSING OR PRECEDED BY INVALID FIELD. * *
44
IPKC97 UNDEFINED OP CODE 'SAPCE'. OR MACRO NOT FOUND
5 1
IPK156 SYMBOL ‘CARDIN* UNDEFINED
59
62 IPK144 INVALID END OPERANO
IPK149 SYMBOL •PRCG02• NOT PREVIOUSLY DEFINED
62

FIGURE 1-5 Assembled program with error diagnostics.

32 THE ASSEMBLER

Check this section immediately on receiving the assembled program listing. The
Assembler denotes some, but not all, errors to the left of the invalid statement with
*** ERROR ***. Before reading the following explanation, try to locate the cause of
each error message.
Statement 35, indicating that PRTR is undefined, refers to the OPEN statement.
The use of PRINT NOGEN has caused the statements generated by macros not to
print. The printer device is defined in statement 119 as PRINTER.
Statement 61 spells the instruction MVC as MCV; the Assembler generates no
object code, because it does not know if the operation is supposed to be a macro or
normal instruction.
Statement 69 indicates B A20READ instead of A1 OREAD. Statement 144 should
either be a DS or should define a constant for the DC. Statement 151 is supposed to
be a SPACE instruction.
Statement 159 is in the literal pool that the Assembler generates, caused by the
fact that the GET instruction references CARDIN. This is a common case of one error
(144) causing another. Correcting 144 will cause 159 to disappear.
Statement 162 should be coded as END PROG2B, one error which caused the
Assembler to generate two messages.
If the computer attempts to execute this program, it will quickly "bomb out."
Be sure to correct all error diagnostics before reassembling and executing.

PROBLEMS

1-1. What steps are required to assemble a program? Where is the assembled
program stored?
1-2. EHow does the Assembler account for the address of each instruction and
declarative?
1 -3. Indicate which instruction formats are used to move data (a) between registers-
(b) between storage locations; (c) between registers and storage.
1-4. Explain (a) machine language instruction; (b) symbolic instruction; (c) macro
instruction.
1-5. Comment on the validity of the following Assembler program names (labels)■
(a) W25; (b) START-UP; (c) READDEVICE; (d) $AMT; (e) TOT AMT- (f) -TO¬
TAL; (g) 25CENTS.
1 -6. On the coding sheet, what does an asterisk in column 1 indicate? What would
it indicate in column 72?

17 ^(tmg<?an ^ CaUSe tHe 8enerated code for a macro to Print on Assembler

1-8. What statement causes the assembled program listing to space 3 lines?
1-9. How may the Assembler check the sequence of a deck of program source
cards'
1-10. Does the EJECT statement cause the printer to skip to the top of a page
during
an assembly, during program execution, or both?
1-11. What statement terminates assembly of a program?
33 Problems

1-12. Refer to the IBM Assembler manual. Define in your own words (a) Self¬
defining terms; (b) Absolute and relocatable expressions.
1 -13. This chapter describes an address labelling system used in this text. What are
the advantages of such a system?
1-14. What is a declarative? How do DS and DC differ?
1-15. Distinguish between "source program" and "object program."
1-16. On the assembled program listing, what is meant by (a) LOC; (b) OBJECT
CODE; (c) ADDR1 and ADDR2; (d) STMT?
 CHAPTER 2

PROGRAM EXECUTION

Chapter 1 covered the requirements for coding an Assembler program. This chapter
covers the basic instructions for executing an Assembler language program: ini¬
tialization, the defining of files, and the input/output macros. We also examine the
input of a data record and its format in main storage. Now that we are close to coding
a program, we also examine the conventional analytical tool for program design, the
flowchart. The next chapter provides enough information so that we can write pro¬
grams that use character data.

PROGRAM EXECUTION STATEMENTS

An Assembler program requires certain special coding for program execution. It is

necessary initially to "load base registers" for addressing, to define the input and
output files, to activate these files, and to provide for termination of program execu¬
tion and for termination of the assembly. This section describes the simple macros
used for these complex functions. It is desirable for the beginning programmer to
write a program as soon as possible; thus, this text uses four macros that have been
specially written for introducing Assembler programming, I NIT, DEFCD, DEFPR and

34
35 Program Execution Statements

PUTPR. They handle some complex coding and enable the beginner to get started
quickly. All other macros used in this text are standard IBM macros.

INITIALIZATION. The first statements in an Assembler program vary somewhat by

Assembler version and requirements of the computer installation. The INIT macro
sets the Assembler location counter and "loads base registers." Chapter 6 covers the
precise Assembler initialization requirements.

NAME OPERATION OPERAND

Programname INIT blank

DEFINING CARD & PRINTER FILES. This text begins with the simplest, basic
input/output: punched cards and the printer. The names of the card and printer files
used in the program must be defined. This definition is handled by two special
macros, DEFCD (Define Card) and DEFPR (Define Printer) that generate some com¬
plex Assembler code. (The standard IBM macros, DTFCD and DTFPR (or DCB), are
covered in Chapter 7.) Other macros such as OPEN and GET reference these files by
the defined names.

cardfile DEFCD end-of-file address

printfile DEFPR blank

DEFCD defines the card reader file with any valid unique name. Under DOS,
the last card of our input data must be a job control card containing /* in columns
1 -2. As each data card is read, the system checks the first two positions. If they
contain /*, the system directs the program to our end-of-file address. In the case of
the DEFCD macro, we enter this address in the operand field (with any unique
name). Typically the name begins a routine that may print final totals and terminate
the program execution. Under OS, the /* job card is optional.

-EOF

N
36 PROGRAM EXECUTION

DEFPR defines the name of the printer file with any unique name. The printer is
an output file and has no associated "end-of-file".

OPENING AND CLOSING FILES. Most programming languages require the pro¬
grammer to code statements that "activate” (OPEN) the files at the start of the
program and "deactivate” (CLOSE) them at the end. The normal function of OPEN is
to make the file available to the program (it may be damaged or in use by another
program). At the end of the program execution, CLOSE releases the file for use by
other programs. For both macros, the operands are the card and printer file names
defined by DEFCD and DEFPR. (Under many large systems, the programmer may
omit the OPEN and CLOSE of card and printer files.)
Under Disk Operating System (DOS), OPEN and CLOSE are coded as:

OPEN cardfile,printfile
CLOSE cardfile,printfile

Under Operating System (OS), we code OPEN and CLOSE with the operands in
brackets. Also OPEN must specify if the file is INPUT or OUTPUT; CLOSE may omit
the references.

OPEN (cardfile,(INPUT),printfile(OUTPUT))
CLOSE (cardfile, ,printfile)
-- 11extra -:-
comma denotes omission of
(INPUT)

For either DOS or OS, we may open or close one or more files with one
statement.

READING INPUT RECORDS. The GET macro reads input records. There are two
operands: Operand-1 designates the card file name defined by DEFCD (or by the
IBM macro DCB or DTFCD); Operand-2 is the name of an 80-byte input area in main
storage.

GET cardfile,cardarea

GET causes the card device to read a record and store its contents in the input
area, erasing the previous contents of the area. The card input area may have any
unique name. Prior to storing in the input area, the macro checks the record; if it is
the end-of-file card (/*), the program branches to the end-of-file address defined in
the DEFCD macro. An example:
37 Program Execution Statements

OPEN READER Open input file

GET READER,INAREA Read record into INAREA

D10END CLOSE READER End-of-file, CLOSE READER

READER DEFCD D10END Define cardfile as READER

INAREA DS CL80 Define 80-byte input area

PRINTING LINES. Printing lines during program execution requires special treat¬
ment, because we may want to space on the page without printing, or print and
space one or more lines. To simplify the requirements involved in spacing the print
forms, in the early chapters this text uses a special macro, PUTPR. (Do not confuse
this printing during execute-time with the SPACE or PRINT statements that control
the printing of the program listing during assembly-time.)

PUTPR printfile,printarea, print-command

For PUTPR, operand-1 is the name of the printer file defined by DEFPR (or by
the IBM macros DCB or DTFPR). Operand-2 is the name of the print area where we
have stored data that is to be printed. The print area may have any unique name, and
there may be more than one print area. Operand-3 specifies the forms control:

WSPO Write, no space SKI Skip to new page

WSP1 Write, space 1 line SP1 Space 1 line
WSP2 Write, space 2 lines SP2 Space 2 lines
WSP3 Write, space 3 lines SP3 Space 3 lines

For example, PUTPR PRINTER,PRINT,WSP1 causes the program to print the

contents of an area, PRINT, and to space to the next line on the page. WSPO may be
used occasionally for underlining important information. SKI, SP1, SP2, and SP3
simply move the printer; nothing prints on the page, regardless of the contents of the
print area. PUTPR uses the first byte of the print area to insert a special forms control
character; any character that we may have already stored there will be erased. If the
print area is defined as PRINT DS CF133, then PRINT+0 is the position that the
control character uses. The remaining positions, PRINT+1 through PRINT + 1 32, are
available for storing our printable data. (The standard IBM macro, PUT, requires the
programmer to define and insert the control character, as discussed in Chapter 7.)

Note: PUTPR does not clear the print area. Because unwanted data may
still be in the area from the previous print operation, it is usually desirable
to clear the print area to blanks after printing so that the next printing does
not contain "garbage”. Also, if the print area is a DS, then it may contain
38 PROGRAM EXECUTION

garbage from some previous program. It is useful to define the print area
as a DC, as PRINT DC CL133' to initialize the print area to blanks.

TERMINATING EXECUTION. After closing the files, we terminate program execu¬

tion under DOS with the EOJ macro, which causes a return to the Supervisor pro¬
gram. Under OS, termination involves the RETURN macro.

EOJ blank (normal termination)

CANCEL , or ALL (abnormal termination)

More advanced programs are written to check if the input record contains
invalid data, and we may want to cancel the run if the input is invalid. The CANCEL
macro also terminates processing, but as well it "flushes” any remaining input rec¬
ords. The beginning programmer may want to delay using CANCEL until becoming
more advanced. Under OS, the macro equivalent to CANCEL is ABEND.

END OF ASSEMBLY. EOJ and CANCEL are concerned with terminating the pro¬
gram's execution, and may be coded in any logical place within the program. To
terminate program assembly, the last statement in the program must be END, which
tells the Assembler that there are no more statements.
The operand of the END instruction stipulates the address of the first executable
statement in the program. Through most of this text, this address will be the program
name, as:

PROG07 INIT Start of program

END PROG07 End of program

The END instruction is not a macro and generates no executable code; it does,
however, provide the starting address for the Supervisor to begin execution of the
program.
Figure 2-1 combines the preceding Assembler macros and declaratives into a
skeleton program, the overall logic required for many programming problems. The
only instruction not covered is B A1 OREAD which causes the executing program to
go to ("branch” to) the instruction labeled A1 OREAD.

CONDITION CODE

Computers must have logic: the ability to compare the contents of one field to that of
another, and to check if a value is positive, negative, or zero. On the 360/370,
39 Condition Code

1 INANE) 10 16 (OPERANDS) 41 (COMMENTS)

* INITIALIZATI 0 N
PROGEX INI T INITIALIZE
OPEN CARO,PR INTER ACTIVATE FILES

• MAIN PROCESS I N G
A 10READ GET CARD.CARDIN READ AN INPUT

• (PERFORM VARIOUS C ALCULATIC NS.

• SET UP PRINT AREA FOR PRINTING)
•
PCiT PR PRINTER.PRINT.MSP1 PRINT OUTPUT RECOR0
B A10READ GO TO READ NEXT RECORO

* END-OF-FIL
810END •
• (PRINT FINAL TOTAL S IF REQUIRED)
•

CLOSE CARD.PR INTER DE-ACTIVATE FILES

EC J TERMINATE RUN

* DECLARATIV E S
C ARC OEFCC B10END DEFINE CARO FILE 4 EOF ADDRESS
PRINTER DEFPR OEFINE PRINTER FILE
CARCIN OS CL 8 0 CARO INPUT AREA
PRINT cc CL133* • PRINT AREA
END PROGEX

FIGURE 2-1 Program outline.

comparing or checking fields sets the condition code, two bits in the Program Status
Word (PSW). Many compare and arithmetic instructions set the condition code
according to the results of the operation:

RESULTS OF THE CONDITION CODE

OPERATION SETTING

Equal or zero 0
Low or minus 1
High or plus 2
Arithmetic overflow 3 (arithmetic field is too
small for the calculated answer)

The purpose of the condition code is to facilitate the computer logic. Certain
operations set the condition code. Subsequently we can use other instructions that
can test what condition was set. In this way, we can change the flow of the program
logic.
As an example, a file of Accounts Receivable records must be read into the
computer in sequence by Customer. The program sequence-checks the file by com¬
paring the Customer number on the input record just read against the Customer
number on the record that was previously read and processed. The possibilities are as
follows:
40 PROGRAM EXECUTION

NEW CUSTOMER NUMBER CONDITION CODE

READ SET DECISION

Equal 0 Same Customer as previous

Low 1 Out-of-sequence error
High 2 Next Customer

Similarly, the program may check an amount field to determine whether its contents
are zero (0), negative (1), or positive (2).

INPUT DATA

The card constitutes a record of data, such as a Customer Balance record. The record is
divided into fields of data, as customer number, name, and balance owing. A collec¬
tion of related records, such as all the Customer Balance records, comprises a file, or,
in OS terminology, a "data set."
Many records contain a unique code in a specified position to identify the file
to which they belong. Thus, the Customer Balance records could all contain '01' in
the first two positions, and programs that read this file can check each record to
ensure that the correct records are being entered. Also, the records are normally in
ascending sequence by control field, in this case, customer number. If the program
prints reports in sequence, the user can quickly locate any required customer
number. Because the file may be submitted in an incorrect sequence, it is common
practice for the program to "sequence-check" input records by their control fields.
We may define a field that contains character data: the numbers 0 through 9,
the letters A through Z, and other characters as $, *, and @. Character data, like all
other data, use binary representation through the bit on/off condition. One byte (8
bits) represents one character. The combinations of eight bits in a byte provide 256
(28) possible characters. The typical printer, however, can print about 60 different
characters. Figure 2-2 depicts the standard printable characters. As can be seen, in
storage the bits

1100 0010
zone numeric

represent the letter B. On a card, the letter B is punched as a 12-zone and a 2. The
zone portion of the byte, 1100, represents the card 12-zone punch. The numeric
portion of the byte, 0010, represents the card numeric 2-punch. Also, the figure
shows that the letter K, punched with an 11 -zone and a 2, has a binary representation
1101 0010. The letter S, punched with a zero-zone and a 2, has a binary representa¬
tion 1 110 0010. The characters 0 through 9 are represented as 1111 0000 through
1111 1001, and in hexadecimal as F0 through F9.
 CODE TRANSLATION TABLE
CODE TRANSLATION TABLE (Contd)
Instruction Graphics and Controls EBCDIC Instruction Graphics and Controls EBCDIC
Dec. Hex 1RR) BCDIC EBCDIC! 11 ASCII Card Code Binary Dec. Hex IRX) BCDIC EBCDICI1I ASCII Card Code Binary
0 00 NUL NUL 12-0-1-8-9 0000 0000 64 40 STH Sp Sp e no punches 01® 00®
1 01 SOH SOH 12-1-9 0000 0001 65 41 LA A 12-0-1-9 01® 0®]
2 02 STX STX 12-2-9 0000 0010 66 42 STC B 12-0-2-9 01MM10
3 03 ETX ETX 12-3-9 0000 0011 67 43 1C C 12-0-3-9 01® ®11
4 M SPM PE EOT 12-4-9 ‘oooooi® 68 44 EX D 12-0-4-9 01® 01®
5 05 BAIR HI ENQ 12-5-9 0000 0101 69 45 BAL E 12-0-5-9 01® 0101
6 06 BCTR LC ACK 12-6-9 0000 0110 70 46 8CT F 12-0-6-9 01® 0110
7 07 BCR on BEL 12-7-9 0000 0111 71 47 BC G 12-0-7-9 01® 0111
8 08 SSK BS 12-8-9 -0000 1000 72 48 LH H 12-0-8-9 01® 10®
9 09 ISK HT 12-1-8-9 0000 1001 49
73 CH i 12-1-8 01® 1®1
10 0A SVC SMM LE 12-2-8-9 0000 1010 74 4A AH t ♦ j 12-2-8 01® 1010
11 0B VT VT 12-3-8-9 0000 1011 75 48 SH K 12-3-8 01® 1011
12 oc FF FF 12-4-8-9 0000 11® 76 4C MH n ) < < L 12-4-8 01® 11®
13 0D CR CR 12-5-8-9 0000 1101 77 4D 1 1
t M 12-5-8 01® 1101
14 OE MVCl SO SO 12-6-8-9 0000 1110 78 4E CVD < ♦ ♦ N 12-6-8 01® 1110
15 Of CICl SI SI 12-7-8-9 oooo mi 79 4F CVB * 1 1 0 12-7-8 oi® nil
16 10 L PR DU DU 12-11-1-8-9 0001 0000 80 50 ST & ♦ & & P 12 010100®
17 11
LNR DC1 0C1 11-1-9 0001 0001 81 51 12-11-1-9
Q 01010®!
18 ITR
12 DC2 DC 2 11-2-9 0001 0010 82 52 R 12-11-2-9 0101 ®10
19 13
LCR TM DC3 11-3-9 0001 0011 83 53 S 12*11-3-9 oioi mn
20 NR14 RES DC4 11-4-9 000 1 01® 84 54 N T 12-11-4-9 010101®
21 15
CLR Nl NAK 11-5-9 0001 0101 85 55 CL- U 12-11-5-9 0101 0101
22 OR 16 BS SYN 11-6-9 0001 0110 86 56 0 V 12-11-6-9 01010110
23 XR17 IL ETB 11-7-9 0001 0111 87 57 X w 12-11-7-9 01010111
24 LR18 CAN CAN 11-8-9 0®1 10® 88 58 L X 12-11-8-9 0101 10®
25 CR19 EM EM 11-1-8-9 0M1 1®1 89 59 c Y 11-1-8 oioi lmi
26 AR1A CC SUB 11-2-8-9 0M1 1010 90 5A A ! 1 Z 11-2-8 0101 1010
27 SRIB CU1 ESC 11-3-8-9 0M1 1011 91 58 s $ $ t 11-3-8 0101 1011
28 MR !C IFS FS 11-4-8-9 0M1 11® 92 5C M • • * \ 11-4-8 0101 11®
29 DRID ICS GS 11-5-8-9 0M1 1101 93 5D D ] 1 1 11-5-8 0101 1101
]
30 ALR
IE IRS RS 11-6-8-9 0®] 1110 94 5£ AL ; “» ~ 11-6-8 0101 1110
31 IF
SLR IUS US 11-7-8-9 0®1 111! 95 5F SL A —9 —« _ 11-7-8 oioi mi
32 20 IP0R DS SP 11-0-1-8-9 0010 00® 96 60 STO - - - ' 11 0110 00®
33 21 LNDR SOS i ! 0-1-9 ®10 0®1 97 61 7 / / a 0-1 0110 0® 1
34 22 LTDR FS " 0-2-9 0010 0010 98 62 b 11-0-2-9 0110® 10
35 23 LCDR # 0-3-9 0010 ®11 99 63 c 11-0-3-9 0110 0011
36 24 HDR BYP $ 0-4-9 M10 01M 1® 64 d 11-0-4-9 0110 01®
37 25 LRDR IF % 0-5-9 M10 0101 101 65 e 11-0-5-9 0110 0101
38 26 MXR ETB & 0-6-9 0010 0110 102 66 i 11-0-6-9 onoono
39 27 MX DR ESC • 0-7-9 ®10 0111 103 67 MXD 9 11-0-7-9 01100111
40 28 LDR t 0-8-9 ®10 10® 104 68 LD h 11-0-8-9 0110 10®
41 29 CDR i 0-1-8-9 ®10 1®1 105 69 CD i 0-1-8 ono lmi
42 2A ADR SM • 1
0-2-8-9 ®10 1010 1® 6A AD i 12-11 0110 1010
43 28 SDR CU2 + 0-3-8-9 M10 1011 107 6B SO k 0-3-8 ono ion
44 2C MDR 0-4-8-9 ®10 11® 108 6C MD %( % % 1 0-4-8 ono n®
45 20 DDR ENO - 0-5-8-9 M10 1101 109 6D DD V _ _ m 0-5-8 onojioi
46 2E AWR ACK 0-6-8-9 ®10 1110 no 6E AW \ > > n 0-6-8 ono mo
47 2F SWR BEL / 0-7-8-9 ®10 1111 in 6F sw #*. ? ? 0 0-7-8 ono nil
48 30 IPER 0 12-11-0-1-8-9 ®1100® 112 70 STE P 12-11-0 011100®
49 31 LNER 1 1-9 ® 11 0®1 113 71 4 12-11-0-1-9 01110M1
50 32 LTER SYN 2 2-9 0011 ®10 114 72 r 12-11-0-2-9 onimio
51 33 LCER 3 3-9 Mil ® 11 115 73 s 12-11-0-3-9 oni mn
52 34 HER PN 4 4-9 ® 11 01® 116 74 t 12-1HM-9 011101®
53 35 LRER RS 5 5-9 ®U 0101 117 75 u 12-11-0-5-9 0111 0101
54 36 AXR UC 6 6-9 ®11 0110 118 76 V 12-11-0-6-9 01110110
55 37 SXR EOT 7 7-9 ® 110111 119 77 w 12-11-0-7-9 01110111
56 38 LER 8 8-9 ®11 10® 120 78 U X 12-11-0-8-9 0111 10®
57 39 CER 9 1-8-9 ®11 1W1 121 79 CE y 1-8 oni lmi
58 3A AER 2-8-9 ®11 1010 122 7A A£ ft Z 2-8 0111 1010
59 ii. SER CU3 3-8-9 ®11 1011 123 7B SE f - # # i 3-8 oni ion
60 3C MER DC4 < 4-8-9 ®1111® 124 7C ME S ' 8 e ! 4-8 0111 11®
61 3D DER NAK ■ 5-8-9 Mil 1101 125 7D DE ' ' ) 5-8 0111 1101
62 3£ AUR > 6-8-9 ®1I 1110 126 7E AU > • - 6-8 0111 1110
63 3F SUR SUB ? 7-8-9 ®n mi 12, 7F SU s " on 7-8 oni nn

1. Two columns of EBCDIC graphics Note the following common Hex representations:
are shown. The first gives standard
bit pattern assignments. The second
shows the T-ll and TN text printing
chains (120 graphics). Hex Hex Hex
40 t5 Blank 50 & Ampersand 61 / Slash
4B . Period 5B $ Dollar 6B ) Comma
4E + Plus 5C * Asterisk 6C % Percent
4F 1 OR symbol 60 - Minus 7D } Apostrophe

FIGURE 2-2 360/370 code representation.

41
 CODE TRANSLA TION TABLE (Contd )
CODE TRANSLATION TABLE (Contd)
Instruction Craphics and Controls EBCDIC
Instruction Graphics and Controls EBCDIC Binary
Hex (SSI BCDIC EBCDIC! 11 ASCII Card Code
Card Code Binary Dec.
Hex BCDIC EBCDIC! 11 ASCII
12-0 1100 0000
12-0-1-8 1000 0000 192 CO ? {
128 80 SSM -S A 12-1 1100 0001
12-0-1 1000 0001 193 Cl A A
129 81 a a 1100 0010
194 C2 B B B 12-2
b b 12-0-2 1000 0010
130 82 LPSW -S 12-3 1100 0011
1000 0011 195 C3 C C C
12-0-3
D 0 D 124
d 1244 1000 0100 196 C4
132 84 WRD d 1100 0101
SI E E E 12-5
e e 12-0-6 1000 0101 197 C5
133 85 ROD 12-6 1100 0110
12-0-6 1000 0110 198 C6 F F F
134 86 BXH f f
G G G 12-7 1100 0111
q 12-0-7 1000 0111 199 C7
BXL£ 12-8
1000 1000 200 C8 H H H
136 88 SRL h h 12-0-8
1 1 1 12-9 1100 1001
1 12-0-9 1000 1001 201 C9
137 89 SLl 1 1100 1010
202 CA 12-0-2-8-9
SRA 12-0-2-8 1000 1010
138 8A 12-0-3-8-9 1100 1011
12-0-3-8 1000 toil 203 CB
204 J 12-04-8-9 1100 1100
12-0-4-8 1000 1100 CC
140 8C SRM. £ 12-0-5-8-9 1100 1101
( 12-0-5-8 1000 1101 205 CO
141 80 SLDL 12-04-8-9 1100 1110
12-0-6-8 1000 1110 206 CE V
142 8E SRDA
207 Cf 12-0-7-8-9 noo mi
Rf SLDA 12-0-7-8 iooo mi
143
1001 0000 208 DO j 11-0
144 90 STM 12-11-1-8
209 01 MVN J j j 11-1 1101 0001
TM 12-11-1 1001 0001
143 91 ] i
SI 210 02 MVC K K K 11-2 11010010
146 92 MVI k k 12-11-2 1001 0010
211 03 MV 2 L L l 11-3 11010011
93 TS -s 1 l 12-11-3 1001 0011
147
10010100 212 04 NC M M M 11-4 11010100
94 Nl m 12-11-4
1001 0101 213 05 CLC N N N 114 1101 0101
95 CLI n 12-11-5
SI 10010110 214 D6 oc 0 0 0 11“6 11010110
150 96 01 0 12-11-6
10010111 215 07 xc p p p 11-7 1101 0111
151 97 XI p 12-11-7
12-11-8 1001 1000 216 08 0 Q Q 11-8 1101 1000
15? 98 LM -RS q q
12-11-9 1001 1001 217 D9 R R R 11-9 1101 1001
153 99
12-11-2-8 1001 1010 218 OA 12-11-2-8-9 1101 1010
154 9A
12-11-3-8 1001 1011 219 DB 12-11-3-8-9 1101 1011
155 9R i
12-114-8-9 1101 1100
156 9C SIO.SIOF □ 12-11-4-8 1001 1100 220 DC TR
) 12-11-5-8 1001 1101 221 DO TRT 12-114-8-9 1101 1101
157 90 TIO, CLR10
S + 12-11-6-8 1001 1110 222 DC ED 12-114-84 1101 1110
158 9E HIO.HDV
12-11-7-8 iooi lm 223 OF EDMK 12-11-7-84 noi nil
159 9F TCH
AO 11-0-1-8 1010 0000 224 EO ♦ \ 0-2-8 1110 0000
160
« 11-0-1 1010 0001 225 El 11-0-14 1110 0001
161 A1
11-0-2 1010 0010 226 E2 s S s 0-2 1110 0010
162 A2 s s
A3 t t 11-0-3 1010 0011 227 E3 T T T 0-3 1110 0011
163
11-0-4 1010 0100 228 E4 U U U 04 1110 0100
164 A4 u u
V V 11-0-5 1010 0101 229 E5 V V V 04 1110 0101
165 A5
w 11-0-6 1010 0110 230 E6 W w w 04 mo ono
166 A6
167 A7 X X 11-0-7 1010 0111 231 E7 X X X 0~1 11100111
232 Y Y V 0-8 1110 1000
168 A8 y Y 11-0-8 1010 1000 E8

169 A9 z z 11-0-9 1010 1001 233 E9 z z z 04 1110 1001

170 AA 11-0-2-8 1010 1010 234 EA 11-0-2-84 1110 1010

171 AR L. 11-0-3-8 1010 1011 235 EB 11-0-3-84 1110 1011

172 AC STNSM r 11-0-4-8 1010 1100 236 EC H 11-04-84 1110 1100
173 AD STOSM Sl [ 11-0-5-8 1010 1101 237 EO 11-04-84 1110 1101
174 A£ SICP -RS > 11-0-6-8 1010 1110 238 EE 11-04-84 mo nib
175 AF MC -SI • 11-0-7-8 ioio nil 239 EF 11-0-7-84 mo mi
176 80
0 12-11-0-1-8 1011 0000 240 FO SRP 0 0 0 0 11110000
IRA -RX 1 12-11-0-1 10110001 241 FI MVO 1 1 1 1 11110001
177 B1
2 12-11-0-2 10110010 242 F2 PACK 2 2 2 2 11110010
178 82 Se< below
R3
3 12-11-0-3 10110011 243 F3 UNPK 3 3 3 3 11110011
179
180 B4
4 12-11-04 10110100 W f4 "J 4 4 3 ' linoioo
6 12-11-0-5 10110101 245 F5 5 5 5 5 mi oioi
181 B5
e 12-11-0-6 10110110 246 F6 6 6 i 6 11110110
182 B6 STCTL
Irs 7 247 F7
183 R7 LCTL 12-11-0-7 10110111 7 7 7 7 11110111
I
184 8 12-11-0-8 1011 1000 248 F8 ZAP 8 8 8 8 1111 1000
B8
185 B9 • 12-11-0-9 1011 1001 249 F9 CP 9 9 9 9 mi iooi
186 BA CS 12-11-0-2-8 1011 1010 250 FA AP 1 12-11-0-2-84 mi ioio
(rs J 251 FB SP
187 BR CDS 12-11-0-3-8 ion ion 12-11-0-3-84 mi ion
188 BC 12-11-04-8 1011 1100 252 FC MP 12-11-04-84 mi noo
189 BO CLM 12-11-0-5-8 1011 1101 253 FO OP 12-11-04-84
] mi noi
254 FE
190 BE STCM RS ■f 12-11-06-8 1011 1110 12-11-04-84 nil mo
BF ICM - 12-11-0-7-8 ion nil 255 FF EO 12-11-0-7-84
191 nil nn

FIGURE 2-2 (Continued)

42
43 Input Data

Digits are normally read from cards into storage in character format, and are
printed in this format. (However, to perform arithmetic, we must translate character
data into packed or binary format.) Data is read into storage from such devices as
card readers, disk, and tape. This chapter considers only card input. The card,
punched with alphabetic and numeric data, reads into an 80-byte area, defined
anywhere in available storage. The card is read entirely in character format. The
following lists the contents of a punched card:

COLUMN FIELD PUNCHED WITH

1-2 Card code 01
3-5 Account number 123
6-18 Name JP MCKINNON (Alphabetic data is punched beginning
on the left in column 6, with blanks filled to the right
up to column 18.)
19-25 Balance 0125000 (The balance is $1,250.00—we do not punch
dollar sign or comma, nor usually the decimal point.)
26-80 Unused Blank

Assume that the name of the 80-byte input area is CARDIN, and the name of
the input file is CARD. The relevant instructions to read the record are:

GET CARD,CARDIN

CARD DEFCD ...

CARDIN DS CL80

The GET instruction reads the 80-character input record into the 80-byte CAR¬
DIN area in main storage, byte-for-byte, as shown in Figure 2-3.

CARDIN CARDIN + 79
card input area
jL
Char 0 1 1 2 3 J P M C K 1 N N O N 0 1 2 5 0 0 0
LL

LL.
CN
o

Hex F0 FI FI F2 F3 D1 D7 40 D4 C3 D2 C9 D5 D5 D6 D5 40 40 FI F5 F0 F0 F0 40 40 40

FIGURE 2-3 Character and hex representation of an input area.

Compare the character and the hexadecimal representation, two hex digits for
each character read. Note especially that any blank card position appears in storage
as X'40' (binary 0100 0000). Also, the numbers 0 through 9 become X'FO' through
X'F9'. We may assign symbolic names to each field within the CARDIN area. We
then process the data by referring to each field's symbolic name. For example, we
may check that the card code (01) is correct. We may move the account number
(123) and the name to another storage area in order to print them. Also, we may
44 PROGRAM EXECUTION

convert the balance field (1,250.00) into packed decimal format in order to add it to
an accumulator. In order to perform these tasks, we must be able to do the following:

— Reference areas and fields in storage. For this purpose we use declaratives to tell
the Assembler each field's name, length, and format (e.g. character, binary,
packed).
— Instruct the computer step-by-step what is to be done. We use Assembler sym¬
bolic instructions in order, for example, to move, add, and compare data.

FLOWCHART LOGIC

Programming is more than simply coding instructions for the computer to execute.
Usually there are several steps: analysis, design, flowcharting, and coding.

ANALYSIS. The first step is to analyze the problem. This step may consist of inter¬
viewing people concerned with the problem, studying input data to be processed,
and designing the output required. If other programs use the same input or require
the output, then the new program must integrate with the present system.

DESIGN. The data to be used may be at present on source documents. We may

have to design a punched card so that the data can be keypunched. Next, we may
have to design the printed report, depicting each print position to be used.

FLOWCHARTING. The next step depicts the solution to the problem. Commonly,
we draw a flowchart, a pictorial representation of the program's flow of logic,
showing each step that the program coding is to take. If we can flowchart the
program, we should be able to code it. A flowchart serves the following purposes:

— It ensures that the problem has been thoroughly analyzed.

— It aids in solving the problem and often reveals programming errors.
— It acts as documentation for future corrections and modifications.

Flowcharts are an important element of program design and documentation.

There are special symbols for operations such as processing, input/output, decisions,
and terminals. After analyzing the problem, we depict the flow of logic that the
coded computer program is to follow, showing each step and action, in the sequence
it will be executed. In this way we fully solve the problem at the detail level, and
make adjustments as we proceed. When we code the instructions we follow the
flowchart logic. The flowchart therefore simplifies coding and minimizes errors.
Flowcharts should be neat and legible, drawn on one side of the page only, in
pencil to facilitate revisions. They provide the identical logic as the coded program.
In the case of smal I programs, such as the ones that accompany many of the chapters,
45 Flowchart Logic

a single flowchart is adequate. Large programs may require an additional summary

flowchart depicting the program's general overall logic. Computer manufacturers
provide a standard flowchart template. The common symbols are described next.

SYMBOL IDENTIFICATION

r
TERMINAL Start or termination of the program.

Indicates that a compare or test is made with more than

one possible result. This is the only symbol that permits
more than one exit.

Describes normal computer instructions such as MOVE

or ADD. Notation within the block describes the oper¬
ation^). Several similar operations in a row, such as add¬
ing various fields, may all be included in one block.

INPUT/
Depicts all input/output operations, such as read a card,
OUTPUT
BLOCK
or write a line.

ON-PAGE Used if a continuous line cannot easily be drawn from

o
CONNECTOR
one block to another. One on-page connector is an exit
from the block, and one is an entry to the other block.
Unique letters, such as 'A', in each connector relate
them.

Signifies that the next block is on a different page. One

OFF-PAGE off-page connector is an exit from the block, and one is
an entry to the other block. Two items are entered in the
connector: the page number on which the block is to be
CONNECTOR found, and an unique letter, such as 'A', to relate the
connectors.

EXAMPLE FLOWCHART. Figure 2-4 illustrates most of the flowchart symbols. The
flowchart depicts a program that reads Customer Balance records. Each record is
identified by a customer number, and contains also customer name and balance
owing. There may be only one record for a customer. The objective is to print the
balance owing for each valid customer. Note the following points:

1. The program compares the customer number on each input record against the
customer number from the previously processed record. If the new one is higher
(Y), the program prints customer number, name and balance, and stores the new
customer number in "previous" number for the next sequence-check. The pro¬
gram then branches back to read the next record and repeats the instructions.
46 PROGRAM EXECUTION

FIGURE 2-4 Flowchart for printing customer balances.

If the customer number is not higher, the program prints an error message
and branches back to read the next record, indicated by a connector (A).
2. Immediately following the read operation is the end-of-file condition. If there are
no more records to be processed, the program closes the files and terminates
processing (END-OF-JOB).

Note a general flowcharting practice: the flow of logic is normally downward

and to the right. The return of the flow is usually (but not always) upward and to the
right.
47 Problems

JOB CONTROL

Medium and large sized 360/370 computers run under an operating system. In order
to assemble or execute a program, we must submit "job control" entries that tell the
operating system what action to perform. A "job" may consist of one or more
programs that are to execute with required data. The system recognizes the start of a
job, such as "Payroll", by means of the first job control card which contains an entry
such as // JOB or //jobname JOB. Such entries that specify the job, and the action to
perform comprise the "job control language" (JCL).
The two main IBM operating systems are Disk Operating System (DOS) for
medium size computers, and Operating System (OS) for large ones. Job control
language for these two systems is quite different, and even within a system may vary
considerably between installations. Appendix D gives example job control for some
typical situations. Check the particular JCL requirements for your own installation.

PROBLEMS

2-1. An input file is called "FILEIN" and an output file is called "FILEPR". Provide
for your system: (a) The OPEN statement; (b) a properly defined area for input
records; (c) the GET instruction; (d) a properly defined area for print records; (e)
the write statement necessary to write and space two lines; (f) the CLOSE
statement.
2-2. FHow does your system recognize the end of data for a file of cards?
2-3. A field tested in a program is found to be negative. What will be the condition
code setting?
2-4. Given the Character, Hexadecimal or Binary, complete the representation.

CHARACTER HEX BINARY

O

O
CM

CO

Example ABC 1100 0001 1100 0010 1100 0011

(a) 3 7 0
(b) 1 B M
(c) Sam
(d) - 7 %
(e) 1101 0111 1100 0001 1110 0011
(f) 0100 0000 1111 1001 1111 0000
(g) 0100 1101 0100 0000 0101 1101
(h) C2 E4 C7
(i) E2 Cl D4
(j) 5B 40 6B

2-5. What is the purpose of the "flowchart"?

2-6. Draw a flowchart for the following problem. A card file contains sales data:
48 PROGRAM EXECUTION

salesman number and amount of sales for the week. For each card, calculate
sales commission as follows:

AMOUNT OF SALES COMMISSION RATE

up to $1,000.00 5.0%
$1,000.01 to $3,500.00 7.5%
over $3,500.00 8.5%

Multiply sales amount by the required commission rate and print sales, rate,
and commission. At the end of the file terminate processing.
2-7. Code the job control for your installation for assembly, link-edit, and execution
of a card input program.
2-8. Code, assemble, and test a program that reads cards and prints their contents. If
you call the input area CARDIN and the print area PRINT, then you can move
the contents of each input record to the print area with:

MVC PRINT+20(80),CARDIN
 PART II

BASIC ASSEMBLER
CODING
 CHAPTER 3

PROGRAMMING FOR
CHARACTER DATA

The chapter introduces character format in which data is normally read and printed.
The first part describes the Assembler declaratives that define character fields: areas
in storage to handle input and output records, and constants such as report headings.
Because programs must manipulate data that is read or defined, the next sections
cover the basic instructions to move and compare data. A sample program illustrates
the use of these instructions and how they may be organized into a working program.

DECLARATIVES

Declaratives are instructions that the Assembler recognizes and assigns storage loca¬
tions. They do not generate an executable instruction. Declaratives provide for the
entry of data to the program in two ways:

1. The declarative Define Storage (DS) defines areas for the program to receive data
that varies in content, such as an input area.
2. The declarative Define Constant (DC) defines constants, such as a title for a report
heading, or the numeric value 'V to count the pages being printed, or an ac¬
cumulator initially set to zero.

57
 52 PROGRAMMING FOR CHARACTER DATA

DEFINE STORAGE (DS). The DS statement reserves an area of storage, for exam¬
ple, to define areas for reading cards and for printing. The general format of the DS
statement on the coding sheet is:

NAME OPERATION OPERAND

Isymboll DS dTLn ‘comments’

Optional: Symbol = the name assigned to the field. If the program needs to refer to
the field by name, then we assign a name in columns 1 -8. The name
refers to the first (leftmost) byte of the field. Chapter 1 gives the require¬
ments of symbolic names.
Optional: d = duplication factor which tells the Assembler how many repetitions
of the same area are required. If we omit the factor, the Assembler
assumes one area. If 2 is specified, the Assembler creates two adjacent
areas; the name (if any) refers to the first area.
Required: T = type of format, such as C for Character, or P for Packed.
Optional: Ln = length of the field in bytes (n), positive values only. For example, L3
designates a 3-byte field. If length and comments are omitted (such as DS
C), the Assembler assumes a length of one byte. The maximum length of
a character DS field is 65,535 bytes.
Optional: 'comments' = a description within apostrophes of the purpose of the
field. If we omit the length (Ln), the Assembler assumes that the length is
the number of bytes within the apostrophes. For example, DS C'LIZ'
defines a 3-byte area, but containing no such value—the contents are
still “garbage”.

Figure 3-1 depicts various DS statements in character format. Note the headings
on the Assembler listing:

LOC OBJECT CODE STMT SOURCE STATEMENT

7 *
8 * DS CHARACTER FORMAT
Hex address of leftmost 9 *
003600 byte of defined field 10 FIELDA DS 1CL5 RESERVES 5 BYTES CALLED FIELDA
003605 12 FIELDB DS CL 5 RESERVES 5 BYTES CALLED FIELDB
00360A 14 DS CLIO RESERVES 10 BYTES
00361A 16 CARDAREA DS CL 80 RESERVES 80 BYTES FOR CARD AREA
003664 18 DS 80C RESERVES 80 1-BYTE FIELDS
0036B4 20 FIELDS DS 3CL 5 RESERVES 3 5-BYTE FIELDS

22 DATE DS CL 8•DD/MM/YY •
0036C3 RESERVES 8 BYTES. CONTENTS ARE +
DOCUMENTATION ONLY

FIGURE 3-1 Sample DS statements in character format.

53 Declaratives

SOURCE STATEMENT in the center lists our original source symbolic language
code.
STMT, immediately to the left, gives the statement number of each source statement,
as generated by the Assembler. FIELDA, for example, is statement-10. (State¬
ment-1 1 is suppressed; it is a card with the instruction SPACE that causes the
Assembler to space one line.)
LOC at the far left is the contents of the location counter that lists the hexadecimal
address location of each statement. FIELDA is a 5-byte field beginning in location
X'003600'. FIELDB begins immediately following in X'003605'. The Assembler
defines declaratives in the same sequence that they are coded, in locations
directly one after the other.
OBJECT CODE lists the assembled machine code: object code instructions and the
contents of DC's. A DS lists no object code because it merely reserves space.
ADDR1 and ADDR2 refer to instructions, not declaratives. Each declarative is ex¬
plained next. Commentson the rightofeach statement describe the defined area.
Statement-10: FIELDA is a 5-byte DS beginning in location X'003600'. The duplica¬
tion factor 1 may be omitted, as shown in FIELDB.
Statement-12: FIELDB at X'003605' immediately follows FIELDA.
Statement-14: This DS is unnamed. Its address is X'360A' because FIELDB at X'3605'
is five bytes: X'3605' + 5 = X'360A' (5 + 5 = 10 or A in hex).
Statement-16: CARDAREA defines an 80-byte area to be used for card input.
Statement-18: Because there is no length (Ln), the Assembler assumes that each of
the 80 fields is one byte.
Statement-20: FIELDS defines three 5-byte fields. A reference to the name FIELDS is
to the leftmost byte of the first 5-byte field.
Statement-22: DATE illustrates the use of comments. The programmer expects to
store the date in the field in the specified format.

There are three problems to resolve:

1. Where in storage will the field reside? The Assembler assigns the field's location
and accounts for the length of every instruction, storage area, and constant. For
this task it uses a location counter (see Chapter 1).
2. How does the computer know where the field resides and how long its length is?
The Assembler translates the symbolic addresses into machine object addresses. If
it has assigned, for example, FIELDA with the address X'3600' then any instruc¬
tion's reference to FIELDA is to address X'3600'. For certain instructions, the
Assembler stores the length of the field as part of the instruction.
3. What are the contents of the field? The contents of a DS field are unknown,
because the Assembler merely reserves the defined area. At the start of the pro¬
gram a DS area may contain data from a previous program. Therefore, we may
have to initialize DS fields with valid data. For example, if the print area is defined
as a DS, we should clear it to blanks at the start of the program so that "garbage"
is not printed along with valid data. The only purpose of DS is to define an area of
storage with a specified length. The fact that the field's format is defined as
character, packed, etc., is irrelevant, because at execution-time the field may
54 PROGRAMMING FOR CHARACTER DATA

contain data in any format. The defined format is merely a convenient reminder of
what format we expect the field to contain. A major use of DS is to define input
and output areas, covered next.

INPUT AREAS. In order to define fields within a record, we use a DS with a zero
duplication factor, as DS 0CL80, and define the fields immediately following.
The set of DS's in Figure 3-2 fully defines the input area for the card format
given in Figure 2-3. The DS defines CARDIN as an 80-byte record. However, be¬
cause of the "0” (zero) duplication factor, the Assembler location counter is not
incremented. The Assembler assigns the next field, CODEIN, the same address as
CARDIN (X'4201'). CODEIN, however, is a 2-byte field. Although both fields begin
at X'4201', a reference to CARDIN is to an 80-byte field, whereas a reference to
CODEIN is to a 2-byte field. Each DS following CARDIN defines a field within the
CARDIN area. The sum of their lengths must equal 80, the length of CARDIN, in
order to account for all card columns that read into the program's main storage area.
We may now refer to the entire 80-byte CARDIN record, and to any field defined
within the record.
The GET macro reads an 80-column card into an 80-byte area that we define,
as in GET CARD,CARDIN. On input, card column 1 reads into the leftmost byte
of CARDIN (location X'4201' on the assembled DS statement). Card column 2 reads
into the next byte (X'4202'), and column 80 into the 80th byte (X'4250').

Note: The read operation erases the previous contents of the CARDIN
area.

30 CARDIN DS 0CL80 80-BYTE CARDIN AREA. DUPLICATION

004201
FACTOR IS ZERO
004201 31 CODEIN DS CL2 * CARD CODE
004203 32 ACCTIN DS CL 3 * ACCOUNT NUMBER
004206 33 NAME IN DS CL 13 * NAME
004213 34 BALAN IN DS CL7 * BALANCE OWING
00421A 35 DS CL 55 * REST OF CARD

FIGURE 3-2 Area defined for card input.

OUTPUT AREAS. Whereas a read operation erases the previous contents of the
input area, a write operation leaves the contents of the output area unchanged.
Therefore, if a DS defines the output area, we must ensure that the storage positions
do not contain "garbage'' from the previous program. At the beginning of our pro¬
gram, we should clear the output area to blanks (X'40'). An alternative soution is to
use Define Constant (DC) to define the output area with an initial constant containing
b anks It is also often necessary to clear the print area after writing a line, so that it is
blank for the next line to be printed.
Although the number of print positions varies with the printer used, a common
requirement is to define a 1 33-byte print area as PRINT DS CL1 33 or DC CL1 33' '
55 Declaratives

The 360/370 use the leftmost byte of PRINT for a printer forms control character.
This character controls forms movement, such as print and space one line, or skip to
a new page. We may use the other 1 32 positions to store data to be printed. Chapter
2 gives the requirements for the print macro, PUTPR.
We may also define the print area with a zero duplication factor, as PRINT DS
0CL133, with a DS to define each field within the record. Alternatively, we may
reference PRINT by relative addressing. (It is possible to reference any field in main
storage by relative addressing, or to define it with a zero duplication factor and
redefine the fields within it.) Since the leftmost byte (the position labeled PRINT) is
reserved for the control character, we may refer to the first printable position as
PRINT + 1, to the second as PRINT + 2, etc.:

133 bytes

t
PRINT+0 PRINT+2 PRINT+132
reserved for PRINT+1 PRINT+3
control character

DEFINE CONSTANT (DC). The DC statement, like DS, reserves storage of a de¬
fined length. In addition, DC defines a constant (or value) such as a heading to be
printed on a report. A DC may define a constant in any format, such as Character,
Binary, Packed and Hexadecimal, and in various lengths. The general format for a
DC statement is as follows:

NAME OPERATION OPERAND

[symbol] DC dTLn ‘constant’

Optional: Symbol = the name that we may assign to the field,

Optional: d = duplication factor which tells the Assembler how many repetitions
of the constant are required. The symbolic name (if any) refers to the first
constant. If we omit the factor the Assembler assumes one constant.
Required: T = type of format, such as C for Character, P for Packed, X for Hexadec¬
imal, Z for Zoned, etc.
Optional: Ln = length of the field in number (n) of bytes. If Ln is omitted the
Assembler assumes the field length to be the number of bytes defined by
the constant. For example, DC C'SAM' defines a 3-byte constant,
Required: 'constant' = the constant that is to be defined, contained within apos¬
trophes. A DS "constant" is for documentation; a DC constant is stored.

The following are rules regarding Character constants:

56 PROGRAMMING FOR CHARACTER DATA

1. Their length may be defined from one to 256 characters.

2. They may contain any character that may be keypunched or printed, including
blanks.
3. If the length (Ln) is not coded, the Assembler assumes that the field length is that of
the defined constant. Thus, DC C'SAM' defines a 3-character constant.
4. If the length (Ln) is specified, then the following may occur:
a. The defined length equals the length of the constant:

FIELDA DC CL5’APRIL’

The length of FIELDA is 5 bytes. The Assembler generates APRIL.

b. The defined length is less than the length of the constant:

FIELDB DC CL4’APRIL’

The defined length, 4, overrides the length of the constant. The length of
FIELDB will be four bytes. The Assembler left-adjusts the constant and trun¬
cates rightmost characters that exceed the defined length. APRI is generated.
c. The defined length is greater than the length of the constant.

FIELDC DC CL6 APRIL’

The length of FIELDC will be six bytes. The Assembler left-adjusts the constant
and pads rightmost bytes with blanks. APRIL# is generated.
5. The apostrophe (') and the ampersand (&) have special meaning to the Assembler.
If we define them within a constant, we must code them as two adjacent charac¬
ters, although the Assembler counts and prints only one.

Figure 3-3 provides various character DC's with explanations. On the Assem¬
bler listing note the OBJECT CODE generated by each statement. LOC gives the hex
address of the first byte of each constant. Under OBJECT CODE is the hex contents
up to the first eight bytes (1 6 hex digits) of the constant. (The entire hex contents for
constants exceeding eight bytes can be printed by means of the Assembler instruction
PRINT DATA.)
The first pair of DC's defines fields containing blanks, or X'40' in object code.
BLANK1 generates a 5-byte field containing five blanks. Its location is X'004301'.
Under OBJECT CODE are the five bytes of blanks (X'40's). BLANK2 defines five
1-byte blank fields; its implicit length is therefore one.
The next section defines fields with zero values. ZEROI generates a 5-byte field
containing five zeros. Note that a character zero is X'FO'. ZER02 is a 5-byte field as
well. But because only one zero is specified, the Assembler left-adjusts the zero and
fills the remaining bytes with blanks, a common coding error. ZER03 generates five
1-byte fields, each containing a zero.
The third section defines numeric values. FIVEA and FIVEB show two ways to
define a 1 -byte field containing the value 5 (X'F5'). FIVEC generates 05, or X'F0F5'.
57 Declaratives

L oc 06 JEC T CODE STMT SOURCE STATEMENT

41 *

42 * OC CHARACTER FORMAT
43 *
CONSTANT GENERATED
45 *
004301 4040404040 46 BLANK1 DC CL 5 * •
004306 4040404040 l 2 uL flirlv O
47 BL ANK 2 DC 5CL 11 • 5 1-BYTE BLANKS
49 ♦ DEFINE ZEROS:
00430B F0F0F0F0F0 50 ZER01 OC C•00000'
004310 F040404040 51 ZER02 OC CL 5'0'
004315 F0F0F0F0F0 52 ZER03 DC 5C 1 0 * '0* , 'O' , 'O','O','O'
54 * DEFINE NUMBERS:
00431 A F5 55 FIVEA DC CL 1'5 • '5•
004 3 1B F5 56 FIVES DC C • 5' •5'
00431C F0F5 57 FIVEC DC C '05' •05'

59 * DEFINE ALPHABETIC:
00431E 5BF16BF0F0F04BF0 60 AMT DC C'tl.OOO.OO' ' $ 1,000.00'
004327 C1C2C3C44040 61 PADBLANK DC CL 6'ABCD' •ABCD •
00432D 40D106C540 5040C6 62 AMPERSND DC C' JOE EE FLO''S • ' JOE £ FLO'S •
00433A C1C2C1C2 63 TRUNCATE DC 2CL2'ABCD' 2 CONSTANTS = 1AB' , ’ AB *
00433E F0F701E4D3E8 64 JULY DC C'07' ,C'JULY' 2 CONSTANTS = *07 • ,
65 title DC C' INTERNAT onal businf M A O
004344 404040C940D540E3 H I N E S'
continuation char
67 * DEFINE ERRORS: col 72
68 ERROR A DC CL 3 MISSING 'CONSTANT'
*** ERROR ***
69 ERROR B DC • i
MISSING FORMAT
*** ERROR ***
70 ERRORC DC CL ' 123' MISSING LENGTH N
*** Error ***
71 ERRORD DC CL300 • • LENGTH EXCEEDS 256
* * ERROR ***

FIGURE 3-3 Sample DC statements in character format.

The fourth section defines alphabetic fields. AMT generates a field with a dollar
sign (X'5B'), a comma (X'6B'), and a decimal point (X'4B'). PADBLANK left-adjusts
the constant and pads two blanks to the right. AMPERSND illustrates the use of the
ampersand (&) and apostrophe ('), both of which must be defined twice. The gener¬
ated constant in this case is 1 3 bytes long, although the Assembler prints only the first
eight bytes under OBJECT CODE. TRUNCATE defines two constants, each two bytes
long. The Assembler truncates the constant ABCD on the right to two bytes (because
we coded L2) and generates AB twice (see the hex object code). JULY shows one
statement that defines two character constants, separated by a comma. A reference to
the name JULY is to the first 2-byte field. (This feature, providing for definition of
more than one constant with one DC, is not available in every level of Assembler.)
TITLE illustrates the continuation character, in this case a plus sign (+) in
column 72. The constant continues on the next line in column 16. (Even though there
is an Assembler instruction TITLE, we can use TITLE for the name of a field.)
The last section defines some common coding errors. The comments on the
right explain the cause of the error. The Assembler prints ERROR instead of the object
code, and explains the cause at the end of the program listing (not shown). Any
instruction in the program that references one of these invalid constants also causes
an error message for that instruction.
Problems 3-1 and 3-2 should now be attempted.
58 PROGRAMMING FOR CHARACTER DATA

CHARACTER INSTRUCTIONS

This section covers the movement and comparison of fields in character format. The
content of these fields is made available to the program from an input record or
declared as a constant value. There are two instruction formats that process data in
main storage: Storage-to-Storage (SS) and Storage Immediate (SI). SS format pro¬
cesses data between two fields in main storage, whereas SI format processes between
a one-byte constant built into the instruction and one main storage location.

STORAGE-TO-STORAGE FORMAT

Some instructions reference data in main storage only, others process data between
main storage and the registers, and others process in registers only. Storage-to-storage
(SS) format references only storage locations. In an instruction like MVC (Move
Character), the operands are represented as S1,S2 meaning that both operand-1 (SI)
and operand-2 (S2) reference main storage. Another representation in symbolic form
is:

MVC D1(L,B1),D2(B2)

D1 (L,B1) means that the operand-1 address consists of a base register (B1) and a
displacement (D1).
L means that the length of operand-1 controls the number of bytes processed.
D2(B2) means that the operand-2 address consists of a base register (B2) and a
displacement (D2). This feature may be ignored for now; Chapter 6 describes it
in detail.

MOVE CHARACTERS—MVC

Frequently the program must move the contents of one field to another. Fields in the
input area must be moved to other areas in order to save them from erasure by the
next record that the program reads. Also, constants, headings, and calculated values
must be moved to the print area for printing. The following instructions move charac¬
ter fields, bytes, and half-bytes from one storage location to another: Move Character
(MVC), Move Numerics (MVN), Move Zones (MVZ), Move Immediate (MVI), and
Move With Offset (MVO). This chapter describes MVC and MVI. Although MVC may
move data in any format, we normally confine its use to character fields.

NAME OPERATION OPERAND

[symbol] MVC Si ,S2 or D1(L,B1),D2(B2)
Move Characters—MVC

MVC is a Storage-to-Storage (SS) instruction. Its rules are:

1. MVC may move from one to 256 bytes, usually character data, but technically
any format.
2. Data beginning in the byte specified by operand-2 is moved one byte at a time to
the field beginning with the byte specified by operand-1. The move does not
affect the contents of the operand-2 field; the bytes are copied into the operand-1
field. Thus, the instruction MVC FLDA,FLDB copies the contents of FLDB into
FLDA.
3. Each operand specifies the leftmost byte of the field, and movement is from
left to right.
4. The length of the operand-! field determines the number of bytes moved. In the
MVC instruction format there is a length code (L) for operand-1 only. The length
of operand-2 is irrelevant to the operation. If the operand-1 field is five bytes long
and operand-2 is six bytes, MVC moves only the first five bytes of operand-2 (from
left to right one byte at a time) to the operand-1 field. If the operand-1 field is six
bytes and operand-2 is five, MVC moves all five bytes of operand-2, plus one byte
immediately to its right.

FIELD LENGTH. We may specify the number of bytes to be moved in one of two
ways: implicit or explicit length. Assume the following DC's:

NAME OPERATION OPERAND

FIELD1 DC CJUNE’
FIELD2 DC CAPFUL’

IMPLICIT LENGTH: MVC FIELD1 ,FIELD2. Operand-1, FIELD!, is implicitly de¬

fined as a 4-byte constant. Since the Assembler recognizes that a reference to FIELD1
is to a 4-byte field, the MVC moves only the first four bytes of FIELD2, APRI. The
contents of FIELD2 are unaffected.

(FIELD1 (FIELD2
before the MVC: JUNEAPR I L

after the MVC: A P R I A P R I L

EXPLICIT LENGTH: MVC FIELD1 (3),FIELD2. Assume the same DC's as before.
Operand-1 has an explicit length (3) that overrides the defined length of FIELD1.
Therefore, MVC moves only the first three bytes of FIELD2 (APR) into the first three
bytes of FIELD1. The fourth byte of FIELD! is unaltered:

(FIELD1 (FIELD2

after the MVC: APREAPR I L

60 PROGRAMMING FOR CHARACTER DATA

EXPLICIT LENGTH: MVC FIELD! (5),FIELD2 moves 5 bytes. APRI is moved into
FIELD 1. The "L" is moved into the next byte to the right, the first byte of FIELD2,
which immediately follows FIELD1:

(FIELD1 {FIELD2
before the MVC: JUNEAPR I L

after the MVC: APRI L P R I L

RELATIVE ADDRESSING. Any operand that references main storage may use rela¬
tive addressing. If we have to refer to a byte that has no name, we may refer to its
position relative to a byte that has a name. For example, suppose we want to move
the third and fourth bytes of FIELD2 to the second and third bytes of FIELD1 • MVC
FIELD! +1(2), FIELD2 + 2:

(FIELD1 (FIELD2
before the MVC: JUNEAPR I L

after the MVC: JR I EAPR I L

Note: In order to move two bytes, we code an explicit length (2) in

operand-!. A relative address of + ! refers to the second byte, and +2
refers to the third byte.

SYMBOL LENGTH ATTRIBUTE. The Assembler permits explicit lengths coded ab¬
solutely, as was described, and symbolically:

absolute explicit length: MVC FIELD1 (5) FIELD2

symbolic explicit length: MVC FIELD! (L’FIELD2),FIELD2

The symbol length attribute uses L' followed by a symbolic name. In this example wc
want to move five bytes Since the length of FIELD2 is five, the Assembler under
stands the explicit length to be 5.

Figure 3-4 depicts unrelated MVC operations. Note the OBJECT CODE gener¬
ated for each statement. The Assembler lists under ADDR1 and ADDR2 the ad-
resses of operand-1 anc! operand-2 respectively. For example, statement-1 7 is MVC

n^nnl Th 655 ' 3 Yte 6ld' is 03002 and the address of Y' a 5-byte field is
03005. The instruction may be read as: Move the first three bytes of Y starting in
ocation 03005, to the field called X, starting in location 03002. The object code
instruction is six bytes long, beginning in location 003012. Chapter 6 gives the
interpretation of this machine language.
 61 Move Characters—MVC

LOC OBJ FCT C nOF ADDR 1 A DOR 2 STMT SOURCE STATEMENT

6 *
7 MVC MOVE CHARACTERS
8 *

003002 C1C2C3 10 X DC C 1 ABC * THESE FIELDS

003005 C4C5C6C 7CB n Y DC C•OEFGH• ARE ADJACENT
00300A C901D2D3D4D506D7 12 Z DC C ' I JKLMNOP• IN STORAGE

14 *
ACTION OF MOVE: RESULT OF MOVE:
15 *

17 MOVE 1 MVC X♦Y 1ST 3

BYTES OF Y INTO
003012 0202 4000 4003 03002 03005 1ST 3 BYTES OF X X= ''DEF •
18 M0VE2 MVC Z.x ALL BYTES OF X £
00 301B D20 7 400R 4000 0300A 03002 Y INTO Z Z= '' ABCDEFGH
19 M0VE3 MVC Z( 3 ) »X 1ST 3 BYTES OF X INTO
00301F 0202 400B 4000 0300A 03002 1ST 3 BYTES OF Z Z= 1' ABCLMNOP
20 M0VE4 MVC Z + 2(3),X 1ST 3 BYTES OF X INTO
003024 0202 400A 4000 0300C 03002 BYTES 3-5 OF Z z= ' IJABCNOP
21 M0VE5 MVC Z + 312)» X + 2 3RD BYTE OF X £ 1ST
00302A 0201 400R 4002 0300D 03004 BYTE OF Y INTO Z Z= 1* IJKCDNOP
22 M0VE6 MVC X+l (4) ,X X TC1 X+l, X+l TO X+2, X+2
TO Y, £ Y TO Y+l X= '•AAA*
003030 0203 4001 4000 03003 03002 Y= •AAFGH•
23 M0VE7 MVC X,X+1 LEFT SHIFT. MOVES X+l TO X,
003036 0202 4000 4001 03002 03003 X+2 TO X+l, Y TO X+2 X = • BCD'
24 M0VE8 MVC ZtX1 3) MVC DOES NOT PERMIT EXPLICIT LENGTH IN
00303C 0000 0000 0000 00000 00000 OPERAND-2
*** ERRI }R ***

FIGURE 3-4 Sample unrelated MVC operations.

Note instruction alignment—all the MVCs begin on an even storage location,

as shown under LOC (location): X'003012', X'003018', etc. These examples illus¬
trate some extreme cases, and although important to understand, most data move¬
ment is directly from one field to another defined with the same length.
MOVE1: Operand-1, X, is shorter than operand-2, Y. The implicit length (3) of X
governs the number of bytes moved.
MOVE2: Operand-1, Z, is longer than operand-2, X. The implicit length (8) of Z
governs the number of bytes moved.
MOVE3: The explicit length (3) overrides Z's implicit length of 8; only 3 bytes are
moved. With symbol length attribute, the statement could be: MVC Z(L'X),X.
MOVE4 and MOVE5 illustrate explicit length and relative addressing. In each case
the explicit length overrides the defined implicit length.
MOVE6 shows how to copy a character a specified number of positions to the right.
The leftmost byte of X contains 'A', which MVC copies four bytes to the right. It
is possible to propagate any character in this fashion because MVC moves one
character at a time, from left to right. This technique is useful to clear areas to
blanks.
MOVE7 shifts data one byte to the left. It may be useful to check the operation by
following the data movement one byte at a time.
MOVE8: We want to move three bytes, but have erroneously coded an explicit
length of 3 in operand-2 instead of operand-1. The Assembler generates six
bytes of hex zeros as the object code "instruction". These will cause a "program
interrupt" if the program is executed. MOVE3 shows the instruction correctly
written.
62 PROGRAMMING FOR CHARACTER DATA

For illustrative purposes, this text uses examples with declaratives named as X,
Y, and Z, but does not advocate such cryptic names in programs.

Problem 3-3 should now be attempted.

COMPARE LOGICAL CHARACTER—CLC

It is often necessary to determine if the contents of one field are equal to, greater than,
or less than, the contents of another field. Examples of the need to compare character
fields include:

1. Testing for valid card codes;

2. Checking for valid dates on cards;
3. Testing for ascending sequence of account numbers in an input file. In this test,
sequence:checking, the new account number just read is compared to the pre¬
viously processed account number.

The instructions to compare character fields are Compare Logical Characters

(CLC), and Compare Logical Immediate (CLI). All compare instructions and certain
others set the condition code described in Chapter 2. As a result of the operation, the
condition code is set as high, low, or equal, and may be interrogated with a condi¬
tional branch instruction. CLC may compare data in any format, but we normally
confine its use to comparing character fields.

NAME OPERATION OPERAND

[symbol] CLC S1,S2 or D1(L,B1),D2(B2)

The rules for CLC are:

1. CLC may compare fields from one to 256 bytes long.

. ' i--- 7 ^ •*- • V.UI

byte at a time. The condition code is set as follows:

CONDITION CODE
COMPARISON SETTING
Operand-1 equals operand-2 0 (equal)
Operand-1 is lower 1 (low)
Operand-1 is higher 2 (high)
3. CLC terminates comparison as soon as an u
nequal condition is encountered, or if
none, by the length of operand-1 (explicit or implicit).
63 Compare Logical Character—CLC

(X'FF'). A "character" field contains what is called "logical" data—unsigned,

nonarithmetic data. CLC is not suitable to compare arithmetic data in packed or
binary format. For compares that consider a plus or minus sign, use CP for packed
data, and C, CH, or CR for binary. Another logical compare operation on the 370,
CLCL (Compare Logical Long), has rather restricted use.
Figure 3-5 provides examples of CLC operations which should be examined
carefully.

LC1C OBJECT CODE AD0R1 A0DR2 STMT SOURCE STATEMENT

28 *
29 *** CLC COMPARE LOGICAL CHARACTER
30 *
003042. C1C2C3C4C5 31 F I EL 01 DC C•ABCDE * THESE FIELDS
003047 C6C7C8 32 FIELD2 DC C 'FGH • ARE ADJACENT
00304 A 5C5C 33 FIELD3 DC c '** • IN STORAGE*

35 * DATA COMPARED: COND'N CODE

36 *
00304C D502 4045 4040 03047 03042 37 C0MP1 CLC FIELD2.FIEL01 •FGH' > 'ABC' HIGH
003052 0504 4 04 0 4 04 5 03042 03047 38 C0MP2 CLC F I ELD1 » F IELD2 'ABCDE' < 'FGH**' LOW
003058 D502 4042 4045 03044 03047 39 C0MP3 CLC FIE LD1 + 2 t 3)» FI EL D2 ' CDE' <1FGH1 LOW
00305F D504 4 04 2 4 04 5 03044 03047 40 C0MP4 CLC FIEL01+2.FIELD2 'CDE FG' < 'FGH**' LOW
003064 D501 4048 4040 03 04 A 03042 41 COMP 5 CLC FIELD3.FIEL01 '**' < 'AB' LOW
42 C0MP6 CLC FIELD2.FIELD1+2I3) CLC DOES NOT PERMIT EXPLICIT
00 306A 00 00 0000 0000 00000 00000 LENGTH IN OPERAND-2
*** ERROR ***

FIGURE 3-5 Sample unrelated CLC operations.

COMP1: The operand-1 field, FIELD2, is shorter. CLC compares the three bytes of
FIELD2 against the first three bytes only of FIELD1. Because the data in FIELD2 is
logically greater than that of FIELD1, the condition code is set to high.
COMP2: The operand-1 field is longer. CLC compares the five bytes of FIELD1 against
the three bytes of FIELD2 plus the next rightmost two bytes of FIELD3 (two
asterisks). Operand-1 is lower.
COMP3: Operand-1 uses relative addressing and explicit length. CLC compares
bytes 3, 4 and 5 of FIELD1 against FIELD2.
COMP4: The instruction is similar to COMP3, with the explicit length omitted. The
implicit length of operand-1 is therefore 5.
COMP5: An asterisk (X'5C') is lower than character 'A' (X'CI'), so the operation
terminates as "low" after comparing only the first byte.
COMP6 illustrates erroneous use of explicit length in operand-2; omitting the length
corrects the error.

BRANCHING. CLC makes the comparison and sets the condition code. To test the
condition code to determine what action to take (for example, was the result of the
test high, low, or equal?), we use the following conditional branch instructions:

CONDITION
CODE CONDITIONAL BRANCHES

0 = Equal/zero BE (Branch equal) BNE (Branch not equal)

1 = Low/minus BL (Branch low) BNL (Branch not low)
2 = High/plus BH (Branch high) BNH (Branch not high)
64 PROGRAMMING FOR CHARACTER DATA

Each of the preceding conditional branch instructions is called an "extended

mnemonic," and is a unique use of the Branch on Condition (BC) instruction, ex¬
plained in detail in Chapter 6.
With normal processing, the computer executes instructions in storage, one
after another. Conditional branch instructions permit the program to 'branch' to
different addresses in the program. We may therefore code our program to test, for
example, for valid card codes. If a card does not contain the correct code in a
specified column, we may branch to an error routine that prints a warning message.

Example: Compare and conditional branch

NEW DS CL4 Contains the value of the account just read (assume
'1347').
PREV DS CL4 Contains the value of the previous account read
(assume '1208').
CLC NEW,PREV Compare the contents of NEW to PREV.
BH R20HIGH If NEW is higher, branch to R20HIGH (some ad¬
dress of a routine in the program).

The preceding instructions are read as follows: Compare the new account (contain¬
ing 1 347) to the previously read account (1208). NEW's contents being higher than
PREV, the condition code is set to high (2). Next, BH tests if the high condition is set.
Because the code is 'high', the program branches to R20HIGH. If the code was not
"high", the computer would execute the next sequential instruction (NSI) following
the BH.
Two other branch instructions are Unconditional branch (B), and No-operation
(NOP). The unconditional branch tests if any condition (high, low, equal) exists.
Since there is always at least one condition, we use B if a branch is always required.
For example, after processing an input record, we may return to read the next record
by means of an unconditional branch:

A1 OREAD GET CARD Read a card record

Process the record

B A1 OREAD Branch to read the next record

NOP, which tests no condition, is only occasionally used.

COMPARE AND BRANCH. The following examples illustrate the preceding dis¬
cussion. Assume the declaratives X, Y, and Z contain data and are each defined as DS
CL4:

Example: If X is greater than or equal to Y, branch to J10HIEQ (an address elsewhere

in the program).
65 Storage Immediate Format

CLC X,Y Compare X to Y

BH J10HIEQ Branch if high
BE J10HIEQ Branch if equal

This example could also be coded more efficiently as:

CLC X,Y Compare X to Y

BNL J10HIEQ Branch if X is not lower (high or equal)

Example: If X is greater than Z, branch to J20HI. Else, if Z does not equal Y branch
to J30NEQ.

CLC X,Z Compare X to Z

BH J20HI Branch if high
CLC Z,Y Compare Z to Y
BNE J30NEQ Branch if unequal

Problem 3-4 should be be attempted.

STORAGE IMMEDIATE FORMAT

Storage-to-Storage (SS) format references two fields in main storage, whereas the
Storage-Immediate (SI) format references only one field. The other data used is a
1-byte constant, built into the instruction itself. The Assembler stores the immediate
constant in the second byte of the object code instruction. The constant is therefore
part of the object instruction.

MOVE IMMEDIATE (MVI) AND COMPARE LOGICAL IMMEDIATE (CLI). The

immediate instructions Move Immediate (MVI) and Compare Logical Immediate
(CLI) are efficient instructions to move or compare 1-byte fields.

NAME OPERATION OPERAND

[symbol] MVI SI,12 or D1 (B1), 12

[symbol! CLI SI,12 or D1 (B1), 12

The rules for MVI and CLI are similar to those for MVC and CLC, with the following
exceptions:

1. Operand-1 references a single main storage location. The operand does not per¬
mit an explicit length code because the number of bytes is always one.
2. Operand-2 contains a 1 -byte immediate constant. The immediate constant value
may be character (C), hexadecimal (X), binary (B), or a decimal digit, but not
zoned (Z) or packed (P).
66 PROGRAMMING FOR CHARACTER DATA

Figure 3-6 depicts some typical use of immediate operations.

LOC OBJECT CODE AODR1 ADDR2 STMT SOURCE STATEMENT

003070 F0F0FO 47 SAVE DC C *000' SAVE= IF0|F0|F0|

003073 F5 48 CODE IN DC C'5 '

50 ♦
MVI S 51 ** * MVI MOVE IMMEDIATE
xi.
003074 92 3B 406E 03070
52 *
53 MOVIMMI MVI SAVE.C't* SAVE= I5BIF0IF0I
003078 925 B 4 06E 03070 54 MOV I MM2 MVI SAVE,X'5B' X•5B*IS IDENTICAL TO C' $•
00307C 0000 0000 00000 55 MOV IMM3 MVI SAVE!1),C•?• ERROR IF LENGTH IN OP-1.
*** ERROR ***
003080 0000 0000 00000 56 M0VIMM4 MVI SAV E+ 1» =C•$ • ERROR: CANNOT USE LITERAL
*** ERROR

58 *
CLI 5 59 *** CL I COMPARE LOGICAL IMMEDIATE
TT 60 *
003084 95F5 4071 03073 61 C0MIMM1 CL I C0DEIN,C'5' SETS CONDITION CODE EQUAL
003088 0000 0000 00000 62 COM I MM2 CL I C0DEINII),C•5 • ERROR IF LENGTH IN OP-1.
*** ERROR $ $$
00308C 0000 0000 00000 63 COM I MM3 CL I C0DEIN,P'5' ERROR IF PACK OR ZONED
*** ERROR

FIGURE 3-6 Sample unrelated MVI and CLI operations.

MOVIMMI moves a 1-byte dollar sign defined in character format. MOVIMM2

shows a hexadecimal dollar defined. Both statements generate identical object
code, although C'$' provides better clarity to users. Note the object code for
MOVIMMI begins at 003074 and contains 925B406E: The machine code for
MVI is hex 92, and the dollar sign, X'5B', is in the next (second) byte.
COMIMM1 compares the contents of a 1-byte field, CODEIN, to an immediate
operand. Because both contain the character value '5', the condition code is set
to equal.
MOVIMM3, MOVIMM4, COMIMM2, and COMIMM3 illustrates common coding
errors that the Assembler recognizes. MOVIMM4 incorrectly uses a “literal."
Literals are covered in the next section.

LITERALS

The use of literals is a short cut way of writing a DC. The literal begins with an equal
(=) sign followed by a character for the type of constant, and the constant contained
with apostrophes ('). The same basic rules that apply to DCs apply as well to literals.

Example: Use of a literal in place of a DC

use of a DC: HEADING DC C’lNVENTORY’

MVC PRINT+20(9),HEADING
use of a literal: MVC PRINT+20(9), = C’lNVENTORY
67 Literals

Both operations accomplish the same results. However, the use of the literal, ^IN¬
VENTORY', saves us from writing the line of coding for the DC.
The Assembler recognizes that an operand beginning with an equal sign is a
literal. The Assembler creates the object code constant, assigns an address, and stores
the constant as part of the program in a "literal pool", without a name. Two or more
literals defined identically within a program are usually set up as only one constant in
the literal pool. Literals generated by IOCS (input/output system) macros are also
included in the pool.

Note: A literal is different from an immediate operand. Immediate in¬

structions, such as MVI and CLI, must have a 1-byte constant in
operand-2. A literal, however, must be preceded by the equal sign, and
generates a constant in storage. For 1 -byte nonarithmetic constants, im¬
mediate instructions should be used.

Example: Contrast of a literal and an immediate operand

use of a literal: MVC PRINT+20(1 ), = C’$’

use of immediate: MVI PRINT+20,C’$’

Although both operations accomplish identical results, note: (a) MVC requires a
length (I) in operand-1 if PRINT is not defined with a length of one; (b) MVC uses a
literal—the assembled address of operand-2 will contain the location of the constant
($); (c) MVI contains the $ as part of the assembled instruction; (d) MVI is more
efficient coding here because it is only four bytes long. MVC requires six bytes for the
instruction plus one for the constant defined by the literal =C'$'.

THE LITERAL POOL. The Assembler organizes the literal pool into four sections,
and within these sections, stores the literals in order of their appearance in the
program.
SECTION CONTENTS

1 All literals whose length is a multiple of eight.

2 All remaining literals whose length is a multiple of four.
3 All remaining literals whose length is a multiple of two.
4 All odd-length literals.

The Assembler stores the literal pool at the end of the program and prints it
immediately following the END statement. However, the Assembler command
LTORG can cause the Assembler to store literals anywhere in the program.

NAME OPERATION OPERAND

[symbol! LTORG Not used—omit

68 PROGRAMMING FOR CHARACTER DATA

Wherever we use LTORG, the Assembler stores and prints the literals up to that
point, from either the start of the program or from the previous LTORG. Figure 3-7
depicts various uses of literals. Note that the sequence of the literals in the literal pool
after LTORG is different from the sequence in which they were originally coded. (The
next chapter covers the ZAP and AP instructions.)

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

71 $
72 *** L ITERALS
73 *
003091 4040404040404040 74 SAVLIT DC CL 81 1
003099 oooooc 75 PAGECT DC PL3’O'
00309C oooc 76 L INECT DC PL2'O'
00 309 F 77 PRINT OS CL 121

0031 1 7 00
0031 IB 02 07 408F 4136 03091 03138 79 MVC SAVLIT,=C'COMPUTER' MOVE CONSTANT
0031 IF F 82 0 4 09 7 4 146 03099 03148 80 ZAP PAGECT,=P'0' clear PAGECT
003174 FA 10 40 9 A M47 0309C 03149 81 AP L INECT,=P'1• ADD ONE TO LI NEC
00312 A 0205 4 OB 0 4 1 3 E 030B2 03140 87 MVC PRINT+20(6),=X'40204B202060' MOVE HEX CONSTAN'
003130 0201 40R6 4144 0303 8 03146 83 MVC PR INT+26(2),=C'**' MOVE ** TO PRINT

00313B 85 LTORG
00*138 C3060407F4F3C509 86 =C'COMPUTER’
003140 407 04B202060 87 = X '40204B202060'
003146 5C 5C 88
f generated by
003148 oc 89 = P '0 •
003149 re 90 =p • i ■

FIGURE 3-7 Sample use of literals.

EQUATE SYMBOL—EQU

EQU is used to equate one symbolic address to another. The Assembler only acts on
EQU, and does not generate executable code.

NAME OPERATION OPERAND

[symbol] EQU an expression

1. We may assign more than one symbolic name to a field, just as a person may have
a full name and a nickname:

PRINT DC CL133” Define PRINT

P EQU PRINT Equate P to PRINT

In this example, the Assembler assigns the identical attributes to P as it has to

PRINT. We may now use either symbol to reference the same location, with a
length of 133 bytes. Note, however, the Assembler rule: the symbol in the EQU
operand field, PRINT, must be defined before the EQU statement.
2. We may give symbolic names to an immediate operand:
69 Sample Program—Read and Print Customer Records

CODE EQU C’5’ Assign '5' to the name CODE.

CLI CARDNO.CODE Compare CARDNO to C'5\

We may use CODE in place of C'5' in an immediate operand. The Assembler

recognizes that CODE is a reference to a value C'5', and substitutes C'5' wherever
it encounters the operand CODE. This technique facilitates program modifications.
We may have to change the value of the immediate operand. Rather than change
many instructions in the program, we merely change the operand in the EQU
statement, and reassemble the program.
3. We can equate an address using the Assembler's location counter reference. An
asterisk as an operand is a reference to the current value in the location counter:

LOC: X’3012’ SAVE DS CL3

KEEP EQU *+5

After the Assembler processes SAVE, its location counter contains X'3015'. The
address of KEEP is equated to the “address” in the operand, * + 5, meaning the
contents of the location counter plus 5. KEEP is therefore assigned the address
X'3015' plus 5, or X'301 A'. KEEP will have a length attribute of one.

Problem 3-5 should now be attempted.

SAMPLE PROGRAM—READ AND PRINT CUSTOMER

RECORDS

Figure 3-8 depicts a flowchart for a simple program that reads customer records and
prints selected fields, and Figure 3-9 provides the coding.

CARD COLUMN DESCRIPTION PRINT POSITIONS

1 Record code
6-10 Customer number 11-15
1 1 -30 Customer name 18-37
41 -46 Balance owing 40-46 (prints as xxxx.xx)

PROCEDURE

1. A heading prints at the top of the first page (the program does not provide for
printing headings at the top of every page printed).
2. The program checks column 1 of each input record for valid code (3). An invalid
code causes an error message.
3. To ensure that each customer record is in ascending sequence (one record per
customer), the program compares the current customer (CUSTIN) to the pre¬
viously processed customer number (PREVCUST). If the new customer number is
higher, the program stores CUSTIN in PREVCUST for the next input test. An equal
or low customer number causes an error message.
70 PROGRAMMING FOR CHARACTER DATA

FIGURE 3-8 Flowchart to read and print customer records.

4. For valid records, the program moves customer name, number and balance
owing to the print area, and inserts a decimal point in the balance field.
5. Immediately before PRINT is a 1-byte constant called BLANK. After printing, the
program copies the contents of BLANK through the 1 33 bytes of PRINT. The blank
character propagates through PRINT, clearing the entire field. (See MOVE6 in
Figure 3-4 for an explanation.)
71 Sample Program—Read and Print Customer Records

reading and printing customer records

TMT SOURCE STATEMENT

4 4 I N I T I A L I Z A
5 4
6 PR0G03 I N I T INITIALIZE
27 OPEN CARD,PR INTER
36 M VC PRINT,BLANK CLEAR PRINT AREA

30 PUT PR PRINTER,PRINT.SKI SKIP TO PAGE

45 MVC P + 40(7) »=C# BALANCE*
46 MVC P«-14<8> .=C*CUSTOMER
47 PUTPR PRINTER,PRINT.BSP2 PRINT HEADING
54 MVC PRINT.BLANK

56 444 MAIN PROCE:S S I N G

57 4
50 A 1 OREAD GET CARD.CARDIN READ RECORD
64 CLI COOEIN , C • 3 ■ VALID RECORD CODE?
65 BNE R10INVCD * NO ERROR
66 CLC CUSTIN.PREVCUST CUST NO. IN SEQ?
67 8NH R20SEQER * NO ERROR
60 MVC PREVCUST.CUSTIN MOVE NEB CUST TO PREV
69 4 MOVE TO print:
70 MVC CENTSPR.B ALIN♦4 * CENTS POSITIONS
71 MVI DECPR.C*.• * DECIMAL POINT
72 MVC DOLLPR.6 ALIN * OOLLAR POSITIONS
73 MVC NAMEPR,NAME IN * NAME
74 MVC CUSTPR.CUSTIN * CUSTOMER NO.
75 PUTPR PR INTER.PR I NT.BSP 1 PRINT CUST RECORD
02 MVC PRINT.BLANK
83 B A10READ

05 444 ENO-GF-FIL ROUTINE

06 4
87 D1OEND CLOSE CARD.PR INTER
96 EO J

100 444 ERROR ROUT

10 1 4 —

102 Rl0INVC 0 MVC MESSAGPR.INVCARD INVALID RECORD CODE

103 B R30

105 R2CSEQER MVC MESSAGPR.OUTSEQ OUT-OF-SEQUENCE

107 R 30 MVC NAMEPR.NAMEIN MOVE NAME A

108 MVC CUSTPR.CUSTIN CUST NO. TO PRINT
1 09 PUTPR PR INTER.PRI NT,BSP1 PRINT ERROR MESSAGE
116 MVC PRINT.BLANK
1 1 7 0 A10READ

FIGURE 3-9 Read and print customer records.

6. When the end-of-file is reached, the program branches to D10END, closes the
files, and ends execution.

Although a relatively simple program, it is still organized into logical sections:

Initialization, Main Processing, End-of-File, and Error routines. Also, program labels
and data names are clear and meaningful, and along with the comments, the pro¬
gram is close to self-documenting.
 120 ♦ ** OECLAHATIVES
12 1 * -

123 CARO DEFCD OlOENO DEFINE INPUT FILE

147 PRINTER OEFPR DEFINE PRINT FILE

172 CARO IN os OCL8C input record:

173 CODE IN os CL 1 01-01 RECORD CODE
174 OS CL 4 02-05
175 CUSTIN OS CL 5 06-10 CUST. NO.
176 NAME IN OS CL 20 11-30 CUST NAME
177 OS CLIO 31-40
178 BAHN OS CL6 41-46 BALANCE
179 OS CL 3 4 47-80

181 BLANK oc C* • BLANK TO CLEAR PRINT

182 PRINT OS 0CL133 PRINT area:
183 oc CL 1 1 • • ♦
184 CUSTPR OS CL 0 5 • CUST. NO.
1 85 OC CL02* • ♦
186 NAMEPR OS CL20 4 NAME
If 7 DC CL 0 2* • ♦
188 DOLLPR OS CL04 • S POSITIONS
189 OECPR OS CLO 1 * DECIMAL POINT
190 CENT SPR OS CL02 * CENTS POS'NS
191 DC CL03* * A
192 MESSAGPR DC CL22* • * ERROR MESSAGE
193 oc CL61• • A

195 P ECU PRINT EQUATE P TO PRINT

197 IN VC ARO DC CL22•INVALI0 RECORD CODE*

198 OUT SEQ DC CL22*RECORD OUT OR SEQUENCE*

200 PREVCUST OC CL5 • • PREV. CUST. NO.

202 LTORG
203 =C*»*BOPEN •
204 =C*CUSTCNER*
205 — C'* tBCLOSE *
206 = V < PCOCIT)
207 =A(PR INTER)
208 = A C PR INT)
209 =A I CARD >
210 = AIC AROINI
211 =C*BALANCE*

213 END PROG03

CUSTOMER BALANCE

12345 KE ANDERSON 1234.56

24680 D BAKER 5432.10
33333 JM COUSTON 3333.33
34567 AB DONOVAN INVALID RECORD CODE
12312 KM E CWARDS RECORO OUT OF SEQUENCE
99999 MM FISHER 3456.32

FIGURE 3-9 (Continued)

72
 73 Problems

DEBUGGING TIPS

errors'Cherk fi Mh n° anthmetic stands a good chance of containing

errors. Check first the diagnost.es immediately following the assembled program for
any errors that the Assembler has located (these may cause execution errors as welh
e most common error that the Assembler identifies is spelling mistakes- an opera-

dXTC'T ' SUCh ^ MCV f°r MVC' °r a" °Perand iS n0t sPelled th<- way a is
eftned. Such errors may cause the Assembler to generate a "dummy" instruction of
™ hat will cause an "Operation Exception" if executed. Failure to initialize
IIMIT (or the instruction USING introduced in a later chapter) will cause a large
number of "Addressability" errors. 8
Violating the rules of declaratives is also common, such as defining a DS with a
constant, which ,s treated as a comment, and defining a DC without a constant
Watch for defining a constant length (Ln) that does not agree with the defined

ri^ry01, ^ CL3 DuJuu 11 'S 6aSy f° C°de the wron§ constant; the constant DC
CL5 0 generates 'Obbbb' rather than '00000'.
Coding an explicit length in an MVI or CLI or in operand-2 of an MVC or CLC
will cause Assembler errors. The program, when corrected and reassembled may
cause errors during execution. Be sure that the input definition agrees exactly with
t e actual input record format—any difference will cause incorrect results. Failure to
clear the print area to blanks will cause "garbage" on the printed lines. A common
error is caused by omitting the explicit length from an MVC used with relative
addressing, as:

PRINT DC CLI 33”

MVC PRINT+95, = C’DATE’

The computer will move 1 33 bytes, starting from the first byte of the literal 'DATE'_
perhaps a good reason to minimize (or avoid?) use of relative addressing. The areas
following PRINT will be clobbered, with often spectacular results that may not occur
until later in the execution.
An error difficult to detect is caused by incorrect branching—reversing oper¬
ands 1 and 2, or using, for example, BNH instead of BNL.
A disastrous error is caused by coding GET or PUT incorrectly, as, for example,
GET CARDIN,CARD; the computer may end up executing outside of the program
area, perhaps even executing garbage in the Supervisor.
Appendix B contains a list of program checks (interrupts) that can occur during
program execution, along with possible causes of the errors.

PROBLEMS

3-1. DEFINE STORAGE. Define the following as DS's:

(a) An 80-byte area called OUT to be used for card output.
(b) A 100-byte area that does not increment the Location Counter.
74 PROGRAMMING FOR CHARACTER DATA

(c) Five 10-byte areas defined with one statement.

(d) An area called DATE, subdivided with three 2-byte fields called respec¬
tively DAY, MONTFH, and YEAR.
3-2. DEFINE CONSTANT. Define the following as DC's:
(a) A field called ASTER, one byte long, containing an asterisk.
(b) A field of ten blanks, called BLANKS.
(c) A constant containing "SAM'S”.
(d) A constant of ten character zeros.
(e) Three 5-byte constants all containing blanks, defined with one statement.
3-3. MOVE CF1ARACTER. Given the declaratives shown, code the following unre¬
lated questions. Show the contents of both fields after completion of the opera¬
tion.

A DC C’123’ These fields are defined in storage

B DC C’4567’ adjacent to each other.
C DC C’XY’

Example: Move the contents of C to the leftmost two bytes of A: MVC A(2),C.
(a) Move the contents of C to the second and third bytes of B.
(b) Move the rightmost byte of A to the third byte of B.
(c) Move A to the bytes starting at the third byte of B.
(d) Use one MVC to change all the contents of A, B and C to character 1's.
(e) Use one MVC to shift both A and B one byte to the left, as follows:

before: 1 234567
after: 2345677
A B

3-4. COMPARE AND BRANCFT Given the declaratives, code the following:

D DC C’ANN’
E DC C’MOE’
F DC C’SAL’

(a) If E is less than or equal to F, branch to G40.

(b) If D is greater than E but not less than F, branch to G50.
3-5. Show by an 'X' the Condition Code set by the following. D, E, and F refer to the
DC's in Problem 3-4. Explain if invalid assemble or execute.

High Low Equal

(a) CLC D,F ["

(b) CLC F,E
(c) CLC D =C’BOB’
75 Problems

(d) CLI E.C’P’

(e) CLI F.C’F’
(f) CLI D(1 ),=C’A’

3-6. PROGRAM ASSIGNMENT.

Required: A program that reads Inventory records and prints selected data.
Input:

COLUMN CONTENTS COLUMN CONTENTS

1 Record code ('4') 9-28 Description
2-3 Branch number 29-30 Month
4-8 Stock number 31 -35 Quantity on hand
36-42 Value (xxxxx.xx)

Output (including/heading):

BRANCH STOCK NO DESCRIPTION MONTH QUANTITY VALUE

XX xxxxx X-X XX xxxxx xxxxx.xx

Procedure:
— Check the record code ('4') to ensure that the program processes only valid
records. By-pass invalid records and print a message 'INVALID RECORD'.
— To ensure that the records are in proper order, sequence-check them on
Stock number. If out of sequence, print an error message 'OUT OF SE¬
QUENCE'.
— Provide input data that tests for invalid record code and out-of-sequence
condition.
— Print the fields as shown, in any suitable print positions. As an optional
extra, code the program to convert the numeric input month into alphabetic
for printing (i.e., '01' should be 'JANUARY').
— Flowchart, code, and test the program. Be sure to use the programming
standards for your installation.
 CHAPTER 4

DECIMAL DATA AND

ARITHMETIC I

Chapter 3 covered the use of data in character format. Few programs are written
using just this format, because generally we need to perform arithmetic—addition,
multiplication, etc. The most common format for arithmetic is packed decimal. This
chapter introduces three data formats: hexadecimal, zoned, and packed. The instruc¬
tions, MVN and MVZ, although technically character operations, are covered here
because they are mostly used with packed data. This chapter then covers the basic
packed operations for packing, unpacking, addition, subtraction, and comparing.

HEXADECIMAL CONSTANTS

Two hexadecimal digits can represent any of the 256 different characters. They
normally define constants that cannot easily be defined as character packed, zoned,
or binary. A major use is in defining edit word constants (Chapter 5). The following
rules apply to hexadecimal constants:

1. The constant may be defined in length from one byte (two hex digits) to 256 bvtes
(512 hex digits).

76
77 Move Numeric (MVN) and Move Zones (MVZ)

2. They may contain only the hex digits 0 through 9 and A through F.
3. A length (Ln) if defined specifies the number of bytes, one byte for each pair of
hex digits. The Assembler right-adjusts hex constants. Therefore, if the defined
length is less than the constant, the Assembler truncates the constant on the left. If
the defined length is longer, the Assembler pads hex zeros to the left.

See Figure 4-1 for example hex DC's. Compare the defined constant to the
object code:

LOC OBJECT STMT SOURCE STATEMENT

6 *
7 OC HEXADECIMAL FORMAT
8 *
003002 1 A7 6 9 HEX 1 DC X 1 1A76• 1 1A | 76 1
003004 76 10 HEX2 DC XL 1 ’ 1 A7 6 ’ 176 1 TRUNCATES
003005 001A76 1 1 HEX3 DC XL 311A7 61 1 00 |1 1A |176 1 PADS ZEROS
003008 012C 12 HE X4 DC X'12C • ! 01 12 C 1 PADS ZERO
00300A FFFFFF 13 HEX5 DC 3X1F F' IFF ||FF|IFF | 3 CONSTANTS

FIGURE 4-1 Sample DC statements in hexadecimal format.

FHEX1 defines a DC that requires two bytes of storage.

HEX2 has a length specified as one byte and a constant as two bytes. This is a
possible coding error, because the Assembler truncated the constant on the left.
HEX3 has a length specified as three and a constant of two bytes. The Assembler pads
zeros on the left.
HEX4 defines a constant with three hex digits—1 Vi bytes. The Assembler pads a hex
zero to the left, resulting in a 2-byte constant.
HEX5 illustrates the duplication factor. Three constants each containing X'FF' are
defined. The name HEX5 refers to the first constant with a length of one byte.

Hex constants should not be confused with constants of other formats. Note the
difference between the following:

FORMAT CONSTANT BYTES HEX REPRESENTATION

character DC C'ABCD’ 4 /C1/C2/C3/C4/

hexadecimal DC XABCD’ 2 /AB/CD/

MOVE NUMERIC (MVN) AND MOVE ZONES (MVZ)

NAME OPERATION OPERAND

Isymbol] MVN 51.52 or D1 (L,B1 ),D2(B2)

[symboll MVZ 51.52 or D1(L,B1),D2(B2)
 78 DECIMAL DATA AND ARITHMETIC I

These move operations are mainly used to manipulate half-bytes for decimal
arithmetic. The rules for both instructions are similar to those for MVC, with the
following exceptions:
MVN moves only the numeric portion of the half-byte, the rightmost four bits,
numbered 4 to 7. From one to 256 numeric portions may be moved from the
operand-2 field to the operand-1 field. The zone portion is undisturbed.

zone numeric
bits: 0 0 0 0 0 0 0 0
position: 0 1 2 3 '4 5 6 7
I

MVZ moves only the zone half of the byte, the leftmost four bits, numbered 0 to
3. From one to 256 zones may be moved. The numeric portion is undisturbed.
Figure 4-2 provides examples of MVN and MVZ operations:
The first MVN moves the numeric portion of each byte of A (1, 2, and 3) to the
numeric portion of each byte of B. The second MVN, illustrating relative addressing
and explicit length, moves two numerics, starting from A to B + 1.
The first MVZ moves zone portions (X'F's). The second MVZ moves one zone
from B + 1 to B + 2.

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

00300D FI F2F3 18 A DC C'123' A= | FI IF2 IF3I

003010 45678C 19 B DC X'45678C' B= (45 167 1 8C 1

21 $
22 MVN MOVE NUMERICS
23 *
003013 00
003014 D102 40 0E 400B 03010 0300D 24 MVN B*A B= 141 162 1 83 1
00301 A D10 1 400F 4 00B 03011 0300D 25 MVN 8+1(2),A B= |45l16111 82 |

27 *
28 *** MVZ MOVE ZONES
29 *
003020 D30 2 400E 4 00 B 03010 0300D 30 MVZ B, A B= 1F 51 F 7 1 FCI
003026 D300 4010 400F 03012 0301 1 31 MVZ B+2(1),B+1 B= 1451671! 6C !

FIGURE 4-2 Sample unrelated MVN and MVZ operations.

Problem 4-1 should now be attempted.

ZONED DECIMAL DATA

Zoned decimal data is similar to character data, but is of limited use. Zoned is
sometimes used, for example, to define a field containing data that will be later
packed, such as an amount read from an input file. The following rules govern zoned
declaratives:
79 Zoned Decimal Data

1. The length may be defined from one to 16 bytes.

2. The constant may contain only the digits 0 through 9, a sign (+ or -) and a
decimal point. The Assembler does not translate or store the decimal point—we
code it only for documentation, where we intend the decimal to be.
3. We may define more than one zoned constant with one DC, separated by com¬
mas.
4. Except for the rightmost digit of the constant, the Assembler converts each zoned
digit 0 through 9 to X'FO' through X'F9'. If the constant is positive, the Assembler
generates a plus sign X'C', and if negative a minus sign, X'D'. For example DC
1 23.45 becomes /F1/F2/F3/F4/C5/. The rightmost byte X'C5' contains the plus
sign in the zone portion. The zone 'C is equivalent to the plus sign (12-zone) on
the punched card. The minus zone 'D' is equivalent to the punched card minus
sign (11 -zone).
5. We code the sign (+ or -) to the left of the constant, such as DC Z'-l .25'. To
represent a positive value, we code a + sign, or omit the sign altogether.
6. We may specify length (Ln) as for hexadecimal format. If the constant is shorter
than the specified length, the Assembler right-adjusts the constant and pads
leftmost zeros:

DC ZL3’25’ /F0/F2/C5/

If the constant is longer than the specified length, the Assembler truncates
the constant on the left:

DC ZL2’1234’ /F3/C4/

Figure 4-3 illustrates zoned declaratives explained as follows:

ZONEO defines a DS as five bytes long, to be used for zoned data.

ZONE1 is a DC with a decimal point in the constant. Note the generated object code
on the left.
ZONE2 shows a DC with a minus sign coded to the left. The Assembler stores the
sign in object code on the right as X'D'.

LOC OBJECT CODE STMT SOURCE STATEMENT

35 $
36 * DC ZONED FORMAT
37 $
00302C 38 ZONEO DS ZL5 5-BYTE ZONED AREA
003031 F1F2F3C5 39 ZONE 1 DC Z* 123.5’ 1F1IF2IF3IC5I IGNORES DEC
003035 F5F0F0F0D0 40 Z0NE2 DC Z’-500.00’ 1 F 5|FO1FO|FO|DO 1 MINUS
00303A F OF 1F2C3 41 ZONE 3 DC ZL4*123’ IF0IF1IF2IC3I PADS ZEROS

00303E F2C3 43 Z0NE4 DC ZL2 ’ 123’ IF2IC3I TRUNCATES

003040 F0C0F0C0F0C0 44 ZONE 5 DC 3ZL2’0 * 1FO|CO 1FO1 CO|FO| 1 CO I 3 CONSTANTS
003046 F1F2C3C 4F6C7 1 45 Z0NE6 DC Z *123,4,67 • 1 F 1 | F 2 IC3IC4IF6|1 C 7 | 3 CONSTANTS

FIGURE 4-3 Sample zoned declaratives.

80 DECIMAL DATA AND ARITHMETIC I

ZONE3 and ZONE4 use the length indication (Ln). In ZONE3, X'FO' is padded on the
left, and in ZONE4 the constant is truncated.
ZONE5 defines three identical constants. A reference to ZONE5 is to the first 2-byte
constant.
ZONE6 defines three constants, each separated by a comma. The comma is not
stored. A reference to ZONE6 is to the first 3-byte constant.

Note the difference between the generated code for the following character and
zoned DC's:

character: DC C’l,234.56’ /F1/6B/F2/F3/F4/4B/F5/F6/

zoned: DC Z’l ,234.56’ /C1/F2/F3/F4/F5/C6/

2 constants generated by the comma

PACKED DECIMAL DATA

Ordinary decimal data is performed on fields in packed format. We define these

fields either initially as packed, or we use the PACK instruction to translate character
or zoned data into packed. Each packed byte contains two digits, one in each
half-byte. The plus or minus sign is the rightmost half-byte of the field. For example,
the packed value +125 requires two bytes, as 1 12 | 5C | . The binary representation
of this field is 0001 | 0010 | 0101 | 1100 | . The standard plus sign (X'C or binary
1100) is equivalent to the plus (1 2-zone) on a punched card. The standard minus sign
(X'D' or binary 1101) is equivalent to the punched card minus (11 -zone). All packed
fields must conform to the following rules:

1. All digit positions (all half-bytes other than the rightmost sign) may contain only
digits 0 through 9 (binary 0000 through 1001).
2. The rightmost half-byte must contain a sign. There are four valid plus signs and
two valid minus signs:

BINARY HEX SIGN BINARY HEX SIGN

1010 A + 1101 D — standard minus sign
1011 B 1110 E +
1100 C + standard plus sign 1111 F +

3. Packed fields may be a minimum of one byte long (one digit plus a sign) and a
maximum of 16 bytes (31 digits plus a sign).

PACKED DECIMAL CONSTANTS. Constants are defined as packed for use in dec¬
imal arithmetic. The rules for packed, which are similar to zoned, are as follows:
81 Packed Decimal Data

1. The length may be defined from one to 16 bytes.

2. A packed constant, like zoned, may contain only the digits 0 through 9, and
optionally a decimal point (.) and a sign (4- or —). The Assembler does not store
the decimal point, which is chiefly for program documentation.
3. One DC may define more than one packed constant, each separated by a comma.
4. We may also use length indication (Ln). The Assembler right-adjusts the constant
to permit padding leftmost zeros or truncating on the left.

The Assembler converts the packed constant to object code as follows:

1. The rightmost half-byte (numeric portion) of the assembled constant contains the
sign, X'C' for plus and X'D' for minus. For example, DC PL3'1234' is converted to
packed as /01/23/4C/.
2. All other half-bytes contain a digit. Other than the rightmost byte which has a digit
and a sign, all bytes contain two digits. A packed constant, therefore, always has
an odd number of digits, one to 31.

Figure 4-4 depicts packed DC's, explained as follows:

PACK1 packs three digits into two bytes. The plus (+) sign is optional.
PACK2 defines a negative constant.
PACK3 packs four digits into three bytes. The Assembler inserts a zero digit in the
leftmost half-byte. Note that a packed constant defined as an even number of
digits results in an odd number of packed digits. Also, the decimal point acts as a
comment, and is not stored.
PACK4 defines the length longer than the constant. The Assembler pads zeros on the
left.
PACK5 defines the length shorter than the constant. The Assembler truncates the
leftmost digit.
PACK6 defines three identical constants containing zeros.
PACK7 defines three constants, each separated by a comma, which is not stored.
A reference to PACK7 is to the first 2-byte field.

LOC OBJECT CODE STMT SOURCE STATEMENT

49 * -
50 $ DC PACKED FORMAT
51 *
52 PACK1 DC P * + 370' I37I0CI PLUS SIGN
00304C 37 0C
53 PACK2 DC P 1 -500' I50IODI MINUS SIGN
00304E 500 D
54 PACK3 DC P' 12.34' 101I23I4C1 IGNORES DEC
003050 01234C
55 PACK4 DC PL4*12345' 100112134 | 5C 1 PADS ZERO
003053 0012345C

003057 34 5C 57 PACK5 DC PL2'12345' 134|5 C1 TRUNCATES

loo IOC 100|0C|00|IOC 1 3 CONSTANTS
003059 ooocooocoooc 58 PACK6 DC 3PL2'0'
59 PACK 7 DC PL2•125,215*387' 112I5C 12115C 13817C| 3 CONSTANTS
00305F 125C215C387C
60 PACK8 DC P'07',C'JULY' |00|7C101IE4 ID3IIE8I 2 CONSTANTS
003065 007CD1E4D3E 8

FIGURE 4-4 Sample DC statements in packed format.

82 DECIMAL DATA AND ARITHMETIC I

PACK8 defines two constants, the first packed and the second character. A reference
to PACK8 is to the first field, the 2-byte packed constant.

PACKED OPERATIONS

The computer can perform arithmetic only on valid numeric fields (packed decimal
and binary). Since input data from cards is in character format, it is necessary to
convert into packed, using the PACK operation. In packed format, operations such as
AP, SP and ZAP can perform arithmetic, and CP can perform comparisons. The
UNPK operation (and ED in the next chapter) converts the packed data into printable
characters.

PACKING FIELDS—PACK. Data normally appears in packed format by (1) a con¬

stant defined as packed, or (2) an instruction, PACK, that converts character or zoned
fields into packed. The standard steps to process decimal arithmetic are:

1. Read an input record. We may define card amount fields as character or zoned,
but regardless of our definition, the card content is read in character format.
2. Convert (PACK) character amount fields into packed.
3. Perform decimal arithmetic on packed fields.
4. Prepare the output area. Output on tape and disk may be any format. Output on a
printer or card punch is usually in character format; the packed fields must be
either unpacked or "edited" into the print area (the next chapter covers editing).
5. Write the output record.

Although PACK is normally used to convert character and zoned to packed

PACK executes regardless of the format. There is no checking for valid data, and
PACK can easily generate "garbage" if applied to the wrong data field.

NAME OPERATION OPERAND

[symbol] PACK Si ,S2 or D1 (LI ,B1 ),D2(L2,B2)

The rules for PACK are as follows:

1. The maximum length of each operand is 16 bytes. Either operand may specify an
explicit length (LI and L2). y H y
2. Bytes referenced by operand-2 are packed one byte at a time from right to left into
the operand-1 field. In the rightmost byte the half-bytes are reversed:

ope rand-2: F 5

operand-1 5 F

zone numeric
 83 Packed Operations

In the example, the zone portion of the rightmost byte of operand-2 (XT') is placed
in the numeric portion of the rightmost byte of operand-1. The numeric portion
of operand-2 (X'5') is placed in the zone portion of operand-1. It becomes the
rightmost, or units, digit.
3. Other than the rightmost byte, all other zones of operand-2 are ignored. PACK
extracts numeric portions from operand-2 one at a time from right to left, and
places them adjacent to one another in the operand-1 field. The following instruc¬
tion packs the contents of ZONED into PACKED:

ZONED DC Z’12345’ / 1/F2/F3/F4/C5/

PACKED DS PL3
/12/34/5C/
PACK PACKED,ZONED

Note that the zoned sign C becomes the packed sign. The zoned 5 becomes the
rightmost digit, and each other numeric ZONED digit is extracted and placed in
PACKED. PACKED now contains data on which we may perform arithmetic.
4. PACK terminates when all digits are transmitted. If operand-1 is too short to
receive all the digits, the remaining leftmost digits of operand-2 are ignored. If
operand-1 is longer than necessary to receive all the digits, its leftmost bytes
are filled with zeros (X'O'). In any event, PACK fully erases the previous contents
of the receiving field.

Figure 4-5 gives various unrelated PACK examples which should now be
studied:

PACKA illustrates a conventional PACK operation. H, a 5-byte zoned field, requires 3

bytes when converted to packed format.
In PACKB, operand-1, G, is one byte longer than necessary for the PACK operation.
PACK pads leftmost zeros in the leftmost byte.
PACKC depicts a common programming error. A 6-byte field, K, is packed into a

LOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

64 *
65 PACK
66 *
00306B 67 G DS PL 3
00306E ElF2 F 3F 4C 5 68 H DC Z'12345* H= |F1!F2|F3|F4|C5|
003073 F1F2F3 69 J DC C'123* J= IF1IF2IF3I
003076 ElF2F3F4F5C6 70 K DC Z•123456' K= |F1|F2|F3|F4|F5|C6|

00307C F 224 4069 406C 0306B 0306E 72 PACKA PACK GtH G= 112 1 34|5C|
003082 F222 4069 4071 0306B 03073 73 PACKB PACK G»J G= 10011213F|
003088 F 22 5 4069 4074 0306B 03076 74 PACKC PACK G,K G= 12314516C |

00308E F 2 44 406C 406C 0306E 0306E 76 PACKD PACK H,H H= 100100|12134|5C|

003094 F 22 1 4069 406D 0306B 0306F 77 PACKF PACK G.FH-K2) G= 10010213F |
00309A F212 4077 406D 03079 0306F 78 PACKF PACK K + 3(2 ) »H+1(3) K= | F 1 |F2|F3|23|4F|C6|

FIGURE 4-5 Sample unrelated pack operations.

84 DECIMAL DATA AND ARITHMETIC I

3-byte field, G. PACK proceeds from right to left, terminating before packing all
the digits in G.
PACKD shows the effect of packing a field into itself. Although the operation works
correctly, this practice is not always desirable. First, the field is defined as
zoned, but now contains packed data. Second, the defined length is five bytes,
but the field now contains only three bytes of significant data. It is generally
preferable to pack into a field defined with the correct format and length.
PACKE and PACKF illustrate valid use of relative addressing and explicit lengths. In
the case of PACKF, the second, third, and fourth bytes of H are packed into the
fourth and fifth bytes of K—the other bytes are not affected by the operation. The
example is illustrative, because there are few practical reasons to code in this
way.

UNPACKING FIELDS—UNPK. UNPK performs the reverse of PACK. Its main pur¬
pose is to convert packed data into zoned, in order, for example, to print the zoned
field. However, UNPK may be used to manipulate data in any format; there is no
checking for validity of data. Unpacking data that is not packed may result in "gar¬
bage".

NAME OPERATION OPERAND

[symbol] UNPK SI ,S2 or D1 (LI ,B1 ),D2(L2,B2)

The rules for UNPK are as follows:

1. The maximum length for each field is 16 bytes. Either operand may specify an
explicit length (LI and L2).
2. Bytes referenced by operand-2 are unpacked one byte at a time from right to left
into the operand-1 field.
3. As done also by PACK, the half-bytes of the rightmost byte of the operand-2 field
are reversed in the operand-1 field.
4. UNPK successively places all other digits in operand-2 from right to left in the
numeric portion of each byte in operand-1. The zone portions are filled with hex
'F'. The following unpacks PACKED into ZONED:

PACKED DC P’12345’ /12/34/5C/

y/f \ \
ZONED DS PL5 /F1/F2/F3/F4/C5/
UNPK ZONED,PACKED

Note that UNPK reverses the PACKED sign C and the digit '5' in the receiving
field, ZONED. All other digits are placed in ZONED with a zone 'F. The data in
ZONED is now in a format that we can print, whereas PACKED contains bytes
that are invalid for printing. (In practice, rather than use UNPK to translate packed
data for printing, we normally use the ED operation covered in the next chapter.)
 85 Packed Operations

5. UNPK normally terminates when all digits are transmitted. If the operand-1 field is
too short to receive all the digits, the remaining leftmost bytes of operand-2 are
ignored. If the operand-1 field is longer than necessary to receive all the digits, its
leftmost bytes are filled with character zeros (X'FO').

In Figure 4-6, UNPACK1 illustrates a 3-byte field unpacked into a 5-byte field, the
correct size.
In UNPACK2, operand-1 is one byte longer than necessary. The unpack fills a
character zero (X'FO') to the left.
In UNPACK3, operand-1 is two bytes too short to receive all the unpacked data.
Therefore, the two leftmost digits of the operand-2 field are not unpacked.
UNPACK4 and UNPACK5 depict the use of relative addressing and explicit length,
fancy coding, but dangerous.
UNPACK6 and UNPACK7 unpack fields into themselves. The result is correct only if
the field is one or two bytes long. The danger of this practice is seen by the
results.
UNPACK6 attempts to unpack a 3-byte field called L into itself. Because L contains
five digits which cannot fully unpack into a 3-byte field, the two leftmost digits
(1 and 2) are erased.
UNPACK7 unpacks a 5-byte field called Q into itself, propagating an error. The error
can be best understood if we consider the rule of UNPK: one byte at a time
is extracted and unpacked from right to left:
— The zone and numeric portions of Q+4 are reversed.
— Q + 3 containing 78 is extracted. F8 is stored in Q + 3 and F7 is stored in
Q + 2.
— Q + 2, now containing F7, is extracted. F7 is stored in Q+1 and FF is stored
in Q. The operation having filled all five bytes is now complete, but in¬
correct.

LOC OBJECT CODE ADDR1 6DDR2 STMT SOURCE STATEMENT

82 *
83 *** UNPK UNPACK
84 $
0030AO 12345C 85 L DC P’12345• L= 1 12 I 34|5C1
0030A3 86 M DS ZL 5
F9F9F9F9F9C9 87 N DC Z * 999999• N= |F9|F9|F9|F9|F9|C9
0030A8
0030AE 88 P DS CL 3
12 34567 89C 89 0 DC P’ 123456789 • Q= 1 1 2 1 34 | 5617819C|
0030B1

91 UNPACK 1 UNPK M,L M= |F1|F2|F3|F4|C5|

0030B6 F 34 2 4 0A 1 409E 030 A3 030A0
F 3 52 40 A6 409E 030A8 O3OA0 92 UNPACK2 UNPK N,L N= IF0IF1|F2|F3|F4|C5
0030BC
F 32 2 40AC 409E 030 AE 030AO 93 UNPACK 3 UNPK P»L P= 1 F 3 1 F4|C 51
0030C2
94 UNPACK4 UNPK Pfl+1(2) P= IF3IF4IC5I
0030C8 F321 40 AC 409F 030AE 030A 1

030A9 030 AO 96 UNPACK 5 UNPK N+1I5I,L N= | F9 1 F 1 | F2 1 F3 | F4 | C5

0030CE F 34 2 4 OA 7 409E
0030D4 F 3 22 409E 409E 030A0 O3OA0 97 UNPACK6 UNPK L»L L= IF3IF4IC5I
030B1 030B1 98 UNPACK7 UNPK 0,0 0= IFF|F7|F7|F8|C9I
00 300A F 344 40AF 4 OA F

FIGURE 4-6 Sample unrelated unpack operations.

86 DECIMAL DATA AND ARITHMETIC I

— The computer continues processing with no indication that an "error” oc¬

curred.

PACKED DECIMAL ARITHMETIC—ZAP, AP, AND SP. All decimal arithmetic is

performed in main storage using valid packed data and the appropriate packed
decimal instructions. This chapter introduces operations for simple arithmetic, and
the next chapter covers multiply and divide.

NAME OPERATION OPERAND

[symbol] ZAP SI ,S2 or D1 (LI ,B1 ),D2(L2,B2)

[symbol] AP SI ,S2 or D1 (LI ,B1 ),D2(L2,B2)
[symbol] SP SI ,S2 or D1 (LI ,B1 ),D2(L2,B2)

We use ZAP, Zero and Add Packed, to transfer packed data, just as MVC is used
to transfer character data. However, if the receiving field is longer than the sending
field, ZAP fills the leftmost bytes with zeros. We use AP, Add Packed, and SP,
Subtract Packed, for addition and subtraction of packed fields. The rules for ZAP, AP,
and SP are as follows:

1. The maximum length of each field is 16 bytes. Either operand may contain an
explicit length (LI and L2), up to 16.
2. The operand-2 sending field must be a packed field with a valid sign (hex 'A' to
hex 'F'). If the field is not valid, a program interrupt "data exception" will occur.
On the 370, if the sign is invalid the operation may be suppressed rather than
terminated.
3. For AP and SP the operand-1 receiving field must be a packed field with a valid
sign. In the case of ZAP, the operand-1 field may be any format.
4. If the operand-1 field is shorter than the operand-2 field, a program interrupt
overflow may occur. Normally an arithmetic field should be defined so that it
can contain the largest answer that could ever occur, plus a byte for insurance.
5. The rules of algebra determine the resulting sign. A positive sum yields a plus (hex
'C) sign, and a negative sum yields a minus (hex 'D') sign. A zero result yields
a positive (hex 'C') sign. X'C' and X'D' are the standard plus and minus signs,
although X'A', X'B', X'E', and X'F' are valid.

Note: An arithmetic operation changes an X'F' sign to X'C'. If an

input field contains the value '12345', its hex representation in main
storage is X'FI F2F3F4F5'. If we pack the field, it becomes
X'12345F', still with the F-sign. If we perform any arithmetic upon
this packed field, its sign changes: X'C' if positive and X'D' if nega¬
tive. This feature is algebraically correct, but confusing to the
learner.

6. ZAP, AP, and SP set the condition code, so that we may test the results if neces¬
sary:
87 Packed Operations

CODE CONTENTS OF THE RESULT FIELD

0 Zero
1 Minus (less than zero)
2 Plus (greater than zero)
3 Overflow

The following conditional branches may then test for these conditions:

CONDITION CODE CONDITIONAL BRANCHES

0 = Zero BZ (Branch Zero) E3NZ (Branch not Zero)
1 = Minus BM (Branch Minus) BNM (Branch not Minus)
2 — Plus BP (Branch Plus) BNP (Branch not Plus)
3 = Overflow BO (Branch Overflow)

Example testing of the condition code:

ACCUM DC PL2’0’
TOTAL DC PL30’
AP TOTAL,ACCUM Add and set the condition code.
BM P10NEG (Assume P10NEG is any valid address.)

Assume the contents of ACCUM and TOTAL are unknown. If the result of
adding the contents of ACCUM to TOTAL is negative, the program branches to
PI ONEG. If the result is positive or zero, the program continues with the next instruc¬
tion. Figure 4-7 provides various unrelated ZAP, AP, and SP examples:

ZAP1, ADD1, and SUBTR1 illustrate conventional ZAP, AP, and SP operations.
ZAP2 and ADD2 depict a coding error in which operand-! is shorter than
operand-2. The result at execute-time is an overflow condition.
ZAP3 and ADD3 also are coding errors not recognized by the Assembler. The
explicit length P3(3) causes only the first three bytes to be processed. Since there
is no sign in the explicitly defined field, the instruction will "bomb” with a
"Data Exception."
ZAP4 shows how we may correctly use explicit length and relative addressing.
ZAP5 tests the contents of a packed field. If we ZAP a field into itself the value is
unchanged, but the condition code is set. Since PI contains a positive value, the
condition code is set to high/plus.
ZAP6 and SUBTR2 both clear a field to packed zeros. Subtracting a field from itself,
as in SUBTR2, is more efficient, but requires valid packed data in operand-1.
ZAP requires a constant defined for operand-2, in this case a literal =P'0'.
ADD4 depicts a common coding error caused by an operand-! field that is too short:

Contents of PI /12/3C/ Because PI is only two bytes and the total

Add '999' /99/9C/ requires three, there is an overflow
interrupt, and an answer of 122 instead
Total /12/2C/ of 1,122.
88 DECIMAL DATA AND ARITHMETIC I

LOC OBJECT CODE STMT SOURCE STA

7 PI DC p' 123’ Pl = I 12I3C I

003002 12 3C
8 P2 DC P'4367' P2 = I 04 I 56 I 7C I
003004 04567C
9 P3 DC P'890123' P3 = I 08 190 I 12 I 3C I
003007 0890123C
10 *
11 ** * ZAP ZERO AND ADD PACKED
12 *
00300B 00
F 82 1 4002 4000 13 ZAP1 ZAP P2.P1 P2= I 00 I 12 I 3C I
00300C
F823 4002 4005 14 ZAP2 ZAP P2.P3 ERROR - P2 IS TOO SHORT
003012
4002 4005 15 ZAP3 ZAP P2tP3( 3 ) ERROR - NO SIGN IN OPERAND-2
003018 F 82 2
00301E F822 4002 4006 16 ZAP4 ZAP P2 » P3+1(3) P2= 190 I 12 I 3CI
4000 4000 17 ZAP5 ZAP PI,PI SETS CONDITION CODE HIGH/PLUS
003024 F81 1
00302A F8 10 4000 40C4 18 ZAP6 ZAP P1,=P'0' Pl= IOOIOCI

20
21 ** £ AP ADD PACKED
22 $
003030 FA 21 4002 4000 23 ADD 1 AP P2 , P 1 P2= | 04|69lOCl
003036 FA12 4000 4002 24 A DD2 AP PI ,P2 ERROR - PI IS TOO SHORT
00303C FA 21 4005 4000 25 ADD3 AP P3(3),P1 ERROR - NO SIGN IN OPERAND-1
003042 FA1 1 4000 4 OB E 26 A DD4 AP P1, = P'999' Pl= I12I2CI ERROR - OVERFLOW

28 $
29 *** SP SUBTRACT PACKED
30 *
003048 FB21 4002 4000 31 SUBTR1 SP P2 PI P2 = I 04 44|4C I
00304E FB 11 4000 4000 32 SUBTR2 SP PI PI Pl = 100 OC I

FIGURE 4-7 Sample unrelated ZAP, AP, and SP operations.

Problem 4-2 should now be attempted.

COMPARISON OF PACKED DECIMAL FIELDS—CP. It is often necessary to test if a

packed field is plus, minus, or zero, and to compare the result of one calculation to
another. We compare packed decimal fields with CP, Compare Packed.

NAME OPERATION OPERAND

[symbol] CP S1.S2 or D1(L1,B1),D2(L2,B2)

The rules for CP are as follows:

1. Maximum field lengths are 16 bytes. Either operand may contain an explicit
length (LI and L2).
2. Both operands must contain valid packed data. Invalid data results in a pro¬
gram interrupt ("data exception"); the 370 suppresses the operation.
3. If the fields are not the same length, CP extends the shorter field (not in storage)
with leftmost zeros (the value is not changed algebraically, and the test is still
valid). There can be no overflow.
4. CP compares the contents of operand-1 algebraically to that of operand-2. That
is, the positive value P'-t-OOl' is algebraically greater than P'—001'. (However,
89 Packed Operations

+0 is equal to -0.) CP sets the condition code, which we may then test with
conditional branches, as for CLC.

COMPARISON CONDITION CODE

Operand-1 equals operand-2 0 (equal)

Operand-1 is lower 1 (low)
Operand-1 is higher 2 (high)

Example: Contrast between CP and CLC. The following illustrates why we should use
the correct operation for the data format, CLC for Character data and CP for Packed.

AMTCHAR DC C’l 23’ / F' /F2/F3/

AMTPACK DS
PACK
PL2
AMTPACK,AMTCHAR
/A
/' 2/3 F/
CP AMTPACK, = P’123’ EQUAL
CLC AMTPACK, = P’123’ HIGH

AMTCHAR packed into AMTPACK gives the hex value /12/3F/. Using both CP and
CLC, we compare AMTPACK to a literal -P'1 23'. The literal generates a constant
/12/30. For CP, /12/3F/ and /12/30 are algebraically equal (+123); the condition
code is set to equal. For CLC, the two fields do not contain identical bits. Because F is
greater than C, the condition code is set to high. Figure 4-8 depicts various CP
operations:

COMP1 compares A to B. Because A's algebraic value is less, the condition code is
set to low/minus.

LOC OBJECT CODE STMT SOURCE STATEMENT

37 CP COMPARE PACKED

033054 012C 39 A DC P’ 12’ 101|2C 1

003056 345C 40 B DC P’345' 134|5C 1
003058 05000C 41 C DC P15 000' 105100|0C|
00305B 025 D 42 D DC P'-25' 102150|
00305D 01 2 A 43 E DC X ' 0 12 A ' 101I2AI

45 * DATA COMPARED: COND'N CODE:

00305F 00
003060 F911 40 52 40 54 46 C0MP1 CP A,B ' 12+ ' < 1•345+' LOW
003066 F92 1 4056 4052 47 C0MP2 CP CtA '5000+’ > 11 12+ ' HIGH
00306C F911 40 52 4059 48 C0MP3 CP A*D • 12+ ' > ■25-' HIGH
003072 F91 1 4054 4057 49 C0MP4 CP B.C+1< 2) '345+' > 1'000+' HIGH

> '1 0+ ' HIGH

CL
<

F9 10 4052 40C4 C0MP5 ' 12+ '

II

003078 51 CP
A,E •012+' = 1'012+' EQUAL
00307E F91 1 4052 4 05 B 52 C0MP6 CP
003084 F9 11 40 56 40 54 53 C0MP7 CP C ( 2 ) ,B ERROR - NO SIGN IN OP-1
00308A F91 1 4052 4 0C0 54 C0MP8 CP A f =C ' 12 ' ERROR - NO SIGN IN OP-2

FIGURE 4-8 Sample compare packed operations.

90 DECIMAL DATA AND ARITHMETIC I

COMP2 shows that CP correctly compares packed fields of unequal length.

COMP3 compares a positive amount in A against D's negative value. A's value is
algebraically higher.
COMP4 uses relative addressing and explicit length to compare the two bytes of B
against the second and third bytes of C.
COMP5 compares A to a literal containing packed zero.
COMP6 compares A against a hex constant, E, containing valid packed data. The
sign in E is X'A', which, although a valid plus sign, is rarely used.
COMP7 and COMP8 depict common programming errors made with packed data:
the fields as used do not contain valid packed data. COMP7 should be coded
with no explicit length, because C(2) means the first two bytes of C, containing
no sign. In COMP8, the character literal does not define valid packed data. The
literal should be defined as packed. Although these instructions assemble with
no error message, at execute-time they will cause a program interrupt.

Problem 4-3 should now be attempted.

FORMATTING THE PRINT AREA

No problem was encountered in the previous chapter printing character data. Packed
fields, however, contain nonprintable characters and must be unpacked for printing.
A small problem arises when we print unpacked data. Assume we read a card field
QTYIN containing the value 1 2345 (FI F2F3F4F5). We pack QTYIN into QTYPACK,
add '50', and unpack QTYPACK into QTYOUT for printing:

QTYPACK DC PL30’
QTYOUT DS CL5
PACK QTYPACK,QTYIN QTYPACK /12/34/5F/ )•
AP QTYPACK , = P‘50’ QTYPACK /12/39/5i
UNPK QTYOUT,QTYPACK QTYOUT: /F1/F2/F3/F9/C5

Note that AP changed the sign in QTYPACK from XT' to X'C'. Now QTYOUT will
print as 1239E. (The printer graphic for X'C5' is an alphabetic E.) But we want to print
12395. Because a character 5 is X'F5', then we need to change X'C5' to X'F5'. We
can, therefore, move one of the other zone positions of QTYOUT into the units zone
position. QTYOUT will now print correctly as 12345:

MVZ QTYOUT+4(1 ),QTYOUT+3 /F1/F2/F3/F9/C5/

Another problem arises if the field is negative. Assume that QTYOUT contains /FI/
F2/F3/F9/D5/. Inserting an F-zone to replace the D-zone changes the field's value
from negative to positive. If we want the field to print, if positive as 12395, and if
negative as 12395-, we may use the routine shown in Figure 4-9.
91 Sample Program—Budget Statement

STMT SOURCE STATEMENT

59 PACK QTYPK,QTYIN PACK QTYIN

60 AP QTYPK,=P'50' ADD 50 TO QTYPK
61 BNM D10 IE NOT MINUS, GO TO D10

63 MV I QTY0UT+5,C'- ' MOVE MINUS SIGN TO PRINT

64 D10 UNPK QTY0UT,QTYPK UNPACK QTYPK INTO QTY0UT
65 MV Z QTY0UT+4I1), OTYOUT+3 CORRECT ZONE IN SIGN
66 * *

67 * #
68 * #
69 QTYIN DS ZL 5 ZONED INPUT FIELD
70 QTYPK OS PL 3 PACKED FIELD
71 0TY0UT DS ZL 5 ZONED OUTPUT FIELD

FIGURE 4-9 Formatting plus and minus unpacked amounts.

This procedure is quite cumbersome and inefficient. We would like an instruc¬

tion or routine that better facilitates printing the unit position digit and the minus sign.
Indeed, there is an instruction, ED, described in the next chapter, which does just
that, and much more.

PAGE OVERFLOW. The standard 11" form provides for up to 60 lines of printing.
Up to now we have not considered the possibility that the printer would reach the
bottom of the form. Unless action is taken, the program will continue printing lines to
the bottom of the page, over the horizontal perforation, and onto the top of the next
page. Desirably, the program should know when printing has reached near to the
bottom of the page, and the forms should eject to the top of the next page. Then the
routine that printed the heading at the beginning of the program should be repeated,
and normal printing of detail resumed.
The procedure to accommodate page overflow is for the program to count the
lines that have been printed or spaced. The count is compared to some number, such
as 40 or 50, that has been deemed the maximum number of print lines on a page. If
the count exceeds this maximum, the program is directed to repeat the heading
routine. The program at the end of this chapter provides for simple page overflow and
should be carefully studied.

SAMPLE PROGRAM—BUDGET STATEMENT

The flowchart in Figure 4-10 depicts a program that reads company cost records
containing Budget expense and Actual expense for the current period. The cards are
sequence-checked by general account number. The program calculates the var¬
iance: Budget less Actual expense. A negative variance means that the Actual ex¬
pense exceeds the Budget. If this variance exceeds $-500.00, the program prints a
message "OVER LIMIT". At the end of the run, the total variance is printed.
92 DECIMAL DATA AND ARITHMETIC I

uuugei jjiugicmi.

For reasons of brevity, the program omits many common procedures such as:
checking for valid record code, printing total budget amount and actual expense, and
providing for the current date on the report. Figure 4-11 gives the assembled and
executed program. The input format is as follows:

COLUMN CONTENTS COLUMN CONTENTS

1 Record code 16-21 Budget expense

2-5 General account number 22-27 Actual expense (plus
6-15 Expense description or minus)
28-80 Unused
93 Sample Program—Budget Statement

LIST OF BUDGET. ACTUAL EXPENSE AND VARIANCE PAGE

STMT SOURCE STATEMENT

2 PR I NT ON,NCGEN.NODATA

4 * INIT IALIZATI N
5 *
6 PROG 04 INIT INITIALIZE
27 OPEN CARD.PRTR
36 MVC PRINT.BLANK CLEAR PRINT AREA

38 * PAGE HEAOING C U T I N E
39 *
40 A10HEAD PUT PR PRT R * PRINT•SKI SKIP TO NEK PAGE
47 UNPK PAGEPR.PAGEPK SET UP
48 MV Z PAGEPR+2I1).PACEPR PAGE NO.
49 PUTPR PRTR.PRHEAD,WSP2 PRINT HEAOING
56 AP PAGEPK,=P*1• AOD TO PAGE NUMBER
57 ZAP L INEPK. = P*0• CLEAR LINE COUNTER

59 * MAIN PROCESS NG ROUTINE

60 *
61 BIOREAD GET CARC.CARDIN READ RECORD
67 CLC ACC IN,PREV NEW ACCOUNT < PREV ACCT?
68 BL RICSEOER YES - CANCEL JOB
69 MVC PREV,ACC IN MOVE NEW ACCOUNT NO. TO PREV
70 PACK VARPK.BUDGETIN PACK BUDGET 4
71 PACK ACTPK,ACTUALIN ACTUAL AMOUNTS
72 SP VARPK,ACTPK CALCULATE VARIANCE

73 BNM B20 IS VARIANCE NEGATIVE?

74 MV I VARCUT +7,C#-• YES - INSERT SIGN

76 CP VARPK,=P*—500.CO• VARIANCE > 500.00 NEGATIVE?

77 BNL B20 NO - BYPASS

MVC MESSAGCT,=C*CVER limit* YES - PRINT WARNING
78

MVC ACCOT,ACCIN MOVE ACCOUNT NO. TO PRINT AREA

60 820
MVC OESCROT,DESCRIN MOVE DESCRIPTION
81
UNPK VAROUT.VARPK UNPACK VARIANCE INTO PRINT AREA
82
MVZ VAR0UTF6(l).VAR0UT«-5 CORRECT ZONE IN UNITS POSITION
83
MVC BUDGCUT.BUDGET IN MOVE BUOGET TO PRINT AREA
84
ZAP ACTPK.ACTPK IS ACTUAL NEGATIVE?
85
BNM 830 NO - BYPASS
86
ACT0UT+6.C*-* YES - INSERT MINUS SIGN
87 MV I

MVC ACTOUT.ACTUALIN MOVE ACTUAL EXPENSE

89 830
ACTOUT ♦5 < 1 ) ♦ ACT OUT + 4 CORRECT ZONE IN UNITS POSITION
90 MVZ
PUTPR PRTR,PRINT,WSP1 PRINT ACCOUNT
9 1
PRINT.BLANK CLEAR PRINT AREA
98 MVC
VFINFK,VARPK ADD TO FINAL TOTAL VARIANCE
99 AP
AP LINEPK, = P* 1 * ADD 1 TO LINE COUNTER
100
LINEPK,=P*10* END OF PAGE?
101 CP
BIOREAD NO - READ NEXT RECORD
1 02 BL
YES - GO TO PRINT HEADING A
103 B A 1OHE AD
FOR NEXT PAGE

FIGURE 4-11 List of budget, actual expense, and variance. Output record.
 94 DECIMAL DATA AND ARITHMETIC I

LIST OF BUDGET, ACTUAL EXPENSE AND VARIANCE PAGE ■ 2

STMT SOURCE STATEMENT

1 05 END OF-FILE ROUTINE

1 06
107 D10E0F PUTPR PRTR,PRINT,SP2 SPACE 2 LINES
1 14 ZAP VFINPK,VFINPK FINAL AMOUNT NEGATIVE?
1 15 BNM 020 * NO
1 16 MVI P + 69 *C#-• * YES - INSERT MINUS SIGN

118 020 UNPK P*60<9).VFINPK MOVE TOTAL TO PRINT

1 19 M VZ P468I 1 ) , P+-67 CORRECT ZONE IN UNITS POSITION
120 M VC DESCROT!11),=C• IL •
12 1 PUTPR PRTR.PRINT,4SP1 PRINT FINAL TOTAL
128 CLOSE CARO.PRTR
137 EC J NORMAL END-OF-JOB

14 1 * ERROR R 0 1U T I N E
142 *
143 R10SEQER M VC MESSAGOT!17),ME PRINT ERROR MESSAGE
1 44 PUTPR PRTR,PRINT.*SP3
15 1 CLOSE CARD.PRTR
160 CANCEL , ABNORMAL JOB TERMINATION

165 * OECLARAT IVES

166 *

168 CARD DEFCD D10ECF DEFINE CARD FILE

192 PRTR DEFPR DEFINE PRINTER FILE

217 CARDIN DS QCL80 input area:

218 CODEIN OS CL 1 01-01 RECORD CODE
219 ACCIN OS CL 4 02-05 ACCOUNT NO.
220 CESCRIN DS CL 1 5 06-20 DESCRIPTION
221 BUDGETIN OS ZL 6 21-26 BUDGETTED EXPENSE
222 ACTUALIN DS ZL6 27-32 ACTUAL EXPENSE
223 OS CL4 8 33-80 UNUSED

225 PR HE AD DS OCL133 heading area:

226 DC CL20 • • *
22? DC CL24•ACCT OESCR s* *
228 OC CL 34•BUDGE T AC variance page*
229 PAGEPR DS CL03 *
230 DC CL52* • *

232 BLANK DC C* •
BLANK FOR CLEARING PRINT AREA
233 PRINT DS OCL133 PRINTER AREA:
234 P DS CL 1 *
235 DS CL 19 *
236 ACCOT DS CL4 * ACCOUNT NO.
237 DS CL 2 *
238 DESCROT DS CL 15 * DESCRIPTION
239 DS CL3 *
240 BUCGOUT OS ZL 6 * BUDGETTEO EXPENSE
24 1 DS CL3 *
242 ACTOUT DS ZL 6 * ACTUAL EXPENSE
243 DS CL 3 *
244 VAROUT DS ZL7 ♦ VARIANCE
245 DS CL 4 *
246 MESSAGOT DS CLIO * OVER BUDGET MESSAGE
247 DS CL5 0 *

FIGURE 4-11 (Continued)

95 Sample Program—Budget Statement

LIST OF BUDGET, ACTUAL EXPENSE AND VARIANCE PAGE

STMT SOURCE STATEMENT

249 AC TPK DC PL 4•0 • PACKED CONSTANTS

250 LINEPK OC PL2•0• *

251 PAGEPK DC PL 2* 1 • 4
252 VAfiPK OC PL 4 • 0 • *

253 VFINPK DC PL5•0* 4

255 MESSEG DC C•RECORD OUT OF SEQ*

257 PREV CC XL4•00• PREVIOUS ACCOUNT NUMBER

259 LTORG
260 =C***BOPEN •
26 1 =C*SJBCLCSE*
262 =V(PCOCIT)
263 = A(PRTR >
264 = A I PR I NT)
265 = A< PRHEAD)
266 =A(CARD)
267 =A(CARDIN)
268 =C*OVER LIMIT*
269 =P*10•
270 = P* 1 •
27 1 =P * 0 •
272 = P*-500.00 *
273 =c*final total*

275 END PR0GC4

ACCT DESCRIP TIC N BUDGET ACTUAL VARIANCE PAGE 001

530 1 LABOR 250000 268315 0018315-

5302 SUPERVISION iouooc 1OCOO 0 ccocooo
53 15 HEAT. LIGHT 022000 029526 0007526-
5323 REPAIRS 000000 065315 0065315- OVER LIMIT

6001 SALES SALARIES 123450 123450 COOOOCO

6C5 1 DELIVERY EXPEN 003333 005010 0001677-
6 C 59 DEPRECIATION 0150CC 013356 0001644

606 1 FREIGHT 008500 011520 0003020-

6075 ADVERTISING 005000 000000 0005000
6081 TRAVEL EXPENSE 0100CC 112016 0102016- CVER LIMIT

BUDGET ACTUAL VARIANCE PAGE 002

ACCT DESCRIPTICN

INSURANCE 002500 002500 0000000

6Ce4
0C350C 001516 oooise4
70 11 OFFICE SUPPLIES
002500 068500 0 0 66 0 0 0— OVER LIMIT
7029 BAD DEBTS
oo loco 001215 0000215-
7ce2 POSTAGE

000255456-
F INAL TOTAL

FIGURE 4-11 (Continued)

96 DECIMAL DATA AND ARITHMETIC I

Note on sequence-checking: PREV, the previously stored account number, is initially

defined with hexadecimal zeros (XL4'00'). This represents binary zeros, or all bits
OFF, the lowest possible value. The punched card code for X'OO' is 12-0-1-8-9. It is
virtually impossible for a data record to contain the value of hex zeros in the account
number field. The first input record will therefore always be higher than contents of
PREV. (PREV could be defined in character format as CL4' ' or C'0000', but the first
record could conceivably contain blanks or zeros in the account number. Such a
record would therefore be treated as equal to PREV, resulting in an invalid error
message.)
The program is organized by sections. The Initialization opens the files and
clears the print area (this clearing could be omitted if the contents of the PRINT area
were fully defined with DC blanks). Under OS, the OPEN and CLOSE are coded
differently.
The Page Heading routine prints headings and page number at the top of each
page printed.
The Main Processing routine reads records, calculates, and prints the variance.
The End-of-File routine prints the total variance and closes the files.
The Error routine prints a message and terminates on an out-of-sequence re¬
cord. Under OS, the ABEND macro would replace the CANCEL.

DEBUGGING TIPS

Expect considerably more bugs in both the assembly and execution phases as your
programs become larger and involve arithmetic data. Finding a bug for the first time
is quite often time-consuming, but in time you can become proficient in tracing
errors (especially if you have enough of them!).
New assembly errors that can occur involve, for example, coding packed DC's
with characters other than 0-9, decimal point, and sign. Watch for coding hex
constants: DC XL3'FF' generates '0000FF', not 'FFFFFF'.
More likely, however, are errors during program execution. Packing a field that
contains a blank (X'40') in its rightmost position generates a packed field with an
invalid sign (X'04'); an attempt to perform arithmetic using this field will cause a
"Data Exception". A likely cause of the blank position is a blank input field or an
improperly defined input record. Another popular cause of Data Exceptions is adding
to a field that has not been initialized as a DC, or is defined as Character or Hex so
that it contains invalid packed data.

74ra,^r°DUI alT f°r USing MVC and CLC on packed data ('"correct execution),
or ZAP and CP on character data (Data Exceptions). Improper relative addressing and
missing explicit lengths are always good for a few bugs.

ERROR DETECTION The system is designed to terminate a run on a "program

check interrupt, such as a "Data Exception" or an "Operation Exception" (Appen-

by op^alT™'51616 liSB- The 5UPemSOr'S eTOr diag"°Sti“ -V considerably

97 Debugging Tips

ERRORS UNDER DOS. On a processing error, the DOS Supervisor interrupts the
program and prints the location of the invalid instruction and the type of error, as:

PROGRAM CHECK INTERRUPTION—HEX LOCATION 051340—CONDITION

CODE 3—DATA EXCEPTION

The "hex location" is the address of the instruction in error. If the program's
START instruction specifies the program "load point" (starting storage location for
execution), then we simply have to check the program listing:

LOC
51340 ... AP TOTAL,AMOUNT (Instruction causing the error)
51346 ... ZAP ...

A "Data Exception" means that the instruction has attempted to perform arith¬
metic on invalid packed data. An examination of the two defined operands reveals:

51780 AMOUNT DC PL3’0’

51783 TOTAL DS PL4’0’

TOTAL is incorrectly defined as a DS. The Supervisor can also print a hexadecimal
dump of the contents of storage, which we can examine. The dump could indicate
for locations 51 783-51786 the hex value 00000000. The cause of the error is
explained—TOTAL does not contain a valid sign because it was defined as a DS
instead of a DC.

ERRORS UNDER OS. OS provides a mass of processing messages, telling us more

than we want to know, but supplies useful error diagnostics only if requested. Insert
the following with the //GO statements:

//GO.SYSUDUMP DD SYSOUT=A

The system will now supply the load or entry point of the program, the address of the
instruction following the error, and a hex dump of the registers and program storage
area. If the program encounters an error (program check interrupt), check the print¬
out following the program listing and any output. The first diagnostics could appear
as:

JOB xxxxxx STEP GO

COMPLETION CODE SYSTEM 0C® indicates "data exception

PSW AT ENTRY TO ABEND FFB5000D C0051346) "instruction address"

"Completion Code" indicates the type of program check. In this case, the code '7' is
for "Data Exception"—see Appendix B for all codes. (Incredibly, the system prints
several hundred lines of diagnostics, but identifies errors only with this crumby code!)
98 DECIMAL DATA AND ARITHMETIC I

The PSW (Program Status Word) indicates the "instruction address" in the
rightmost six hex digits, in this case 051346. This is the address of the instruction
following the one in error. When the program was assembled, we did not know
where it would load for execution, and indicated the START location as zero. We can
determine the load point in the diagnostics under the CDE section. The first statement
there could appear as:

. NM MAIN (or NM GO) USE 01 EPA 051210

The entry point address (EPA) is therefore 05120, the "relocation factor". Now we
can calculate the address in the program listing:

Address in the PSW 51346

Relocation factor 51210

Location of instruction following the error 1 36

LOC
130 ... AP TOTAL, AMOUNT
136 ... ZAP . . .

The instruction preceding 136 is the AP at 130. The Data Exception indicates
invalid packed data in one or both operands. The next steps are to check the defi¬
nitions of TOTAL and AMOUNT, and to examine the hex dump of storage, as was
done for the DOS example.

ERROR RECOVERY. Program checks cause the program to terminate, but when
testing, we usually want to push the program through to detect as many errors as
possible. There are special macros that provide for error recovery, STXIT under DOS
and SPIE under OS. The IBM Supervisor and Macros manuals provide details.

PROBLEMS

4-1. MVN and MVZ. Given the following declaratives, code the following unrelated
questions. Give results in hex and character.

HAM DC CHAL’
EGGS DC C’2472’
TOAST DC X’C9E2C4E0’

(a) Move the first 3 numeric %-bytes of TOAST to the numerics of HAM.
(b) Move the zone y2-bytes of TOAST to those of EGGS.
4-2. Complete the hex representation for the following. Except for a and for b
questions are unrelated.
99 Problems

HI LO EQ
(a) CP P,Q
(b) CP Q,P
(c) CP M,Q
(d) CLC M,N

4-4. PROGRAM ASSIGNMENT.

Required: A program that reads Accounts Receivable records, prints the detail,
and accumulates totals.
Input: Data records similar to the format of the example program at the end of
Chapter 3, w ith some additions:

COLUMN COLUMN

1 Record code (3) 31 -32 Current month

4-5 Store number 41 -46 Balance owing
6-10 Customer number 47-52 Customer limit
11 -30 Customer name

Procedure:
— Check for valid record code (3).
— Sequence-check the file according to Store-Customer number. Within a
Store, the Customer numbers are in ascending sequence.
— Check that the current month is the same for all cards. If not, print a suitable
message.
100 DECIMAL DATA AND ARITHMETIC I

— Compare Customer balances to their credit limits. If the balance exceeds

the limit, print 'OVER LIMIT'.
— Print all the data except record code from each record. At the end of each
Store, print the total balance owing for all Customers for that Store (minor
total). At the end of the run, print the total balance owing for all Stores (final
total).
— Provide test input data that will test all possible conditions in the program.
— Flowchart, code, and test the program. Be sure to use the programming
standards for your installation.
 CHARTER 5

DECIMAL ARITHMETIC II

This chapter continues with the additional decimal instructions commonly used in
programming: edit, multiply, and divide. Editing involves sign and punctuation con¬
trol to format packed fields for printing. The sections on multiply and divide provide
practical techniques for handling various field lengths and decimal-point precision
and more realistic programming examples and problems.

EDITING—ED

The purpose of ED is to make packed data suitable for printing. ED converts packed
data into zoned format and provides for punctuation and sign. Once understood, ED
greatly facilitates print formatting.

NAME OPERATION OPERAND

[symbol] ED S1.S2 or D1(L,B1),D2(B2)

Editing normally consists of two operations:

70 7
102 DECIMAL ARITHMETIC II

^. We define an edit word, or pattern, specifying where we want commas, decimal

point, and sign to print. We use MVC to move this edit word to the print positions
where the amount is to be printed.
2. We then use ED to modify the packed field according to the edit word definition.
ED unpacks the amount field and provides the required editing for commas,
decimal point, and minus sign.

The following simple example edits a 2-byte (3-digit) packed field called
COUNT into a print field called COUNPR. (There is no provision for commas or
decimal point.)

COUNT DS PL2 3-digit packed field

COUNPR DS CL4 Print field for edited result
MVC COUNPR , = X'40202020’ Move editword to print field
ED COUNPR,COUNT Edit the packed field into
print field

THE EDIT WORD. The edit word consists of pairs of hex digits. Each pair represents
one print position. The commonly used edit characters are:

HEX NAME PURPOSE

40 Fill character Used for “zero suppression"—to fill or pad leftmost

unwanted zeros with blanks. For example, ED can
suppress 00025 so that it prints as 25. We may use any
other character such as asterisk (5C) as a fill character,
although X'40' is the commonly used EBCDIC blank.
20 Digit selector One X'20' in the edit word represents each packed digit
to be printed. Since a packed field always contains an
odd number of digits, there must be an odd number of
X'20's (including X'21's, if any). In the example earlier,
COUNT contains three digits. Our edit word, therefore,
contains three X'20's. ED selects one packed digit for
each X'20'. It unpacks the digit in the X'20' position.
However, if the digit is a leading (leftmost) zero, ED
replaced the X'20' with the X'40' fill character.
6B Comma (,) X'6B' is coded in the edit word wherever a comma is
to be printed.
4B Decimal point (.) X'4B' is coded in the edit word wherever a decimal
point is to be printed.
60 Minus sign (-) If the amount could be negative, we code X'60' to print
a minus sign to the right of the edited amount.
C3D9 Credit (CR) To print CR instead of minus, we use X'C3D9'.
21 Significance A “significant" digit is 1 through 9 (nonzero). In the
starter value 000.25, the '2' is the first significant digit in the
field. The fill character X'40' “zero suppresses" the left¬
most zeros by filling them with blanks: bbbb25. We may
want to force significance so that a leftmost zero
prints as bb0.25. For this purpose we code X'21', the
103 Editing—Ed

significance starter. Normally, we code only one X'21\ It

acts the same as the digit selector, but in addition X'21'
forces significance—all characters to its right are forced
to print, whether they contain a significant digit or not.

BASIC RULES OF EDITING.

1. We move the required edit word into the print area.

2. The operands of the ED operation work as follows: Operand-1 references the
leftmost byte of the edit word. This is normally the print area, the same position
and length as specified by the MVC. Operand-2 references the packed field to be
edited.
3. Editing proceeds from left to right. ED examines each character in the edit word to
determine what action to take:
— The leftmost hex byte is always assumed to be the fill character, which is
normally X'40', but may be any other required character.
For each X 20 , ED selects a packed digit. If the digit is nonzero, it is un¬
packed, replacing the X'20'. If zero, and significance has not been encoun¬
tered, then ED replaces the X'20' with the fill character (usually X'40'). Signifi¬
cance is forced either by a significant digit or by the significance starter
(X'21 ')•
— If the hex byte X'6B' (comma) or X'4B' (decimal), and significance has been
encountered, they are preserved. If significance has not been encountered, ED
replaces them with the fill character.
— If the packed field is negative, then the CR or minus (X'60') is preserved. If
positive, ED replaces them with the fill character. The condition code for
minus, zero, and plus is set.
4. The length of operand-1 terminates the operation. The maximum length is 256
bytes. Only operand-1 may have an explicit length.

EXAMPLE EDIT OPERATION. A 3-byte packed field, PACKAMT, is to be edited.

The edit word must provide for decimal point, minus sign, and zero suppression of
the three leftmost digits.

PACKAMT DC PL3’5’ (contains /00/00/5C/)

EDWORD DC X’402020214B202060’

The defined edit word, EDWORD, provides the necessary sign and punctuation
control. Note that there is an X'20' or X'21' for each packed digit. The instructions to
edit are:

MVC P + 90(8),EDWORD / 40/20/20/21 /4B/20/20/60/

ED P +90(8), PACKAMT /40/40/40/40/4B/F0/F5/40/

P+90 +92 + 94 +96

+ 91 + 93 +95 +97
104 DECIMAL ARITHMETIC II

MVC moved EDWORD into the required print positions. ED then edits PACKAMT
into the same print positions. The explicit length (8) in the ED operand refers to the
length of the edit word in the print area, not to the length of PACKAMT. Editing
proceeds from left to right, starting at P+90:

P+90: X'40', assumed to be the fill character, is not changed.

P+91: Because the position contains X'20', ED examines the first digit of
PACKAMT. It contains zero, and therefore the fill character X'40' replaces
the X'20\
P+92: Because of the X'20' here, ED examines the second digit of PACKAMT. It
also contains a zero, so the X'20' is changed to X'40'.
P+93: Because of the X'21' significance starter here, all characters to the right are
to be printed. Also, ED examines the third digit of PACKAMT, a zero, and
replaces the X'21' with X'40'.
P+94: X'4B' is a decimal point. Because X'21' has signalled to force printing, the
X'4B' is not changed. (FHad the X'21' not been encountered yet, the fill
character would replace the X'4B'.)
P+95: Because of the X'20', ED examines the fourth digit of PACKAMT, a zero.
Because of the preceding X'21', ED unpacks the zero and replaces the X'20'
with X'FO'.
P+96: Because of the X'20', ED unpacks the fifth digit of PACKAMT, 5. X'F5'
replaces the X'20'.
P+97: X'60' means that if the next half-byte of PACKAMT contains X'D' (a minus
sign), the field is considered negative and the X'60' is not changed. Because
PACKAMT is positive (X'C'), ED replaces the X'60' with the fill character
X'40'.

At this point the length (8) of operand-1 is exhausted, and the operation
terminates. The edited amount will print as .05 (if EDWORD contained
X'402021204B202060', the result would be 0.05). Figure 5-1 illustrates four exam¬
ple edit operations:

EDWD1 shows simple zero suppression. The packed amount in COUNTER is to print
v/ln'fnm°,St Zer°S suPPressed- The edit word, EDWD1, therefore consists of an
X 40 fill character and an X'20' for each packed digit.
EDWD2 edits and prints a 4-byte packed field. The edit word provides for zero
suppression, comma, decimal point, and minus sign.
EDWD3 depicts use of the CR symbol commonly used in financial statements.
EDWD4 is explained in the next section.

DOLLAR SIGN AND ASTERISK. The dollar sign (X'5B') and the asterisk (X'5C')
when used in the edit word create certain problems. Normally we use the dollar sign
($) to print Supplier and Employee checks and Customer bills, with the $ to the left of
the amount. If X'5B' is coded on the left, ED improperly uses it as the fill character.
105 Editing—Ed

STMT SOURCE STATEMENT

6 * -
7 ED EDIT
8 *
9 * ZERO SUPPRESSION : HEX CONTENTS:
1o
11 P DS CL 1 2 1
12 COUNTER DC P * 0015 * 100101|5C1
13 EDWD1 DC X *402020202020 * 1 4012 0|2 0 1 I20| 20|1201

15 MVC P + 20I6)»EDWD1 1 40 I 20 I 20 I 20 | 20 | 20 I
16 ED P+20(6),COUNTER |40|401401I40| FI ||F5|

18 * COMMA, DECIMAL, MINUS SIGN:

19 *
20 AMOUNT DC P *-2345.00 * 102134|50|IOD|
21 EDW02 DC X*4020206B20202148202060'

23 MVC P + 3 0(11),EDWD2 |40| 20 | 201 6 B | 2 0 | 201 21 1 4B | 20|201 60

24 ED P + 30(11) ,AMOUNT 140 | 40 I F2 1 6B | F3|E4| F5|4B|F0|F0I 60
2 , 3 4 5 . 0 0 -
25 * CREDIT ICR) SIGN:
26 *
27 TOTAL DC P'-0000.05' 100 1 00 | 00 1 5DI
28 EDWD3 DC X'4020206B2021204B2020C3D9 1 I

30 MVC P+50(12),EDWD3 1 40 1 20 1 20 I1 6B120|21 | 20 | 4B | 20|20| C3 I D9

o
o

31 ED P + 5 0(12).TOTAL 1 40 1401 40 1 40 1 FO 1 4B |1 FO1F5 1 C 3 I D9

0 0 5 C R
32 * ASTERISK AND DOLLAR SIGN:
33 $
34 ACCUM DC P•12.34* 101 1123 1 4C 1
35 EDWD4 DC X'5B402020214B2020605C'

37 MVC P+70(10),EDWD4 1 5B I 40 1 20 1201211t 4B |1201120160 I5CI

38 ED P + 7 1(08),ACCUM I5BI140 1 40 1 FI IF2 1 4B IF3 1F4|40 I5CI
$ 1 2 • 3 4 *

FIGURE 5-1 Sample edit operations.

Also, many installations print asterisks (*) to the right of the amount field to denote
the level of total:

* Minor total
** Intermediate total
*** Major total

If one or more X'5C's are coded to the right of the edit word, ED leaves the
asterisks undisturbed only if the amount is negative. If positive, ED replaces asterisks
with the fill character, thus erasing them. One solution is to omit both X'5B' and
X'5C' from the edit word and use separate operations to move $ and * to the print
area. Another solution is to use the technique in Figure 5-1, in which $ and * are
defined as part of the edit word but do not participate in the ED operation. MVC
moves the full edit word, starting in P + 70. The ED operation begins in P+71, leaving
the $ intact. Further, ED specifies editing only 8 bytes, although the MVC moved 10.
The operation terminates just prior to the * at P+79, leaving it also intact.
106 DECIMAL ARITHMETIC II

Another instruction, EDMK, providing for floating dollar sign and asterisk is
covered in a later chapter.

Problems 5-1, 5-2, and 5-3 should now be attempted.

MULTIPLY PACKED—MP

We use MP to multiply one packed field (the multiplicand) by another (the multi¬
plier). Common examples are multiplying hours by rate-of-pay in payroll, and quantity
by unit cost in inventory programs.

NAME OPERATION OPERAND

(symbol] MP SI ,S2 or D1 (LI ,B1 ),D2(L2,B2)

The rules for MP are:

1. Either operand may contain an explicit length (LI and L2).

2. The operand-1 field is the multiplicand and must contain valid packed data. The
product is developed in this field, and replaces the multiplicand. The maximum
length of operand-1 is 16 bytes, providing 31 digits. We should define the
operand-1 field large enough to accommodate the largest possible product that
the two operands can develop. Generally, the product length should equal at least
the length in bytes of the multiplicand plus the multiplier.
3. Operand-2 references the multiplier in valid packed format. The maximum length
is 8 bytes.
4. MP is governed by the normal rules of algebra: like signs yield a positive product,
and unlike signs yield a negative product. A zero amount in either operand causes
a zero product. MP does not set the condition code.

PRODUCT LENGTH. Good programming practice defines the product length

equal at least to the length in bytes of the multiplicand plus multiplier. From another
point of view, prior to execution of the MP, for each byte in the multiplier, the
product field must contain one byte of zeros to the left of the significant digits in the
multiplicand. Consider the following:

MULTPLD DC PL4’1234560' 4-byte multiplicand

MULTPLR DC PL2’950’ 2-byte multiplier
PRODUCT DS PL6 6-byte product
ZAP PRODUCT,MULTPLD /00/00/12/34/56/OC/
MP PRODUCT,MULTPLR /01/17/28/32/00/0C/

Since MULTPLD is four bytes and MULTPLR is two, we define PRODUCT as six
bytes (PRODUCT may be defined longer). We ZAP MULTPLD into PRODUCT. After
107 Multiply Packed—MP

the MP, PRODUCT contains a 6-byte product. If PRODUCT were shorter, the MP
would cause a program interrupt.

DECIMAL PRECISION. Neither the Assembler nor the computer handles the dec¬
imal position. With all decimal arithmetic we must provide for the implied decimal
point. The following is a useful rule: the number of decimal positions in the product
equals the number of decimals in the multiplicand plus multiplier. For example, if the
multiplicand has three decimals and the multiplier has two, then the product will
have five decimal positions.

ROUNDING, OR HALF-ADJUSTING. In many program languages after multiply¬

ing we round by adding 5 to the unwanted decimal position. Then we drop the
unwanted decimal position(s). If the product is negative, we subtract 5. The following
examples round a 3-decimal and a 5-decimal value:

3-DECIMAL VALUE 5-DECIMAL VALUE

123.456 Require a 2-decimal answer 123.45678 Require a 2-decimal answer

_5 Round by adding 5 _500 Add 500
123.461 Answer is 123.46 123.461 78 Answer is 123.46
(Drop the unwanted 1)

Before rounding, however, we should check if the product is negative to deter¬

mine whether to add or subtract five. A convenient technique in Assembler pro¬
gramming is to add all the unwanted decimal positions to the product, regardless of
the sign:

3-DECIMAL VALUE 5-DECIMAL VALUE

123.456 Require a 2-decimal answer 123.45678— Require a 2-decimal answer

_6 Add 6 _678- Add minus 678
123.462 Answer is 123.46 123.46356- Answer is 1 23.46-

The restriction is that we may adjust only an odd-number of unwanted decimal

positions, because of the presence of the sign. For example, the value 123.4567
requires a 2-decimal answer. In storage, the value is /12/34/56/70. We would like to
add the rightmost two digits, 67. This is impossible—we can add either one byte,
/7CI, or two bytes, /56/7C/. We solve this problem by shifting the value one digit to
the right as /01/23/45/6O, and then add the 60 /01/23/46/2O, or 123.462. The next
sections should further clarify this.
Figure 5-2 illustrates multiply operations. The first example multiplies a 2-byte
field, QTY, by a 2-byte field, PRICE. The product, AMT, is therefore defined as four
bytes in length. Since PRICE contains two decimals and QTY none, there are two
decimal positions generated in the product. This example requires a 2-decimal an¬
swer, and therefore no rounding is done.
108 DECIMAL ARITHMETIC II

42 * -
43 *** MP MULTIPLY PACKED
44 * -

46 * MULTIPLY, GENERATE 2 DECIMALS, NO ROUNDING:

47 *
48 QTY DC P'475' 147 I5C I
49 PRICE DC P'3.50' I 35 IOC I
50 AMT DS PL4

52 ZAP AMT ,QTY I 00 I 00|47 I5CI

53 MP AMT,PRICE 101 166 |25 IOC I AMT = 1662.50

55 * MULTIPLY, GENERATE 3 DECIMALS, ROUND TO 2 DECIMALS:

56 *
57 HRS DC P'120.5* 101 120 I5C
58 RATE DC P'3.55' 13511 5C 1
59 WAGE DS PL 5

61 ZAP WAGE,HRS 100 1 00 I 01 I 20 I 5C I

62 MP WAGE,RATE I 00|04|27|77|5C I MULTIPLY 427.775
63 AP WAGE,WAGE+4(1) 100|04|27 I 78 IOC I ROUND 427.780
64 MVO WAGE,WAGE(4) I 00 I 00 | 42 I 77 I 8C I SHIFT 427.78

FIGURE 5-2 Sample multiply packed operations.

The second example multiplies a 3-byte field, HRS, by a 2-byte field, RATE. The
product, WAGE, is therefore five bytes long. Since HRS contains one decimal and
RATE two, the product has three decimal positions. Because only two decimals are
required, this example rounds the unwanted rightmost decimal digit. That is, the
rightmost byte of WAGE is added to WAGE. Next, an MVO operation shifts the
product one digit to the right, leaving two decimal positions, as explained in the next
section.
A later chapter covers a 370 instruction, SRP, which greatly facilitates rounding
and shifting.

MOVE WITH OFFSET—MVO

The MVO operation moves data an odd number of half-bytes to the right. Although
MVO may be used on any format, its most common use is on packed data—to shift
off unwanted decimal positions generated by MP and DP operations. For example
an MVO could shift a field containing 12/34/56/7C three digits to the right yielding
00/01/23/4C. 6 ,y 8

NAME OPERATION OPERAND

(symbol] MVO S1.S2 or D1 (LI ,B1 ),D2(L2,E32)

The rules for MVO are:

109 Move With Offset—MVO

1. The maximum length of each operand is 16 bytes. Either operand may specify an
explicit length (LI and L2).
2. MVO moves the operand-2 data to the operand-1 field and shifts to the right an
odd number of half-bytes. (To shift an even number of half-bytes requires two
MVOs.) The rightmost half-byte of operand-1 (if packed, the sign position) is not
altered.
3. MVO fills leftmost shifted half-bytes with X'O'.
4. The length of operand-2 determines how many bytes MVO moves into the
operand-1 field, and shifts to the rightmost half-byte of operand-1.

Refer now to the examples in Figure 5-3:

STMT SOURCE STATEMENT

68 *
69 *** MVO MOVE WITH OFF SET
70 *
71 X OC P’ 12 3456789• 9
112 1 34 1 561 78 11 C 1
7? Y nc PL5 ’ O' 100 | 00 1 00 1 00 IOC 1

74 MVOI MVO Y, X ( 4 ) 1011123 1145 11 67 1 8C 1 SHI FT 1 DI G I T

75 MVO? MVO Y »X ( 3 ) 1 00 1 01 1 23 1 45 1 6C 1 SHI FT 3 D I G I TS
76 MV03 MVO YtXI 2 ) 1 no I100 11011123 I4C 1 SHI FT 5 m GI TS

78 * MULTIPLY, GENERATE 4 DECIMALS, ROUND TO 2 OECIMA L S

79
80 HOUR DC P'20.5' I20|5CI
81 RATEPY OC P'03.250' 1031251OC1
82 PAY ns PL5

84 7 AP PAY,HOUR 1 on | no|on|20|1 5C 1
85 MP PAY,RATEPY 100106|66|25 IOC 1 MULT I PLY 66.6250
86 MVO PAY,PAY(4) 1 00|00|6616211 5C 1 SHIFT 66.625
87 AP PAY,P A Y + 4( 1 ) 1 no 1 on|661 63 IOC 1 ROUND 66.630
88 MVO PAY,PAY(4) 1 no|no 106166 I3C 1 SHIFT 66.63

FIGURE 5-3 Sample MVO operations.

MVOI moves the first four (leftmost) bytes of X into Y. The packed digits from X are
right-shifted, one half-byte, to the rightmost half-byte of Y. MV02 moves the first
three bytes of X into Y and right-shifts 3 half-bytes, to the rightmost half-byte of Y.
MV03 moves the first two bytes of X into Y and right-shifts 5 half-bytes, to the
rightmost half-byte of Y..
Figure 5-3 also illustrates a multiply operation that generates four decimal
positions. Because only two are required, two MVO's are used to shift the unwanted
two decimals to the right. The rounding operation, AP, is immediately after the first
MVO. This is because we must round beginning with the first unwanted decimal
position, in this case '5'. In the product, /00/06/66/25/0C/, the '5' is shifted one
position so that it becomes the leftmost digit of the next byte, /00/00/66/62/5C/. We
now round and shift off the unwanted '5'.
110 DECIMAL ARITHMETIC II

Problems 5-4 and 5-5 should now be attempted.

DIVIDE PACKED—DP

We use DP to divide one packed field (the dividend) by another (the divisor). Com¬
mon examples include dividing inventory value by number of units to calculate unit
cost, and computing ratios and percentages.

NAME OPERATION OPERAND

Isymboll DP SI ,S2 or D1(L1,B1),D2(L2,B2)

The rules for DP are:

1. Either operand may contain an explicit length (LI and L2).

2. Operand-1 is the dividend, and must contain valid packed data. The quotient and
remainder are developed in this field. The maximum length is 16 bytes.
Operand-1 should be defined large enough to accommodate the largest possible
quotient, plus remainder.
3. Operand-2 is the divisor containing valid packed data. The maximum length is 8
bytes.
4. The length of the generated remainder is the length of the divisor.
5. DP is governed by the normal rules of algebra: like signs yield a positive quotient,
and unlike signs yield a negative quotient. A zero divisor is invalid—it causes a
program interrupt. DP does not set the condition code.

QUOTIENT LENGTH. Since we do not normally know the contents of arithmetic

fields, we should provide for the worst possible case, in which the divisor contains
the value 1 (zero divisors are not permitted). With a divisor of 1, the quotient will
equal (and cannot exceed) the value of the dividend.

1234567 — 1234567 (quotient = dividend)

dividend
1 Vvquotient

As good programming practice, therefore, we should define the length of the quotient
equal at least to the length of the dividend. Also, the length of the remainder always
equals the length of the divisor. The remainder is generated in the operand-1 field to
the right of the quotient. Both quotient and remainder contain a sign. Technically the
quotient length needs to be only long enough to contain the significant digits de¬
veloped If the quotient field is longer than necessary, DP inserts leftmost zeros. If the
quotient field is too short to contain all the significant digits generated in the quotient,
Ill Divide Packed—DP

an overflow interrupt occurs. The following rule always provides adequate field
lengths: define the operand-1 field equal at least to the length of the dividend plus
divisor:

DIVIDEND DC PL4’1234567’ /12/34/56/7C/ 4-byte dividend

DIVISOR DC PL1 ’3’ I3CI 1 -byte divisor
ANSWER DS PL5 5-byte answer
ZAP ANSWER,DIVIDEND
DP ANSWER,DIVISOR /00/12/34/56/7C/
/04/11/52/2C/1C/
quotient remainder

Since DIVIDEND contains four bytes and DIVISOR one, ANSWER (to be used for the
resulting quotient and remainder) should contain five bytes. (ANSWER may be de¬
fined longer.) We ZAP DIVIDEND into ANSWER. After the DP, the first four bytes of
ANSWER contain the quotient, with a sign. The fifth byte contains the signed re¬
mainder, one byte long, the same length as the divisor.

DECIMAL PRECISION. We must provide for the implied decimal point. The fol¬
lowing rule is always valid: the number of decimal positions in the quotient equals
the number of decimals in the dividend minus divisor. For example, if the dividend
contains four decimals and the divisor one, then the quotient has three decimal
positions. If the dividend does not contain sufficient decimal positions for our divi¬
sion, we may generate the required extra decimal positions by shifting the dividend
to the left, using an MP that multiplies by 100 (1.00). Thus, 12.34 x 1.00 = 12.3400,
a product that is the same algebraic value, provided that we in the program always
account for the new implied decimal point.
It may facilitate programming to mentally "clear” the divisor of decimal posi¬
tions first. For example, the following divisor can be "cleared" of its decimal places
with no added programming steps, by definition:

12.3400 1234.00
1.23 123

ROUNDING, OR HALF-ADJUSTING. In the earlier example, the remainder in

ANSWER was 1/3, not.1. The remainder is not usually rounded or required. The
quotient, however, is rounded, similar to rounding the product. If we want added
precision for rounding we may shift the dividend to the left. Note that after the left
shift, the length of the dividend is longer, so that the quotient will have to be
correspondingly longer. For example, assume a 3-byte dividend and a 2-byte divisor.
If we shift the dividend left 2 digits (one byte), the dividend is now effectively 4 bytes,
so that the quotient/remainder should be 6 bytes. We may generate one more dec¬
imal position than we need, and round it off. The following examples each divide
246.79 by 31:
112 DECIMAL ARITHMETIC II

Require a 1-decimal quotient:

246.79
7.96 (may be rounded to 8.0)
31

Require a 2-decimal quotient—multiply the dividend by 1.0:

246.79 x 1.0 246.790 / i ,
-—" = 7.960 (may be rounded to 7.96)

9? £
93 *** np DIVIDF PACKFD
94 *
95 DIST DC P'2356.5' I 2 3 I 5 6 I 5C I
96 GALS DC P ' 1 50.0 • |01|50|0CI

98 * niVIOF, MO DFCIMAL , Nn ROUNDING:

99 *
100 ANSI ns PL 6

10? ZAP ANSltDIST 1001001001231561501

01J0T I FNT I REMAINDER
103 DP ANSI,GALS I 00|01 |5C I 01 | 06|5CI

105 * DIVIDE, ROUND TO MO DFCIMALS:

106 *
107 ANS? DS PL 7

108 ZAP AN S2,D I S T 100100|00100123 I 5615C I

109 MP AMS2,=P110' |00|00|00|02|35|65IOCI
QUOTIENT IRFMAINDER
1 10 DP ANS2,GALS I 00 I 00 I 15 I 7C I 00 I 15 I OC I DIVIDE 15.7
111 AP ANS2IA ) ,ANS2 + 3I 1 ) I 00 I 00 I 16 I4C I 00 I 15 IOC I ROUND 16.4
11? MVO AMS2(4),ANS2(3) I 00 I 00 I 01 | 6CI 00 I 15 I OC I SHIFT ]6

114 * DIVIDF, ROUND TO ONE DECIMAL:

115
116 ANS3 ns PL 7

117 ZAP ANS3,D1ST I 00 I 00 100|00 |23 I 5615CI

118 MP A N S 3, = P'100' |00|00|00|23|56|50|OCI
QUOTIENT IREMAINDER
119 DP ANS3,GALS I 00|01|57 I 1C I 00 I 00|OCI DIVIDE 15.71
120 AP A N S 3(4),AN S3+ 3( 1 1 I 00 I 01 | 57|2C | 00|00|OCi ROUND 15.72
121 MVO A NS 3(4),AN S 3(3 ) I 00|00 I 15 I7CI 00|0 0|OCI SHIFT 15.7

1 ?3 *
DIVIDE, ROUND TO TWO DFCIMALS:
124 *
125 ANS4 DS OPLR ZFRO DUPLICATION FACTOR
126 QUDT DS PL 5 QUOTIENT AREA
127 RMDR DS PL 3 REMAINDER AREA

129 ZAP ANS4.DIST I 00|00|00 loo I 00|23 I 5615CI

130 MP AN S4,= P' 1000' loo I 00 loo 102 I 35|65 I 00|OC I +
QUOTIENT IREMAINDER
131 DP ANS4,GAL S
I 00 | 00 | 15|71 | OC I 00|00|OC | 15.710
13? AP OUOT,QUOT +4( 1 ) I 00 I 00|15 I 71|OC|00|00 IOC| 15.710
133 MVO OUOT,OUOT(41 100100101 |57 | 1ClOOIOOIOCI 15.7]

FIGURE 5-4 Sample divide packed operations.

113 Sample Program—Inventory Update

Require a 3-decimal quotient—multiply the dividend by 1.00:

246.7900
— 7.9609 (may be rounded to 7.961)
31

Each increase in precision provides a more accurate result. Required accuracy

depends on the application and the user's needs, and should be determined before
starting the program. The examples in Figure 5-4 divide distance (DIST) by gallons
(GALS) to calculate miles-per-gallon. Both DIST and GALS contain one decimal
position. Division results in no decimal positions, as in ANSI. To produce a quotient
with no decimal places, but rounded, as in ANS2, the dividend must be shifted to the
left one digit (2356.5 becomes 2356.50). This is now the dividend that we must
consider when defining the quotient-remainder area. Since the divisor (GALS) is
three bytes, and the dividend is now four bytes, the answer area (ANS2) is defined as
seven bytes.
ANS3 requires a one-decimal quotient. Therefore, to generate two decimal
places we multiply the dividend by 100. Since the divisor is three bytes and the
dividend is now four, ANS3 is defined as seven bytes. After the DP we round and shift
the second decimal place.
ANS4 requires a two-decimal quotient. Multiplying the dividend by 1000 gen¬
erates three extra decimal positions. Since the divisor is three bytes and the dividend
is now five, ANS4 is defined as eight bytes. This example also illustrates redefining
the answer area. ANS4 is defined with a zero duplication factor (0PL8). It contains
two subfields: QUOT defines the five-byte quotient area, and RMDR defines the
three-byte remainder. We may reference by name the entire area ANS4, or the
subfield QUOT.

Problem 5-6 should now be attempted.

SAMPLE PROGRAM—INVENTORY UPDATE

In a typical business system, there are two common types of records. Master records
contain data of a relatively permanent nature, such as Customer name and address,
or Stock description and price. Other data can be temporary and subject to periodic
change, such as current Customer balance or current Stock quantity on hand.
Transaction records contain data for the current period that affects the Master
records. For example, a payment or sale must be applied to the balance owing in the
Customer Master record, and a Stock receipt or issue must be applied to the quantity
on hand in the Inventory Master record.
A "control break" occurs when the input records make a significant change
in the control fields. In the example program next, it is necessary to break control and
print totals by changes in Stock number (minor totals), and by Branch number (major
totals). There can be any number of Receipt records for a Stock item, and any number
114 DECIMAL ARITHMETIC II

Calculation and print routine

(DIO)

DIOSTOCK
STOCK YES
QUANITY ^ ~
=°?

jfNO
UNIT-COST =
STOCK COST -F
QUANTITY
.
MOVE TO PRINT:
STOCK COST,
UNIT COST, QTY.
DESCR'N, ETC.

PRINT
DETAIL
LINE

ADD STOCK COST

TO BRANCH,
CLEAR STOCK.

Process
branch
totals

Error routines:

MOVE TO PRINT:
'OUT OF SEQ'

i
MOVE TO PRINT.
'CARD CODE NOT END-OF-JOB
12'

MOVE TO PRINT: PRINT

'CARD CODE NOT ERROR
IV MESSAGE

CLOSE
FILES

D
FIGURE 5-5 Flowchart for sample inventory program.
115 Sample Program—Inventory Update

of Stock items in a Branch. The program is organized into logical, separated sections
that perform specific functions.
The flowchart in Figure 5-5 depicts an inventory update program. There are two
types of records, Inventory masters (code 11) and Inventory receipts (12).

COLUMN INVENTORY MASTER RECEIPTS

1 -2 Record code (11) Record code (1 2)

3M Branch number Branch number
5-8 Stock number Stock number
9-24 Description
25-28 Quantity on harld
29-35 Cost on hand
11-13 Quantity received
14-17 Unit cost of receipt

— For each Stock number there may be only one master record (code 11) but any
number of receipts (code 12). The master record precedes its receipt records.
— Missing masters, invalid record codes, and out-of-sequence conditions on
Branch-Stock number cause errors.
— For each receipt record that contains the same Stock number as the master
record, the program calculates quantity times unit cost. The calculated cost is
added to total cost on hand for the Stock, and the quantity received is added to
total quantity on hand for the Stock.
— The program checks sequence on Stock number (minor) and on Branch (major).
The program uses a control word composed of Branch-Stock number. If the new
control word is greater than the previous, then the program prints the stored Stock
number data and calculates and prints new unit cost. (This is a "control break"
on the Stock number.) New unit cost is calculated by dividing Stock cost-on-hand
by quantity-on-hand.
— If the input Branch number is also higher than the one in the previous record,
total Branch cost is printed. At the end of the run, the program prints total cost for
all Branches.
— The first record condition is handled by hex zeros in "PREVCTL". On a high
Branch/Stock, if PREVCTL contains hex zeros, the program recognizes a "false
control break" on the first record. End-of-file is handled by storing hex F's in the
input Branch/Stock number to force printing the last stored Stock and Branch.

Figure 5-6 provides the program listing. The program has two new features,
ORG and PDUMP, which the next sections explain. Carefully study the flowchart
and listing and work through all conditions. For purposes of brevity, the program
omits some features that we would normally include, such as printing the current
date and page overflow.
 INVENTORY UPCATE AND CALCULATE UNIT COST

4 4 INITIAL I Z A T I 0 N
5 4

6 PRCG05 INIT INITIALIZE

27 OPEN CARO.PRTR

37 PUTPR PRTR.PRINT,SK1 SKIP TO NEW PAGE

44 PUTPR PRTR.PRHEADI, »SP2 PRINT HEAOING-l
5 1 PUTPR PRTR.PRHEAD2.VSP2 * HEADING-2

59 4 N A I N L 0 G I c
6C 4

6 1 A 1 OREAD GET CARD tCARDlN

67 CL C CTLIN.PREVCTL 8RANCHZSTOCK NO. SEQUENCE?
68 BE ClORECT * EQUAL - PROCESS RECEIPT
69 BL R10SEQ * LOW - OUT-CF-SECUENCE
70 4
* HIGH - NE» STOCK NO.
71 CLC PREVCTL.LOVVALUE first recoro of file?
72 BNE D10 STOCK ♦ NO - CONTROL BREAK
73 B BIOMAST * YES- PROCESS MASTER

75 A20EOF M VC CTLIN.HI VALUE EOF - STORE HI VALUE, FORCE

76 B 01OSTOCK * CONTROL BREAK 4 ECJ

78 4 PROCESS I N V E N TORY MASTER

79 4
80 B1CMAST CLC CODE IN.=C*1 1 • MASTER RECORD?
8 1 BNE R30N0MAS * NO - ERROR
82 M VC PREVCTL .CTLIN STORE BRANCH-STOCK IN PREV
83 MVC DESCRN.OESCRPIN STORE STOCK FIELDS
84 PACK STCOSTPK.COSTIN 4
es PACK STOQTYPK.QTYIN 4
86 B AIOREAD

ea 4
PROCESS R E C E i PTS RECORD
89 4
90 ClCRECT CLC CODEIN.—C*12* RECEIPT RECORO?
91 BNE R20NCREC * NO - ERROR
92 PACK OTYPK.QTYRECIN
93 AP STOOTYPK.QTYPK AOO QUANTITY RECEIVEO TO STOCK
94 PACK COSTFK.UNCOSTIN QUANTITY X UNIT-COST = COST
95 MP COSTPK.QTYPK j xxjxxj XX]XC| 2 DEC
96 AP STCOSTPK.COSTPK AOO COST OF RECEIPT TO STOCK
97 e AIOREAD

99 4
CALCULATE N E W UNIT COST
00 4
D1CST0CK ZAP UNCOSTPK,=P*o•
CLEAR UNIT-COST FIELD
1 02 ZAP STCOTYPK.STOQTYPK STOCK QUANTITY = 07
103 BZ D20
104 • YES - BYPASS DIVIDE
ZAP UNCOSTPK.STCOSTPK
105 MP I 00 loo|00|00|XX |XX|XX|XC J OEC
UNCOSTPK.=P*10*
106 OP |co|oo!oo|ox|xx|xxlxx|oc| OEC
UNCOSTPK.STOOTYPK 1 00| 00|xxjxxj xc|xx|xx|xc|
107 AP DEC
UNCOSTPK!5> «UNC0STPK44(1) ROUND. THEN SHIFT 1 DIGIT
108 MVO
UNCOSTPK(51.UNCOSTPK(41 100|00|OXJXX|XC I XX1XX|XC1 2
DEC
110 020 M VC COSTPR.EOCOST
111 ED COSTPR.STCOSTPK
EDIT STOCK FIB. DS
* COST

1 13 N VC UNCOSPR.EDUNIT
1 14 ED UNCOSPR.UNCOSTPK+2
UNIT COST

FIGURE 5-6 Inventory update.

1 16 MVC CTYPF.EDOTY *
l l7 ED CTYPfi.STOOTVPK * QUANTITY

1 19 MVC DESCRIPR.DESCRN
120 MVC STGCKPR tPREVSTK
12 1 MVC BRANPR.PREVBR

123 PUTPR PRTR.PR I NT.MSP 1 PRINT STOCK RECORD

1 30 MVC PRINT.BLANK
1 3 I AP 8RC0STPK.STCOSTPK ADO COST TO BRANCH TOTAL
13 2 ZAP stcostpk ,=p* 0• CLEAR STOCK COST

134 CLC 8RANCHIN.PREVBR NEM BRANCH = PR EV10U S 7

135 BNE E106 RAN NO - PROCESS BRANCH TOTAL
1 36 B 810MAST YES - PROCESS MASTER

139 *
PROCESS BRANC H TOTAL
140 ♦
141 E1CBRAN PUTPR PRTR.PRINT,SP1 SPACE 1 LINE
148 MVC C0STPRIL*£0C0ST+1).EDC0ST
149 EO CCSTPR.BRCOSTPK EOIT TOTAL BRANCH COST
150 MVC DESCR I PR<12), = C•BRANCH TOTAL*
151 PUTPR PRTR.PRINT.MSP2 PRINT BRANCH TOTAL
158 MVC PRINT.BLANK

160 AP FINCOSPK.BRCOSTPK AOO BRANCH COST TO FINAL

161 ZAP BRCOSTPK.=P*0* CLEAR BRANCH COST

163 CLC CTL IN.HI VALUE END-OF-FILE CONDITION REACHED?

164 BE F1 OF INAL YES- PROCESS FINAL TOTAL
165 B BIOMAST NO - PROCESS MASTER

167 * PROCESS FINAL total

168 *
169 F1 OF INAL M VC C0STPR(L*EDCCST+2).ECCOST
170 EO COSTPR.FINCOSPK EOIT FINAL TOTAL COST
171 MVC DESCRI PR(12). = C*FINAL TOTAL*
1 72 PUTPR PRTR.PRINT.MSP 1 PRINT FINAL TOTAL LINE

180 IpdumpI BRCOSTPK,P +132 demonstration of poump macro

i e6 CLOSE CARO.PRTR
195 EO J

199 * ERROR ROUTINE s

200 *
20 1 R1 OS EQ MVC P+41<L*SEQERR),SEQERR OUT-OF-SEQUENCE BRANCH/ST CCK
20 2 e R80

204 R2CNCREC MVC P+41(L*RECTERR).RECTERR SAME STOCK. RECORD NOT RECEIPT

205 e R80

207 R30N0MAS MVC P + 4 1<L * MASTERR ) .MAS TERR NEM STOCK RECORD. NOT MASTER

209 R80 MVC STCCKPR.PREVSTK

210 MVC 6RANPR*PREVBR
2 1 1 PUTPR PRTR.PRINT.MSP3 PRINT ERROR MESSAGE
21 e CLOSE CARO «PRTR
227 CANCEL • ABNORMAL TERMINATION

233 ♦ DECLARATIVES
234 ♦

236 CARD defco A20ECF DEFINE CARD FILE

260 PR TR DEFPR DEFINE PRINTER FILE

FIGURE 5-6 (Continued)

117
 265 BRCOSTPK DC PL 4 • 0 • P4CKE0 declaratives:
2B6 COST PK DC PL4•0* *
26 7 FINCOSPK DC PL 4 • 0 • *
288 CTYPK CC PL2•0* *
289 STCOSTPK; dc PL 4 • C • *
290 STCQTYPK DC PL3• 0 • *
291 UNCOSTPK OC PL 6 • 0 • *

293 CESCRN OC CL 16* •

294 SEQERR CC C•RECORD OUT-CF-SEQUENCE ON EfiANCH/STOCK•
295 RECTERR DC C•SAME 8R/STOCK, NOT RECEIPT RECORD*
296 MASTERR DC C'CIFF BR/STOCK. NOT MASTER RECORD*

29 8 LO WVALUE OC XL6•00• LOW VALUE FOR 1ST RECORD TEST

299 HIVALUE DC 6X*FF* HIGH VALUE FOB EOF PROCESSING
30 0 PRE VCTL DS 0CL6 PREVIOUS BRANCH/STOCK
30 1 PREVBR DC XL 2*00* * BRANCH NO.
302 prevstk CC XL4•00 * * STOCK NO.
303 4 EDIT WORDS :
304 EDCOST OC X* 40202C6B20202 14B2C20C309*.C* 4*•
305 EDUNIT OC X*4020202I4B2C20*
306 EOQTY CC X*402020202020C3D9*

308 CARDIN OS 0CL80 INPUT RECORD COLUMNS:

309 COCEIN DS CL 2 01-02 RECORO CODE
310 CTLIN OS 0CL6 BRANC H/STOCK CTL FIELD
31 I ERANCHIN DS CL 2 03-04 8RANCH
3 12 STOCKIN DS CL 4 05-08 STOCK NO.
3 13 DS CL 7 2

3 15 ORG CARDIN
3 16 DS CL 6 INVENTORY MASTER:
317 DESCRPIN DS CL I 6 09-24 * DESCRIPTION
3 18 CTY I N OS ZL4 25-28 * QUANTITY
319 COST IN DS ZL7*00000.00* 29-35 * COST

32 1 ORG CARDIN
322 DS CL 10 RECEIPTS :
323 qtyrecin DS ZL3 11-13 * QUANTITY
324 UNCOSTIN DS ZL4 *00.00* 14-17 4 UNIT COST
325 ORG
RESET LOCATION COUNTER

327 BLANK DC C* •
BLANK FOR CLEARING PRINT AREA
328 PRINT OS 0CL133 PRINT area:
329 P OC CL 1 • • 4
330 DC CL 17* • 4
33 l BRANPR OS CL 2
* BRANCH NO.
332 OC CL4 • • •
333 STOCKPR OS CL 4
* STOCK NO.
334 OC CL 2 • • 4
335 DESCRIPR DS CL 16
* DESCRIPTION
336 QT YPR DS ZL 6
* QUANTITY
337 CC CL 4* • *
3 3e UNCOSPB DS ZL 7
* UNIT COST
339 COSTPR DS ZL 12
* COST
340 OC CL 56• • 4

342 PRHEA01 DC CL 18* •

343 PRINT AREA FOR HEAD ING—1
DC CLllS'INVENTORY
UNIT-COST REPORT*
345 PRHEAD2 CC CL 16* • PRINT AREA FOR HEAD ING—2
346 CC CL29'BRANCH STOCK* •
347 CC CL 88*QUANTITY UNITCOST COST*
348 ENO PROGC5

FIGURE 5-6 (Continued)

119 ORG—Set Location Counter

I N V ENT 0 R » UNIT -COST R E P C R T

BRANCH STOCK QUANTITY UNITCOST COST

0 1 1234 PLYWOOD 1/4 107 28 3 19.00

0l 246e PLYWCOO 3/e 150 5.50 825.00

EBANCH TOTAL 1 , 14 4.00 *

33 1234 PLYWOOD 1/4 SCR 3.05 15.25CR

33 2468 PLY MOOD 3/8 305 4.63 1.412.50
33 2470 PLYWOOD 1/2 160 5.4e 876.25

BRANCH TOTAL 2.273.50 *

40 1234 PLYWOOD 1/4 25 3.06 76.50

40 2470 PLYWOOD 1/2 • 00 .00
2844 PLYWOOD 3/4 2 6.75 13.50
40

BRANCH TOTAL 90.00 *

FINAL TOTAL 3.507.50 **

FIGURE 5-6 (Continued)

ORG—SET LOCATION COUNTER

ORG is a command to the Assembler to alter or reoriginate the value of the location
counter during assembly. We generally use ORG to redefine data areas in the pro¬
gram, that is, one on top of the other.

NAME OPERATION OPERAND

[omit] ORG A symbol or not used

The name is normally used only in macro writing, and is otherwise omitted. The
ooerand if any, is a symbolic address with or without relative addressing (i.e., A30,
or A30 + 1000), or a reference to the location counter itself (as * + 20). The Assembler
sets the location counter to the value of the expression. The operand may not be an
absolute address, such as 8192 or X'2000'. Note: if the operand ,s omitted, the
Assembler sets the location counter to the maximum value that it has been set up to

P[3eware of ORG with no operand, because the Assembler may mistakenly use a
comment for its operand. In the following, the Assembler will use the asterisk in
column 41 as the ORG operand. Instead of setting the location counter to the
previous high setting, it is set incorrectly to the current setting of the location counter:

column 10 16 41
ORG * RESET LOCATION COUNTER

The solution as shown in the program is to insert a comma in column 16, which tells
the Assembler explicitly that there is no operand.
120 DECIMAL ARITHMETIC II

Figure 5-7 provides the object code for declaratives defined in the previous
program. ORG is used to redefine the input area, which starts with column 1 at
X'DA61 D' in statement 308. First, the fields common to both types of records, Master
and Receipts, are defined. Then the other fields for both record formats are uniquely
defined.

223 ♦ DECLARATIVES
234 4 -

23e CABO DEFCD A20ECF

260 PRTR DEFPR

0CA55A OCOOOOOC 285 BRCOSTPK DC PL4•0•

0DA55E OOOOOOOC 2ee COSTPK DC PL 4 * 0*
0CA562 OCOOOCOC 28 7 F INCOSFK DC PL4 *0•
0DA566 OOOC 288 QTYPK DC PL 2*0*
0CA568 OCOOOOOC 289 STCOSTPK DC PL4•C•
0DA56C oooooc 290 stcotypk DC PLS'O*
0CA56F oooooooooooooooc 29 1 UNCOSTPK DC PL8* 0*

0CA61D 308 CABDIN OS OCL80 I NPUT RECORD COLUMNS:

0 C A6 1 D 309 CODE IN DS CL 2 0 1-02 RECORD CODE
OCA6 1 F 3 10 CTLIN DS 0CL6 CTL field:
0CA6IF 3 1 1 6BANCH1N DS CL 2 03-04 BRANCH
0CA621 312 stockin DS CL4 05-08 STOCK NO.
0DA625 3 1 3 DS CL 72

0CA66D 315 lOBGl CARDIN

QDA610I 316 OS CL 8 master:
0DA625 3 1 7 DESCRPIN DS CL 1 6 09-24 * description
ODAC 35 318 CTYIN DS ZL4 25-28 * QUANT I T Y
OCA639 3 19 COST IN DS ZL7*COOOO.OO’ 29-35 * COST

0CA640 321 1 OR G 1 CARDIN

OCA61DI 3 22 OS CLIO RECEIPTS :
CDA627 323 QTYREC IN DS ZL3 11-13 » QUANTITY
0DA62A 324 UNCOST IN DS ZL4 *00.00• 14-17 * UNIT COST
00A62E 325 lOBGl • RESET LOCATION COUNTER

0DA66D 4C 327 BLANK DC c« •

0CA66E 328 PRINT OS 0CL133 PRINT area:
0CA66E 4 0 329 P DC CL1 • • *
0CA66F 4040404C40404040 330 DC CL 17* • *
0DA680 331 BR ANPR DS CL 2 ♦ BRANCH NO.
0DA6 &2 4C404040 332 DC CL 4 • • *
0OA686 333 STOCKPR DS CL4 * STOCK NO.
0CA68A 4040 334 DC CL 2 • • ♦
ODA60C 335 DESCRIPfi OS CL 16 ♦ DE SCR I PT ION
0CA69C 336 QT YPR DS ZL 8 * QUANTITY
OCA6A4 40404040 337 DC CL 4 • t ♦
0DA6Ag 338 UNCO SPR DS ZL7 * UNIT COST
OCA6AF 339 COSTPB DS ZL 1 2 ♦ COST
OCA68e 4040404040404040 340 DC CL56• • ♦

0CA6F 3 4 040404040404040 342 PRHEADl OC CL 18* •

FIGURE 5-7 Use of the ORG instruction.

121 PDUMP—Partial Dump of Main Storage

STATEMENT EXPLANATION

313 The statement DS CL72 at X'DA625' increments the location counter

by 72 (X'48'): X'DA625' + X'48' = X'DA66D' (as shown at statement
315).
315 ORG CARDIN resets the location counter from X'DA66D' to the address
of CARDIN X'DA61 D'. It now references column 1, the start of the
input area. The Master record fields are defined next.
321 ORG CARDIN again resets the location counter to CARDIN, X'DA61 D'.
The Receipts record fields are defined next.
325 Since the ORG here has no operand, the Assembler sets the location
counter to its highest previous setting, X'DA66D', achieved after state¬
ment 313. Note: the address of the next field, BLANK, is defined
at X'DA66D'. Check the accuracy: CARDIN is defined at X'DA61D',
and is 80 bytes long (X'50'). X'DA61D' + X'50' = X'DA66D , the
correct location for the first field following CARDIN.

All fields for both types of records may now be referenced by name, without an
explicit length. In a similar manner, we may use ORG to redefine the print area.

PDUMP—PARTIAL DUMP OF MAIN STORAGE

The DOS PDUMP macro is a convenient device for program debugging. (The macro
differs under operating systems.) PDUMP enables us to see the contents of any
storage area during program execution. When the program encounters PDUMP it
transfers control to the Supervisor, which produces a hexadecimal printout of the
contents of the registers and of the specified storage area. At termination of the dump,
control returns to the statement immediately following the PDUMP.

NAME OPERATION OPERAND

[symbol] PDUMP addressl ,address2

Addressl and address2 reference the start and end positions of the area to be
dumped The addresses may be symbolic (as A10,CARDIN+ 80), or hexadecimal (as
X'301 5' X'3420'). We normally use PDUMP in a program that contains a bug, and
we want to know the contents of certain accumulators and work areas at some
snecific ooint We can insert PDUMPs in the program wherever storage contents are
:ePquiredPWhen the program is corrected and working, we take the PDUMP out
Refer again to the sample program. Statement (STMT) 180 specifies PDUMP
BRCOSTPK P+132 to print hex contents from BRCOSTPK (location X DA55A )
through to P + 132 (location X'DA6F2', hex address not printed). Although the pro¬
gram works correctly, PDUMP is inserted so that it executes after the printing of e
122 DECIMAL ARITHMETIC II

GR 0-7 C000A810 OOO0A8O8 OOOE9FFF 400DA07A OOOCB07A OOODCO 7A 8000CC25 OOCE9FFF

GR 8-F 800CB480 OA16180C 00000000 182F07F1 0CCCA078 OOOCA09C AF0CA2C6 O0CDA900
FP REG 41800000 00000000 43CFBOOC OOOOOOOC CCOOOOOO COCCCCOO OCOGCCCO OOOOOOOO
CR 0-7 80400CEO 04C14EOO FFFFFFFF FFFFFFFF OOOOOOOO OOOOOOOO OOOOOOOO OOOOOOOO
CR e-F C 0 000000 OOOOOOOO CCOOOOOO OOOOOOOC OOOOOOOC OOOOOOOO EFOOOO 00 00000200
DASS-g —.. _ <3*c-0STffC caSTgK
OCA'540 _ F\ncOsPK Q-tY/'k ^(40)4ofoC0 0 ooocfrooo
0CA56C 700dc350 75QC|OOXF| OOOOOOOC 00002COO 00006 75C OOOOOCD7 03E8E606 06C440F3
00 A 5 8 0 61F44040 404040D9 C5C306D9 C440D6E4 E 36006C6 60E2C5D8 E4C505C3 C54006D5
0CA5AC 40C2D9C1 DSC3C861 E2E3CEC3 D2E2C104 C540C209 61E2E306 C3D2CB40 05C6E340
0CA5C0 C9CSC3C5 C907E340 09C5C306 09C4C4C9 C6C640C2 0961E2E3 D6C 3026 0 4005D6E3
0DA5EC 4004C1E2 E3C5D940 0SC5C3D6 09C40000 OOOOOOOO FFFFFFFF FFFFF4F0 F2F8F4F4
OOA60C 40202060 2020214B 2020C3DS 5C5C4020 20214020 20402020 2020 2 OC 3 09F1F2FF
0CA620 FFFFFFFF FF4040FO F0FIF0F7 F OF 0 4 040 40404040 40404040 404C4040 4C4C4040
OCA64C 404C4C40 — S A ME-
OC A66C 4 0404C 40 40404040 40404040 40400940 40404040 404C4040 40404040 40404040
OCA68C 404C4040 40404040 40404040 C6C9D5C1 C34040E3 06E3C103 40404040 4C404040
OCA6A0 40404040 40404040 4040404C 40404040 40F36EF5 FOF740F5 F040405C 5C404040
0CA6C0 40404040 -SAME--
OC A6E (^jfo)»C4C40 40404040 4040404C 40404040 40404011

FIGURE 5-8 Hexadecimal storage dump.

final total. Refer now to the dump itself in Figure 5-8. (Some dump versions may
differ from this one.)

— Lines 1 and 2 print the hex contents of the 16 general registers, GR 0-7 and
GR 8-F, or registers 0-7 and 8-15.
— The next line lists the hex contents of the floating-point registers, FP REG.
The lines following with CR 0-7 and CR 0-F show the contents of the 1 6 "Control
Registers" of the 370 that the operating system uses.

The contents of storage print next. Each line lists 32 bytes, with the hex contents
to the left, and the character contents—if the character is printable—to the right (not
shown in the figure). The vertical spacing between each 4 bytes (8 hex digits) is for
readability, and may be ignored. At the extreme left is the address X'DA540\ of the
first location to be printed on the line. The address of the first byte in each group of 4
bytes after DA540 is DA544, DA548, and DA54C. The address of the first byte at the
center is DA550. Now PDUMP begins printing with the group that contains the first
byte specified, BRCOSTPK at DA55A. Thus, DA558 and DA559 are printed (and
contain '4040'). Next print the contents of BRCOSTPK, a 4-byte field, containing
OOOOOOOC'. The next field defined in the program, COSTPK, is 4 bytes beginning it
DA55E, and contains '0000700C' (spilling onto the next line)

DA558
DA562 ^ DA566^
r DA55E
uaooo ^UOQDO 000O6d00

70000^)50 750COT1F BRCOSTPK COSTPK

FINCOSPK QTYPK
123 Problems

Check the names and locations to Figure 5-7 to ensure that the dump represents the
storage contents correctly.
Thus, PDUMP provides the starting address on a line, and to locate the contents
of any field, we must count across the line, using each pair of digits as one byte. Note
the line beginning at DA640: All the locations on that line contain the same charac¬
ter X'40'. PDUMP minimizes printing and simply prints —SAME—.
Under Operating System (OS), a partial dump requires the SNAP macro and
other complex coding—see the IBM Supervisor manual.

DEBUGGING TIPS

The ED instruction offers almost unlimited scope for new bugs. Before assembly,
double-check the MVC/ED operations. Allow in the edit word X'20's and X'21's for
each packed digit to be edited (there should be an odd number). Be sure that the print
area field is the same size as the edit word.
The most common error with MP seems to be ignoring the rule that the product
field must be at least the length of the multiplicand plus multiplier in bytes, regardless
of the contents. If too short, then count on a much-deserved Data Exception.
DP suffers from the similar problem of field length: the quotient/remainder area
must be at least as long as the dividend (after the MP left-shift, if any) plus divisor.
Another popular error is attempting to divide by a zero value—check for a zero
divisor first! Both errors cause "Decimal Divide Exceptions".
If the bug cannot be located, rerun the program with a request for a dump of
storage, and trace the hex contents of the concerned storage areas. Almost always the
error is in your program or data, rarely in the operating system, and never is it the
computer.
As well as the technical misuse of instructions, there are the problems with
programming logic—wrong compares, wrong branches, wrong calculations. Perhaps
the worst error is misunderstanding the problem, and coding the incorrect solution.
Analyze the program specifications carefully before flowcharting and coding the
program.

PROBLEMS

5-1. Editing.
(a) What characters other than X'40' may be used as the fill character?
(b) An amount field containing zero is defined as TOTAL DC PL3'0'. Define an
edit word to cause TOTAL to print as all blanks.
(c) Why must the edit word contain an odd number of X'20's and X'21's?
(d) Refer to the IBM Principles of Operation manual and define the purpose of
the "field separator."
5-2. Complete the following Edit words and Edit operations as indicated.
124 DECIMAL ARITHMETIC II

If zero amount, the edited field should

print as:
(a) AMT2 DS PL4
ED2 DC X’ .00 (Use comma, decimal point,
MVC PRINT+20, minus sign)
ED
(b) AMT3 DS PL5
ED3 DC X’ 0.00 (Use commas, decimal point,
MVC PRINT+40, minus sign)
ED
(c) AMT4 DS PL4
ED4 DC X’ .00 (Use $, comma, decimal point,
MVC PRINT+60, CR, and two asterisks)
ED
Use MVO to shift the contents of the following DC. Indicate the results in hex
Questions are unrelated.

PKFIELD DC P’123456789’

(a) Shift right one digit.

(b) Shift right two digits.
(c) Shift right four digits.
5-4. Rounding. Why are two MVO's used to shift an even number of digits right? If
the field is to be rounded as well, why is the AP between the two MVO's and
not before or after them?
5-5. Multiply Packed. Use a coding sheet to write the instructions as indicated.
Show results in hex representation. Define the product area called PROD in
each example.

A DC P’82.5’
B DC P’940.5’
C DC P’78.55’
D DC P’92.345’

(a) Multiply A x B. Round and shift to 1 decimal position.

(b) Multiply B x C. Round and shift to 2 decimal positions.
(c) Multiply B x D. Round and shift to 2 decimal positions.
(d) Multiply C x D. Round and shift to 2 decimal positions.
(e) Explain the error (if any): MP C, = P'2'.
5-6. Divide Packed. Use a coding sheet to write the required instructions. Show the
hex results, and define the quotient-remainder area as RESULT.

A DC P’017’
B DC P’127.5’
C DC P’613.57’
D DC P’925.365’
125 Problems

(a) Divide B/A, round and shift to 1 decimal position.

(b) Divide C/B, round and shift to 2 decimal positions.
(c) Divide D/A, round and shift to 1 decimal position.
(d) Divide D/B, round and shift to 0 decimal positions.
(e) Explain the error (if any): DP D, = P'2\
5-7. PROGRAM ASSIGNMENT.
Required: A program that reads Sales records containing selling price and cost,
and calculates gross profit, percent gross profit, and sales commission.
Input: Sales records, containing in each column:

1-2 Record code (25) 11-13 Commission rate (e.g. .155 = 15.5%)
3-4 Store number 14-27 Category description
5-7 Salesman number 28-33 Selling price (xxxx.xx)
8-10 Category (type of sale, 36-41 Cost price (xxxx.xx)
such as TV, furniture, appliance)

Procedure:
— Check for valid record code (25) and that records are in sequence by Sales¬
man (minor) within Store (major).
— For each record, calculate and print:
Gross profit = Selling Price - Cost (Cost can exceed Selling Price).
Percent Gross Profit = Gross Profit -4- Cost.
Commission = Gross Profit x Commission rate.
— For each Salesman, print totals of Sales, Cost, Gross Profit, and Commis¬
sion. Calculate Percent Gross Profit. For each Store and for final total, print
and calculate as for Salesman.
— Provide test data that checks all conditions. Flowchart, code, and test. Take
a hex dump of storage and analyze the contents.
 CHAPTER 6

BASE REGISTERS AND

INSTRUCTION FORMAT

Up to now we have used only instructions that access data in main storage—the
storage-to-storage (SS) and storage immediate (SI) formats. The next step is to use the
registers to perform binary arithmetic and to manipulate addresses. These operations
enable the explicit use of registers in addressing for powerful programming capabil¬
ity, such as table look-up. For these purposes we must learn how to use registers for
arithmetic and for addressing, and what is the machine language object code format
for each instruction.

THE GENERAL PURPOSE REGISTERS

The 16 general purpose registers are separate from main storage. They are numbered
from 0 through 15, and are referenced by number.* Each register contains 32 bits of
data, numbered from left to right 0 through 31. The registers have two main purposes,
binary arithmetic and addressing.

*We can use EQU to assign a name to a register: e.g., LINKREG EQU 7 tells the
Assembler to substitute the number 7 for each reference to the name LINKREG in the
program. Thus, the instruction BAL LINKREG,HIOHEAD becomes BAL 7,H1 OHEAD.

726
127 Base Register Addressing

1. Binary Arithmetic. The general registers perform all binary arithmetic. For binary
values, bit 0 is the sign bit, and bits 1-31 are data. Chapter 7 covers binary
arithmetic in detail.

As¬
sign Data
bit: 0 I 31

2. Addressing. The general registers perform all the addressing involved in referenc¬
ing main storage. A register used for addressing purposes is called a base register.
Addressing uses only the rightmost 24 bits of the register (bits 8-31), giving a
maximum address of 224-1 , or 16,777,215. Certain instructions of "RX" format
have the facility to modify or "index" an address; a register used for this purpose
is called an "index register".

Unused Address
bit: 0 7 8 31

Some of the registers have special functions, and the following restrictions
apply:

REGISTER RESTRICTIONS

0-1 We may use 0 and 1 freely for temporary calculations, but Supervisor
operations such as CALL and PUT destroy their contents. Also, because
the Supervisor uses register-0 as its own base register, the system does not
permit us to use register-0 as a base register.
2 2 is available as a base register or for binary arithmetic, with one excep¬
tion: the TRT instruction uses register-2 to store a generated value, thus
limiting its use as a base register.
3-12 Registers 3-12 are always available for binary arithmetic or as base reg¬
isters.
13 Control program routines including the input/output system use register-
13. We use it when performing special linkage to a "subprogram," and
otherwise should not use it.
14-15 Control program and subprogram routines also use these. Their use is re¬
stricted as for 0 and 1, for temporary calculations.

BASE REGISTER ADDRESSING

On earlier computers, instructions directly referenced main storage locations by their

assigned number. The computer may have had an Add instruction (coded as 21) to
add the contents of location 01056 to 01232, coded as 21 01232 01056. Such a
128 BASE REGISTERS AND INSTRUCTION FORMAT

direct addressing system is simple, but limits the highest address, in this case to
99999. Modern large computers require considerably more storage because of (a)
more complex input/output facilities, (b) complex operating systems, and (c) the
capability of multiprogramming—the executing of two or more programs in storage
concurrently.
For addressing main storage locations, the 360/370 use the rightmost 24 bits of
a register, providing a maximum address of 16,777,215. Every instruction operand
that references a main storage location consists of more than just a direct reference to
that location; the computer architecture compresses the addresses by splitting them
into two parts, a base address and a displacement:

1. Base Address. This is an address of the beginning of an area of storage. We code

BALR to load this address into a register, and code USING to tell the Assembler
that this register is to be the program's base register containing the address of the
start of the program. The INIT macro has performed these functions up to now.
We can allocate any registers (preferably 2 through 12) for the base address, and
may not use it for any other purpose in the program.
2. Displacement. The Assembler calculates the displacement for each instruction
and declarative in the program, the number of bytes that the actual location is
from the base address.

Each address referenced therefore consists of two parts: the contents of the base
register combined with the displacement provides the effective address. Refer to
Figure 6-1 a. Assume that register-3 is the base register for a small program in main
storage. Register-3 contains the value X'4200', which is the location of the first byte
of the program in main storage. (Do not be concerned for now how X'4200' loads
into register-3 or how the Assembler knows this value.)

Main storage

Register-3:

X'4200'

FIGURE 6 la Base register addressing—one base register.

Every location within the program is relative to the first byte X'4200' For
example, location X'4502' is X'302' bytes from the start, and therefore location
X'4502' has a displacement of X'302' bytes. The computer then references location
X'4502' by adding: base address X'4200' plus displacement X'302' equals the effec¬
tive address X'4502'. Any instruction referencing this location does so by means of
the contents of the base register (X'4200') plus the displacement (X'302').
129 Base Register Addressing

The Assembler calculates the displacement for every instruction and declara¬
tive in the program. For every instruction that references a main storage location, the
Assembler forms an operand in object code comprised of the base register number
and the displacement, and stores this as two bytes within the instruction:

B D D D]
bits: 0-3 4-15

Bits 0-3 provide four bits to reference a base register, as X'l' through X'F', Bits 4-15
provide for a displacement from X'000' through X'FFF' (up to 4095 bytes). Thus, in
Figure 6-1 a an instruction referencing X'4502' would contain as its operand the hex
value I 3J 302\. To reference X'4502' the computer adds the contents of the base
register-3, X'4200', with the displacement, X'302'. An MVC instruction would move
data to the address X'4200' plus X'302'.

Example: Assume that a program defines PRINT + 30 at location X'4502'. The As¬
sembler would translate the instruction MVI PRINT + 30,C'*' into hex object code as:

92 5C 3 | 302
/
machine code for MVI displacement
base register

At execution-time, the computer processes the MVI instruction by combining the

contents of base register-3 with the displacement, and moves the asterisk into the
calculated effective address, X'4502'.

MORE THAN ONE BASE REGISTER. Since the maximum displacement is X'FFF',
or 4095, the area covered by a base register and its displacement is X'000' through
X'FFF', giving X'1000' or 4096 bytes. Each 4096 (4K) bytes of program being exe¬
cuted requires a base register. A program up to 12K bytes in size requires three base
registers, as shown in Figure 6-1 b.
The first 4K area begins with base address X'4200', and any position defined
within this area is subject to base register-3 and a displacement relative to the base
address. The second 4K area begins at a location X'1000' higher, at X'5200'. In the
example, the base register is register-4 (although it could have been some other
available register), and any position defined within this area is subject to base
register-4 and a displacement. Also, in the example, any position defined within the
third 4K area beginning at X'6200' is subject to base register-5 and a displacement.
There are two advantages to base/displacement addressing:

1. Instruction length is reduced because each address requires only two rather than
three bytes.
130 BASE REGISTERS AND INSTRUCTION FORMAT

Main storage

FIGURE 6-1 b Base register addressing—three base registers.

2. Such a system facilitates program repeatability. The Assembler does not assign
specific locations for each address. Instead, it determines where each address is
relative to a base address. At execute-time the base address may be almost any
location, loaded in a base register. Accordingly, the system may locate a program
almost anywhere in main storage for execution. For example, the program may be
executed beginning in X'4200' today, and next week in X'6840'. The purpose of
relocatability is to facilitate multiprogramming—the executing of two or more
programs in storage concurrently. (Although there are several programs in main
storage, the computer can execute only one instruction at a time, and it "flip-
flops" between programs, as available time permits.)

INSTRUCTION FORMAT

This section examines the instruction format in detail to make clear how the Assem¬
bler converts symbolic to machine language code and how it converts base registers
and displacements. Each format has a specific purpose. RR format processes data
between registers; RS and RX process data between registers and storage; SI and SS
process data between storage positions, as follows:

Registers:
Format:
RS RX
RR Register-to-Register
RS Register-to-Storage
RX Register-to-Indexed-Storage
Main SI Storage Immediate
storage: SS Storage-to-Storage
131 Instruction Format

Figure 6-2 depicts the five formats. The column under Format contains the
general symbolic coding format. For example, RR means that both operand-1 and
operand-2 reference a register. SS means that both operands reference storage ad¬
dresses. The other symbols, explained in the next section, are:

D = displacement
B = base register
X = index register
I = immediate operand

Length
Format in Explicit symbolic Object code format
bytes operands

RR 2 R1, R2 OP R1R2
RS 4 R1, R3, D2 (B2) OP R1R3 B2D2 D2D2
RX 4 R1, D2 (X2, B2) OP R1X2 B2D2 D2D2
SI 4 D1 (B1), 12 OP I I B1D1 D1D1
SS (1) 6 D1 (L, B1), D2 (B2) OP L L B1D1 D1D1 B2D2 D2D2
SS (2) 6 D1 (LI, B1), D2 (L2, B2) OP L1L2 B1D1 D1D1 B2D2 D2D2
Bits 0-7 8-15 16-23 24-31 32-39 40-47
Byte 1 2 3 4 5 6

FIGURE 6-2 Instruction formats.

Under Object Code Format is the hex representation of machine language—

the format in which the Assembler converts from symbolic code and which the
system loads into main storage for execution. The first byte, bits 0-7, is the operation
code. For example, the CLC code is X'D5'. (The exception is the 370 S-format—not
covered—that uses the first two bytes for the operation code.) IBM supplies a conven¬
ient and indispensable reference card, Form GX20-1850, containing all instruction
codes, formats, and bit configurations.
The next sections explain the remaining bytes in the instruction format. The SI
and SS formats, the most familiar at this point, are covered first.

SI, STORAGE IMMEDIATE FORMAT. SI instructions include MVI and CLI.

Operand-1 in symbolic code references a storage location and operand-2 represents
a 1-byte immediate constant. In object code, the second byte (two hex digits) stores
the immediate constant, X'00' through X'FF' (this is the reason why immediate oper¬
ands may be coded as only one byte). Byte-3 and byte-4 store the address
as BD DD
132 BASE REGISTERS AND INSTRUCTION FORMAT

OP IM B1D1 D1D1

operation immediate base/displacement

constant address

No length indication is permitted because immediate operations are defined as

one byte. For example, MVI, machine code 92, moves an asterisk to PRINT:
MVI PRINT+48,C' *'. The Assembler generates four bytes of object code and converts
the asterisk X'5C into the second byte as 92 ~5C | BD~~ DD | (assume some base/
displacement reference for PRINT+48).

SS, STORAGE-TO-STORAGE FORMAT. SS format instructions include MVC, ZAP,

and CP. Both operands reference a storage address. There are two types, Character
instructions of the form D1 (L,B1 ),D2(B2) that provide a length only for operand-1,
and Packed operations of the form D1 (LI ,B1 ),D2(L2,B2) that provide lengths for both
operands.

1. Character instructions such as MVC and CLC permit a length up to 256 bytes of
data. These use the length of operand-1 to govern the number of bytes that are
processed. Assume that MVC is used to move a field to the print area:
MVC PRINT + 20(6),=C'RECORD'. Given register-3 as the base register and dis¬
placements of 426 for PRINT+20 and 62A for the literal, the generated object
code is ’

fD2 1 05 | 34 26 1 36 2Al
© ® © @
@ D2 is the machine code for MVC.
® I® length of operand-1 is explicitly coded as 6. However, the Assembler
deducts I from the length when converting to object code. At execute-time
t e computer increments the length by 1. This process permits lengths of 256
rather than 255. If we code a length of 256 in an instruction, the Assembler
deducts 1, giving 255 or X'FF'.
© The^third and fourth bytes contain base/displacement for operand-
1, LBD [ DD]. The Assembler inserts base register-3 and the displacement
426 in these positions.
© The fifth and sixth bytes contain base register-3 and displacement 62A for
operand-2.

At execute-time, the computer increments the length code 05 by 1 to 06 Also it

SnSXXXS" displacement. If regis.er-3 con-

OPERAND-! OPERAND-2
Contents of base register X'4200' X'4200'
Displacement X'0426' X'062A'
Effective address X'4626' X'482A'
133 Instruction Format

The instruction says, in effect, Move (D2) for six bytes (05 + 1) the contents
beginning at location X'482A' to the field beginning at X'4626'.
2. Packed operations permit a length code for both operands, but limited to 16
bytes. Assume we use APto add packed fields as: AP PAGEPK, = P'1Given base
register-3 and displacements of 624 for PAGEPK and 94E for the literal, the
generated object code is

FA 10 36 24 39 4E

© ® © @
(a) FA is the machine code for AP.
(b) The lengths of operand-1 and 2 are stored in the second byte. Assume
PAGEPK DC PL2'0'. The Assembler decrements the defined length 2 by 1,
and stores 1 as the length. The literal = P'1' creates a 1-byte constant; the
Assembler decrements and stores the length as 0. For the maximum length,
16, the Assembler decrements the length to 15 and stores X'F'.
(c) The third and fourth bytes contain base/displacement for operand-1. The As¬
sembler inserts base register-3 and displacement 624 in these positions.
(d) The fifth and sixth bytes contain base register-3 and displacement 94E for
operand-2, the literal.
At execute-time the computer increments the two length codes and combines the
contents of the base register with the displacement. The effective addresses are:

OPERAND-1 OPERAND-2
Contents of base register X'4200' X'4200'
Displacement X'0624' X'094E'
Effective address X'4824' X'4B4E'

RR, REGISTER-TO-REGISTER FORMAT. RR format is used to process data between

registers. The second byte in object code contains the reference to both registers. The
four bits in a half byte provide for decimal values 0 to 15, or X'O' to X'F'. (A reference
to register-15 is converted to F.) Because registers are fixed length 32 bits, no length
indication is required or permitted—the length is implicitly known. For example, to
add the contents of register-8 to register-6, we code AR 6,8. The machine language
code for AR (Add Register) is 1 A. The Assembler converts the instruction to two bytes
as 1A 68 Another instruction, AR 10,11 converts to 1A AB

Exception: Branch on Condition, BCR, is specified as M1,R2. Operand-1

is a mask or a reference to the condition code in the PSW, not to a
register. See the Technical Note at the end of this chapter.

RS, REGISTER-TO-STORAGE FORMAT. Both RS and RX formats provide the facil¬

ity to process data between registers and storage. RS also permits three operands. For
example, we may code the Foad Multiple operation (covered in Chapter 9) as EM
134 BASE REGISTERS AND INSTRUCTION FORMAT

5,7,FIELDS (load registers 5, 6, and 7 with the three 4-byte fields in storage beginning
at the address of FIELDS). The machine language code for LM is 98. The Assembler
translates symbolic to four bytes of object code as |98 J 57 | BD | DD|. The two
bytes referencing FIELDS in storage, [BD DD[, are filled by the Assembler. Given a
base register to use, it inserts the register number (0 through F) in the specified half
byte. The Assembler calculates and stores the displacement in V/2 bytes.
Some RS instructions, such as shift, use only two operands. For these, we omit
R3 as shown in Figure 6-2, and the Assembler inserts a zero in the machine language
position. (Register-0 is not used as the third operand.)

RX, REGISTER-TO-INDEXED-STORAGE. RX format also processes data between

registers and storage, and is quite similar to RS format.

Op R1X2 B2D2 D2D2

operation register^\^ base/displacement

index register

Operand-2 references a storage location with base and displacement. The operation
determines the length of operand-2. For example, there are two operations that add
binary data in storage to a register. A (Add Fullword) adds four bytes of storage to a
register, and AH (Add Halfword) adds two bytes of storage.
As an example, assume the AH (Add Halfword) instruction, coded as AH
5,~H 7'. The literal, =H'7' defines a binary halfword (2-byte) constant. The opera¬
tion adds the halfword value defined in storage to register-5. There is no length
specification, because the operation AH indicates a 2-byte length for operand-2, and
register length is always four bytes. The machine code for AH is X'4A' and assume
that the base register is 3, containing X'4200'. If the literal =H'7' is stored at X'4704'
then its displacement from the base address is X'504\ The Assembler completes the
machine code as:

M 50 3504
T l\
operation \ base/displacement
code / index register
register

ln this «se, the Assembler sets the 'Index register" position to zero. In many
cases, including this one, a reference to register-0 means no register reference If lhe
mstmcfon is one that can specify an index register or an index register is explicitlv
coded, the Assembler inserts the register number into the machine code position An
index register is simply a specific use of one of the general registers just as is a base
register. Indexing is a feature tha, does no, have too many uses but an exempted
given in a later chapter under the LA (Load Address) instruction.
135 Control Sections

Exception: Branch on Condition, BC, is specified as Ml,D2(X2,B2).

Operand-1 is a mask, a reference to the condition code in the PSW. See
the Technical Note at the end of this chapter.

Problems 6-1 through 6-5 should now be attempted.

CONTROL SECTIONS

For practical purposes, only eleven registers (2 through 12) are available as base
registers. It would appear that the largest program we can assemble and execute is 11
x 4K, or 44K. But many programs require considerably more storage. We may write
such large programs and, indeed, any program requiring more than 2 or 3 base
registers in separate sections. These control sections (CSECTS) are assembled sepa¬
rately, each with its own set of base registers. They may then be combined (link-
edited) into one object program. We have written programs comprised of one control
section. By definition a control section is “a block of coding that can be relocated
(independent of other coding) without altering the operating logic of the program".
Neither the Assembler nor the Linkage-Editor recognizes a "program"—they process
one or more control sections.
Under Operating System, OS, where multiprogramming is common, there is
often more than one program being executed in storage. On any given day these
programs are located in storage depending on the sequence in which they are first
required. Therefore, under such a system when we code a program we do not know
where it will be located for execution. Under smaller systems where generally single
programs are run, programs are normally loaded following the Supervisor area,
beginning in an available location that is evenly divisible by eight, a "doubleword"
address.
The first or only control section of a program is identified by either the START or
CSECT instruction. Subsequent control sections, if any, are identified by CSECT.
Because we are still concerned with small programs we may code them in one
section using START. Chapter 15 covers program sectioning and CSECT.

NAME OPERATION OPERAND

[symbol] START a decimal or hex value, or blank

The START instruction specifies the beginning of the first or only control section
(CSECT may also be used for this purpose). The Assembler treats the name, if any, as
the name of the control section. If we know where the program will be loaded, we
may code an initial value (evenly divisible by eight) for the Assembler location
counter. If the value is omitted the location counter is set to zero. The following three
examples illustrate various uses of START:
136 BASE REGISTERS AND INSTRUCTION FORMAT

1. PROGA START X’4800' The name of the control section is PROGA. The
location counter is set to X'4800' or 18,432,
where we expect the program to be loaded.
2. START 18432 The control section is unnamed. The location
counter is set to 18,432 or X'4800'.
3. PROGB START The name is PROGB. Because the operand is
blank the location counter is set to zero. This
coding practice is common under OS, where it
is generally not known in advance where the
program will reside during execution.

Up to this point, the IN IT macro has performed the START statement functions, as
well as the BALR/USING, covered in the next section.
The Assembler location counter assigns storage addresses to program state¬
ments. These are relative addresses that are printed under the LOC column. The
content of the location counter has no effect on program execution. Displacements
are all relative to the contents of a base register. We may, for example, omit the
operand in the START statement so that the location counter is set to zero. But at
execute-time the program may be loaded at X'4200'. The first statement shown on
the listing at X'OOOO' is actually at X'4200'. When debugging the program we have to
reconcile the listing with the storage dump—a statement listed under LOC at X'0048'
is in storage at X'4200' + X'0048', or X'4248'.

ASSIGNING BASE REGISTERS

It is our responsibility to notify the Assembler which registers are available as a base
register. For this purpose we code the USING instruction. Subject to the restrictions
discussed earlier, we may assign any registers (generally 2 through 12)_but the
program should not use them for any other purpose. The USING instruction simply
tells the Assembler which register(s) to use for base addressing. No executable code
is generated.

NAME OPERATION OPERAND

blank USING S1.R1,.. .,Rn

SI in the operand field designates the address from which the Assembler calcu¬
lates displacements. R2,... , Rn specifes the base registers (1 through 15) and their
sequence. When coding the program we can only guess how much storage is re¬
quired. Assume about 25 coding sheets for each 4K of storage, excluding any large
declaratives. Consider the following three examples:

1. USING \3 The asterisk in the operand references the current value in the
Assembler location counter. The statement tells the Assembler
137 Loading the Base Register

that from this point on (for the next 4096 bytes) to use register-3 as the base
register. In effect, the Assembler inserts a '3' as the base register into any address
that references this region. The Assembler also calculates the displacement from
this beginning address and inserts the displacement into the object code instruction.

2. USING A10.5
A 10 MVC P+30(10),NAME At assembly-time the current value of the
location counter is the address of A10.
Here, register-5 becomes the assigned base register. The exact same effect is
achieved by USING *,5.

3. USING *,3,9,4 Each 4096 bytes of storage referenced by the program requires
one base register. In this case we expect to require between
8K and 12K of storage. We designate three base registers, and the Assembler
uses them as required in the sequence coded. Suppose that the current value
in the location counter is X'3802'. Then base register-3 is to apply to all locations
from X'3802' through the next 4095 bytes. Since 4096 equals X'l 000', when the
location counter reaches X'4802', the Assembler assigns base register-9 for the
next 4K region. At X'5802' and for the next region, register-4 becomes the base
register.

LOADING THE BASE REGISTER

USING merely notifies the Assembler which base registers to use. It is our responsi¬
bility to code the program to load the register with a base address. For this purpose
we use the BALR instruction, Branch and Link Register.

NAME OPERATION OPERAND

(symbol] BALR R1.R2

BALR is an RR (register-to-register) format instruction. The rules are:

1. Both operands specify any general purpose register.

2. The instruction loads bits 32-63 of the Program Status Word into the operand-1
register. The rightmost 24 bits contain the address of the next sequential instruc¬
tion in the program. (The other 8 bits include the condition code and are not used
for addressing.)
3. If operand-2 specifies registers 1 through 1 5, the program branches to the address
in that register (assuming one is already there):

X‘4000’ BALR 6,9 Load the address of the next instruction, X'4002', into
X‘4002’ MVC . .. register-6, and branch to the address in register-9.
 138 BASE REGISTERS AND INSTRUCTION FORMAT

4. For certain instructions like BALR and BCTR, register-0 has special properties.
When operand-2 specifies register-O, the computer assumes that there is no reg¬
ister reference. For BALR, if operand-2 is register-O, no branch is taken. The
program continues with the next sequential instruction:

X‘5800' BALR 3,0 Load the address of the next instruction, X'5802', into
X‘5802’ MVC ... register-3, and execute the next instruction, the MVC in
X'5802'. This is the most common use of BALR. (0 in
operand-2 means no register.)

Figure 6-3 shows how BALR and USING are combined at the beginning of a
program to initialize and assign a base register. This is a skeleton program for
illustrative purposes—we would not normally move such a constant into the first
position of PRINT, which is reserved for the printer forms control character. Carefully
distinguish in the example between assembly and execute operations.

IOC OBJECT CODE ADDR1 ADDR2 STMT SOURCE STATEMENT

003800 4
START X'3800' INIT LOC'N COUNTER
003800 0530 5
GIN BALR 3,0 LOAD BASE REGISTER
003802 6
USING *,3 ASSIGN BASE REG
003802 020E 3006 307F 03808 03881 8
MVC PRINT(15),HEADING

003808 10 PRINT DS CL 12 1
003881 C9D5E5D6C9C3C540 11 HEADING DC CL 151 INVOICE LISTING'

003800

FIGURE 6-3 Base register initialization.

AT ASSEMBLY-TIME. The START statement initializes the Assembler location

counter to X'3800' where we expect the program to load at execute-time. Therefore
under LOC the program listing shows the initial value 003800, and the location
counter is incremented to show where each assembled statement is located This is
the only effect of START—it has nothing to do with initializing base registers or telling
the system where to load the program. Under OS, START or CSECT usually contain a
blank or zero operand.
RALR is ^e,first executable instruction. BALR is RR format with machine code
05. The Assembler generates the two bytes of object code 0530, and increments

Ivafin©?" f° 38°u' US'NG °e><t tel'S the Assemb|er from this point
(X 3802 ) to use register-3 as the base register. USING generates no object code The
next instruction, MVC, is assigned to X'3802'. The generated MVC instruction is

D2 | 0B 1 30 06 30 7F
© ® © (d)
139 OS INITIALIZATION

(a) D2 is the machine language code for MVC.

(b) The length of operand-! is explicitly coded as 1 5. The Assembler deducts 1 from
this length and inserts 14 (X'OE') in the second byte of the object code. The
machine length code is therefore always one less than the actual length. At
execute-time, the computer in effect "adds" one to this length. For any operand
that references main storage, the object code length is one less than its length in
the source program.
© Operand-1, X'3006', references PRINT. The Assembler inserts 3 for base
register-3 in the first half byte. Note that PRINT is defined at location X'3808'. its
displacement from USING at X'3802' is 6 bytes. Therefore, the Assembler inserts
the displacement 006 into the three half bytes.
(tT) Operand-2, X'307F', references HEADING. The Assembler inserts 3 for base
register into the object code. The displacement of HEADING is 127 bytes from
USING, or X'07F\

AT EXECUTE-TIME. After assembly and link-edit, the program is ready to execute.

It is loaded beginning at X'3800'. The first instruction, BALR, loads into register-3 the
instruction address of the PSW containing the address of the next instruction,
X'003802'. When MVC is executed, the computer calculates the effective addresses
as:
OPERAND-! OPERAND-2

Contents of base register-3 X'3802' X'3802'

Displacement X'0006' X'007F'
Effective address X'3808' X'3881'

These effective addresses agree with those shown under ADDR1 and ADDR2, and
for the location of PRINT and HEADING. The computer adds 1 to the length (14 + 1
= 15), and moves 15 bytes beginning at X'3881' to X'3808'.

Note: We must reserve a base register and ensure that it is loaded with
the correct value. The Assembler cannot check that the base register is
correctly initialized. It is possible to get an error-free assembly, but one
that at execute-time references the wrong locations! One way to cause
such an execute error is to code the USING before the BALR. The Assem¬
bler sets the location counter to X'3800' instead of X'3802', and calcu¬
lates displacements from X'3800'. But at execute-time BALR loads the
base register with X'3802', causing all displacements to be incorrect by
two bytes.

OS INITIALIZATION

Both DOS and OS require the BALR/USING initialization instructions, used identi¬
cally. But OS is a more complex system, and its Supervisor treats all users' programs
 140 BASE REGISTERS AND INSTRUCTION FORMAT

like subprograms". There is added code to supply a linkage between the Supervisor
and our program, as Figure 6-4 illustrates.

1 START
2 SAVE < 14,121 STORE SUPERVISOR'S REGISTERS
3 8 ALR ...
4 USING ...
o cn

ST 13,SAVEAREA+4 STORE REGISTER 13

LA 13.SAVEAREA LOAD ADDRESS OF SAVEAREA
7 OPEN ...

e CLOSE ...
9
L 13.SAVEAREA+4 RE-LOAD REGISTER 13
1 0
RETURN (14,12) RE-LOAO REGS. RETURN TO SPVR

11 SAVEAREA DS 18F
SAVE AREA. 18 FULLMORDS

FIGURE 6-4 OS initialization and return linkage.

Statement 1 is the usual START, under OS omitting the operand or coding it as

0. At execute-time the system tells us where the program has loaded by means of a
"Location Factor". If the Load or Entry Point is X'50000' (the starting address) and the
program listing indicates that a field called AMOUNT is at location (LOC) X'68A',
then its actual location during the particular execution is X'50000' plus X'68A' or
X'5068A'. m us a doa , or

Statement 2 is a special macro that immediately saves the contents of the

registers for the Supervisor. The program will change the register contents for its own
purposes, but will restore the original values before returning to the Supervisor
cMf116''5 3 and 4 are conventional BALR and USING instructions, coded after

called sTvTTrfa f, CO? T reS'steM3 in a special register save area,

the SAVEAREA R f f? • S,a,emen' 6 loads in,° 'egister-lS the address of
the SAVEAREA. Register-13 is important to such linkage between two programs and
should not be used for any other purpose. There is continual traffic between the user
program and the Supervisor, for all I/O operations and program checks
Statements 9 and 10 are coded following the CLOSE at the end of all process¬
ing, and are equivalent to the DOS EOj macro. They reload the registers that were
saved at the start, and return control to the Supervisor
Statement 1 1 defines SAVEAREA as 1 8 "fullwords" (each four bytes long) for
storing the contents of the 16 registers and two other values.
Later chapters cover in detail these register operations, and the linkage is ex
plained in the chapter "Subprograms and Overlays". When using this linkage be
ure to code it exactly as illustrated, using the same instructions and registers In the

sr:, roes no*check for—*nd && it

Problems 6-6 through 6-10 should now be attempted.

141 Technical Note Re BCR and BC

TECHNICAL NOTE RE BCR AND BC

BCR, although RR format, is designated as M1,R2, and BC, although RX format, is

Ml ,D2(X2,B2). Ml is a mask, a reference to the condition code in the PSW, not to a
register. The common "extended mnemonic" for BCR is BR (Branch Register), an
unconditional branch to an address in a register. The instruction BR addr may also be
written as BC 15,addr. The extended mnemonics such as BE, BH, and BNL are
unique cases of the BC operation. We may test the condition code with BC or the
extended mnemonics. (The following discusses BC but applies also to BCR.) The two
bits in the condition code are:

CONDITION CODE BITS VALUE INDICATION

00 0 Equal/Zero
01 1 Low/Minus
10 2 H igh/Plus
1 1 3 Overflow

Figure 6-5 provides the four-bit mask for the nine common branch conditions.
We can test for Equal/Zero with either BE addr or BC 8,addr. The Assembler trans¬
lates the 8 to binary 1000 in the object code mask position. Note that bits are
numbered from left to right, beginning with zero for the leftmost bit, as 0, 1, 2, 3. On
execution, the computer checks the mask—binary 1000 asks if bit 0 is on, meaning:
does the condition code value equal zero?
The 4-bit Mask

Eq / Low / High / Over-

zero min plus flow Branch on
Condition 0 i 2 3 condition Extended mnemonic
0 = Equal/zero 1 0 0 0 BC 8,addr BE addr BZ addr
1 = Low/minus 0 1 0 0 BC 4,addr BL addr BM addr
2 = High/plus 0 0 1 0 BC 2,addr BH addr BP addr
3 = Overflow 0 0 0 1 BC 1 ,addr BO addr
No branch 0 0 0 0 BC 0,addr NOP addr
1,2,3 = Not equal 0 1 1 1 BC 7,addr BNE addr BNZ addr
0,2,3 = Not low 1 0 1 1 BC 11,addr BNL addr BNM addr
0,1,3 = Not high 1 1 0 1 BC 13,addr BNH addr BNP addr
0,1,2,3 = Any 1 1 1 1 BC 15,addr B addr

FIGURE 6-5 Branch on condition mask.

For Not Equal, we could code either BNE addr or BC 7,addr. The Assembler
translates the 7 to binary 0111 in the mask. On execution, the computer checks the
mask:

If bit number 1 is on, does the condition code value equal 1 ?

If bit number 2 is on, does the condition code value equal 2?
If bit number 3 is on, does the condition code value equal 3?
142 BASE REGISTERS AND INSTRUCTION FORMAT

If any one of these conditions exists, then the condition is not equal. The Assembler
provides the extended mnemonics to save us coding and memorizing the mask. But
whichever way we code, for example BNE addr or BC 7,addr, the Assembler gener¬
ates the identical object code.
In the interests of clarity and reducing program bugs, this text recommends
using the extended mnemonics. An understanding of the mask and the condition is
useful, however, to aid in deciphering machine language code.

DEBUGGING TIPS

-Except for the special OS initialization, the only new instructions introduced in this
chapter are BALR and USING. Typical errors are:

Omission of either BALR or USING. Omitting BALR causes an unpredictable

error at execute-time, and omitting USING prevents the Assembler from generat¬
ing machine code for instructions that require an implicit base register (ad¬
dressability errors).
Failure to assign and load enough base registers for a large program (Assembler
addressability errors). A fairly common error is to load the second and third base
registers with incorrect values.
— Using the base register for some other purpose in the program, thereby destroying
the base address reference.
— Reversing BALR/USING, as USING/BALR. BALR will load the base register with a
value of two bytes more than the Assembler expects when calculating displace¬
ments. The following code is sometimes used to initialize and adjust the base
register to the correct value:

USING *,3
BALR 3,0
BCTR 3,0 Decrement register-3 by 1
BCTR 3,0 Decrement register-3 by 1

PROBLEMS

6-1. What are the two main purposes of the general registers?
6-2. What are the two main advantages of base/displacement addressing?
6-3. Why is explicit length indication permitted only for SS format?
6-4. Give the machine language code generated for the following Assume base
register-2 contains X'4800'. 6 Se
(a) BALR 9,10
(b) LM 3,15,SAVE Assume SAVE is at location 4920.
(c) CLI CODE.C X Assume CODE is at location 4A26.
143 Problems

(d) CLC NEW,OLD NEW is 3 bytes at 521A and OLD is 3 bytes

at 5308.
(e) ZAP LINECT, = P’0' LINECT is 2 bytes at 522B and =P'0' is at
5444.
6-5. Explain how the instruction format limits: (a) the number of registers to 16; (b)
character lengths to 256; (c) packed lengths to 16; (d) maximum displacement
to 4095 bytes.
6-6.-Does the operand in START X'5000' affect where the program loads for execu¬
tion? Explain.
6-7. Code a USING instruction for a program requiring 19,000 bytes.
6-8. Distinguish between BALR and USING. What is the purpose of each? Explain
what happens at assembly and at execute-time by:

X’5800’ BALR 3,0 Load base register-3

USING *,4 Assign base register-4

6-9. Revise any previous program for base register initialization. Replace the INIT
macro (or whatever macro you used for initialization). If under OS, code the
linkage carefully.
6-10. The first base register is loaded using BALR, and additional ones with L, LA, or
LM. Assign and load registers 6, 7, and 8 as base registers, and define any
required declaratives. (Hint: Look ahead in the book.)
(a) Use one LM instruction to load registers 7 and 8.
(b) Use LA instructions to load registers 7 and 8.
6-11. Give the extended mnemonics for the following: (a) BC 8,C90; (b) BC 2,D90;
(c) BC 11,E90; (d) BC 15,F90.
6-12. Code the following in machine language (assuming base register-3 contains
X'5200' and B30 is at X'5C38'): (a) B B30; (b) BNL B30; (c) BAL 5,B30;
(d) BR 5.
6-13. What would BC 9,addr mean?
 CHAPTER 7

INPUT AND OUTPUT

Input/output on the 360 and 370 is significantly complex and for this reason its
discussion has been delayed until now. This chapter covers only a fraction of the
technical material available. (See especially the IBM Supervisor manuals.)
Earlier computers transmitted data directly between storage and I/O devices.
Such computers used to read records directly into storage in a specified area and
wrote out of an area. Indeed many small computers still function this way. During the
I/O operation, all other processing was suspended until transmission was completed.
Such a system considerably delays processing, especially when many devices are
attached. I/O processing has been improved by:

At the software (programming) level, buffers are used (covered in a later section).
The I/O devices now generally are faster.
CPU processing and data transmission are designed to overlap. For example
while a print operation transmits data to the printer, the CPU continues executing
instructions This advantage is achieved by the use of a hardware feature chan
riels, covered in the chapter on Operating Systems.
Many more I/O devices are available, requiring more powerful I/O capability.

144
145 Input/Output Control System

INPUT/OUTPUT CONTROL SYSTEM

A 360/370 program always executes in one of two states—the Problem and the
Supervisor state. At any given time, the computer is either in the problem state
executing a user's ("problem") program, or in the Supervisor state, executing the
Supervisor program. The Supervisor program handles the transition between jobs and
all interrupts, which include program and machine checks and all input/output
operations. The problem program cannot actually issue I/O operations—these are
privileged instructions that only the Supervisor can execute. The PSW indication is in
bit 15 : 0 means supervisor and 1 means the problem program is being executed.
Privileged instructions execute only when the program is in the supervisor state (PSW
bit 15 = 0). For all I/O, the problem program interrupts and transfers control to the
Supervisor.
For its I/O operations, the Supervisor uses the privileged instructions: Start I/O,
Test I/O, FHalt I/O, and Test Channel. We can (but usually do not) code I/O operations
for the channel program by linking to the Supervisor with SVC (Supervisor Call) and
CCW (Channel Command Word). This detailed level requires that we synchronize
I/O operations with the program and provide for channel scheduling and interrupts.
Few programmers code at this level. Instead, there is available a generalized Input/
Output Control System, IOCS (called Data Management Services under OS). We can
simplify I/O programming considerably by coding IOCS macro instructions. There
are two main forms of IOCS: physical IOCS (PIOCS) and logical IOCS (LIOCS).

PHYSICAL IOCS. This level is still close to the actual machine operation, and
coding is similar to that already discussed. We code the channel program using the
macros EXCP (Execute Channel Program), WAIT, and CCB (Command Control
Block). This level initiates execution of channel commands, and handles I/O inter¬
rupts and channel scheduling, but we must still synchronize I/O operations with our
program. Chapter 16 provides more information on Physical IOCS.

LOGICAL IOCS. This level uses the capabilities of physical IOCS, but provides
many more features. On input, LIOCS locates the required record and delivers it to
the program as a logical record. On output, LIOCS delivers the logical record to the
channel program. LIOCS handles end-of-file conditions and many more functions
not yet discussed, including:

— Switching ("flip-flopping") between I/O areas ("buffers") if more than one buffer
is designated.
— "Blocking" and "unblocking" tape and disk records.
— Checking and writing tape and disk "labels."

To obtain a record using logical IOCS we simply code the GET macro, and to
write a record we code the PUT macro (sometimes READ and WRITE in special
 146 INPUT AND OUTPUT

cases). IOCS saves us from coding the complex but repetitious input/output routines.
The rest of this chapter covers programming using logical IOCS. We have already
used Logical IOCS for OPEN, CLOSE, and GET. This chapter explains these and other
macros in detail.

BUFFERS. Under a conventional unbuffered input/output system, we read a record,

then process it, then read another record:

Read-1 Process-1 Read-2 Process-2 etc....

time—-

Better efficiency can be achieved by overlapping reading with processing. We

read a record, then while processing this record, read the next record:

Read-1 Process-1 Process-2 Process-3

Read-2 Read-3 Re ad-4 etc....
time—*-

As can be seen, reading and processing are overlapped. The input records are read
into areas in our program called buffers or I/O areas. We can extend this facility by
increasing the number of buffers (up to 2 for DOS and 256 for OS). Similarly, writing
can be overlapped with processing. Under DOS the programmer must designate the
buffer areas, but OS automatically supplies them.
There are two types of IOCS macros: file definition macros and imperative
macros.

FILE DEFINITION MACROS. These describe the file that is to be processed. We

define, for example, the symbolic name of the file, the length of the records, the
buffers, and the actual device to be used. The Assembler is then able to construct a
table of applicable channel commands. Under DOS, the DTFnn macro (Define The
File) defines a file. For example, DTFCD means define a card file, and DTFPR means
define a printer file. OS uses a Data Control Block, DCB, to define a "data set" Both
are more fully described later in this chapter and in chapters on magnetic tape and

IMPERATIVE MACROS

These initiate the input/output operation and include OPEN CLOSE GET and PUT
These macros relate to the generalized DTF's channel commands'and link to the
Supervisor to issue the data transmission.
147 Imperative Macros

THE OPEN MACRO. OPEN makes a file available to the program. Control is passed
to the Supervisor which checks that the file exists and that the device is ready. (IOCS
does considerably more when opening disk and tape.) One OPEN may open from
one to 16 files. For example, assume the following statements:

CARD DTFCD or DCB . .. Define the card file

PRINTER DTFPR or DCB . . . Define the print file
OPEN CARD,PRINTER Activate the files

THE CLOSE MACRO. CLOSE deactivates all files previously opened and no longer
required. We may close a file any time, and should close all files before terminating
the program. A file closed in a program may be reopened and further processed.
(IOCS does considerably more when closing disk and tape.)

Note: In a multiprogramming system, a file that has been fully pro¬

cessed should be closed promptly. The device is then available to other
programs.

Many systems now provide for automatic self-relocating programs. If the sys¬
tem does not have this capability, then to facilitate program self-relocatabiIity under
DOS, the macros should be coded OPENR and CLOSER. The IBM Supervisor manual
provides the details.

THE GET MACRO. GET makes available the next record from a sequential input
file. The input record erases the previous contents of the input area.

OPERATION OPERAND

GET filename,workarea
or GET (1),(0)

The file name is that of the DTF for the file. IOCS delivers the record to the
workarea specified in operand-2. For instance:

CARD DTFCD or DCB ... Define the card file

CARDIN DS CL80 Card workarea
GET CARD,CARDIN Read a record into CARDIN

In this example, the filename is CARD and the workarea is CARDIN. The
80-character card record is transmitted to CARDIN. We may also load the DTF or
DCB address and the workarea address into registers 1 and 0, as follows:

LA 1,CARD Load the address of CARD

LA 0,CARDIN Load the address of CARDIN
GET (1),(0) Read a record into CARDIN
148 INPUT AND OUTPUT

Figure 7-1 a depicts the relationship of the GET statement with two buffers. The
first GET issued in the program reads record-1 into the first buffer, I/O areal. Record-1
is transferred to CARDIN, available for processing. Then while the program processes
the record in CARDIN, IOCS reads record-2 into the second buffer, I/O area2:

I/O areal I/O area2

1st GET: Record- Record-2 buffers
GET CARD,CARDIN CARDIN
L fReco rd -11 workarea

FIGURE 7-1 a

In Figure 7-1 b the second GET issued in the program transfers record-2 to
CARDIN, and while the program processes CARDIN, IOCS reads record-3 into the
first buffer:

I/O areal I/O area2

2nd GET:
buffers
GET CARD,CARDIN

workarea

FIGURE 7-1 b

We must inform IOCS where to branch when it encounters the end-of-file (the
/ trailer card). We designate the address where the system is to branch in the DCB or
DTF statement. IOCS reads the /* record directly into a buffer. When a GET attempts
to transfer the /* record to our workarea, the system instead will automatically direct
the program to our end-of-file address.

THE PUT MACRO. PUT writes or punches our record from our output (work) area.
The rules for coding PUT are similar to those for GET.

OPERATION OPERAND

PUT filename,workarea
or PUT (1),(0)

For example:

PRINTER DTFPR or DCB.

Define the print file
PRINT DS CL121 The print workarea
PUT PRINTER,PRINT Write a record
149 Imperative Macros

The PUT macro causes the contents of the workarea PRINT to write onto the device
called PRINTER. Note: The contents of the workarea and the buffers are not erased. If
we move data into the print area, we should clear the area after writing.
Before printing, we must insert a special forms control character into the first
byte of the print workarea. (An alternative method is to use the CNTRL macro—see
the IBM Supervisor Macro manuals.) The character informs the channel what action
to take, such as print, space, eject. Punching cards may also require a special control
character before the punch area. The common forms control characters in hex are:

NO WRITE WRITE

Space 1 line OB 09
Space 2 lines 13 11 Note also: X'01' is Write, space
Space 3 lines IB 19 0 lines.
Skip to new page 8B 89

For example, write and space two lines:

PRINT DS CL121 The print workarea

MVI PRINT,X’l 1 ’ Insert control character
PUT PRINTER,PRINT Print & space 2 lines

If we use X'l 3' as the control character, the printer spaces two lines, without print¬
ing, regardless of the contents of PRINT. "Skip to a new page" is actually "skip to
channel 1". The printer is equipped with a carriage control tape punched with a hole
in "channel 1". The hole usually aligns with the printer forms at the top of the page
as shown in Figure 7-2. Punches and control channels are available for channels 1
through 12 to permit skipping to various lines on the page. Most tapes are punched
with channel 1, but not necessarily with the other channels.

Carriage control tape Printer form

Channel 12 ... 2 1
r
Channel 1 hole_
Channel 2 hole-

Channel 1 2 hole_
V

FIGURE 7-2 Carriage control tape.

ASA CONTROF CHARACTER. An alternative forms control character that is more

universal for different computers is the American Standards Association set, which is
less efficient on the 360/370. Following are the more common characters:
150 INPUT AND OUTPUT

blank Space 1 line, then print

0 Space 2 lines, then print
- Space 3 lines, then print
+ Print without spacing
1 Skip to the next page, then print

The next two example programs both illustrate the same program, using DOS
and OS imperative and file definition macros. The programs simply read and write
card records. They load register-3 as the base register and open the files; this ini¬
tialization need be performed only once, at the start of the program execution.
At A10HEAD the program skips to a new page to print the heading. Note that
CTLCHAR is defined as the first byte of the print area. At A20READ a card is read into
CARDIN. This field is moved to the print area and printed. The line counter is
incremented and checked for page overflow as in previous programs.
When all the input records have been read, IOCS recognizes the end-of-file (/*
trailer record under DOS), and directs the program to the end-file address, Z10END,
where the files are closed and execution terminates. Both file definition macros, DTF
and DCB, are keyword macros. That is, the entries are recognized by specific
names, and may be coded in any sequence. The keyword is followed by an equal
sign (=) and a 'parameter', such as EOFADDR=Zl OEND. One entry is coded per
line, followed immediately by a comma to separate the entries. We punch a continu¬
ation character in column 72 to indicate that the macro continues on the next line, in
column 16. (It is possible to code several entries per line, but this practice makes the
listing difficult to read and to change.) The last entry has no comma or continuation
character. Some entries may be omitted; in these cases the Assembler assumes an
entry—such assumptions are called "default valuesPrecise entries and defaults
vary by version of operating system, so that it is necessary to refer to the appropriate
IBM Supervisor manual.

THE DOS DTF FILE DEFINITION MACRO

Figure 7-3 provides the requirements for a program written under DOS The soecifi
cations for DTFCD and DTFPR follow: M

?IpnDrDEF1NE ™E CARD FILE- The n‘1me in FiSure 7-3 given to the card file is
LARD (any unique name may be given). The entries are:

BLKSIZE=80 tells IOCS that the size of each block of data to be read is 80 bytes or
80 card columns. If this entry is omitted, the Assembler assumes a default of 80
(depending on the device).

DEVnDndR=SYSrhT §IVeS ^ entry SYSIPT' the PrimarV system input device De¬
pending on the system we may designate SYSRDR (the system reader device) or
programmer logical unit”, SYSnnn appropriate to the computer installation
 151 The DOS DTF File Definition Macro

5 444
initial » 2 A T I Q N
6 PROG 7 A START x^ACze*
7 BALR 3•0
e INITIALIZE BASE REGISTER
USING • .3
9 OPEN CARD,PR INTER ACTIVATE FILES

19 ♦ 44
page 0 V E R F L O W
20 A 1 OH E AC NVI CTLCHAR , X•ae*
MOVE FORMS CONTROL CHARACTER
2 I PUT PRINTER,PRINT
SKIP TO NEW PAGE
27 ZAP LINECT.=P>0* CLEAR LINE COUNT

29 ♦ 44 M A I N P R i0 C E S S I N G
30 e1 ORE AC GET CARO,CARD IN
36 M VC RECPR.CARDIN
MOVE RECORD TO PRINT AREA
37 MVI CTLCHAR.X•09• MOVE CONTROL CHARACTER
38 PUT PRINTER,PRINT PRINT, SPACE 1 LINE
44 AP LIN E C T, = P■ 1• ADD TO LINE COUNT
45 CP LINECT, — P • 5 0 ' END OF PAGE ?
46 EH A10HEAC YES - SKIP PAGE
47 B B10 RE AO
NO - READ NEXT RECORD

49 444 E N C - 0 F - FILE
50 Z1OEND CLOSE CARD.PR INTER OE-ACTIVATE FILES
59 EO J
NORMAL END-OF-JOB

63 44 4 D E C L A R A

65 LINECT DC PL 2 • 0 • LINE COUNTER

67 CARO IN DS CL80 INPUT WORKAREA

69 PRINT DS 0CL121 PRINT AREA :

70 CTLCFAfi DS OCL 1 * CONTROL CHAR FOSITION
71 DC CL 20 • • *
72 RECPR OS CL 8 0 * RECORD PRINT AREA
73 OC CL 21* • *

75 CARD DTFCD BLKSIZE=80. DEFINE the card file

DEVAODR=SYSIPT.
0EVICE = 2S01 ,
EOFAODR—ZIOE NO. ENO-OF-FILE ADDRESS
IOAREAI—IOARCC 1 ,
I0AREA2=I0ARCC2,
RECFQRN=FIXUNB•
ty pefle=input•
WORKA=YES

1 17 IOARCD1 OC CLeO* • CARO BUFFER 1

1 18 I0ARCD2 OC CL 80* • CARO BUFFER 2

120 PRINTER OTFPR BLKSIZE=121. DEFINE THE PRINTER FILE ♦

CTLCHR = YES » ♦
DEV A OOR=S Y SLST, 4
DEVICE=1403. ♦
IOAREA1=I0ARPR|. 4
10ARE A2=10ARPR2, 4
RECF0RM=FIXUN8. ♦
WORKA=YES

142 10ARPR1 OC CL 12 1* • PRINT BUFFER 1

143 IOARPR2 OC CL 12 1 ■ • PRINT BUFFER 2

1 45 END PRCG7A

FIGURE 7-3 DOS input/output macros.

152 INPUT AND OUTPUT

DEVICE = 2501 designates the card reader device to be used by the file. If the oper¬
and is omitted, the Assembler assumes a 2540 reader.
EOFADDR=Z1 OEND indicates the address of our end-of-file routine, and may be
any unique program name. IOCS recognizes the /* trailer card and links to our
end-of-file address. Never branch to this address from any other point.
IOAREA1 =IOARCD1 is a required entry that specifies the name of the first buffer (or
I/O area). We have defined this buffer elsewhere in the program as IOARCD1
DS CL80. Any unique name could be used. IOCS reads input records into this
area.
IOAREA2 = IOARCD2 gives the name of the second buffer (or I/O area). It is defined
elsewhere in the program as IOARCD2 DS CL80. A second buffer is optional,
but provides more efficient processing.
RECFORM = FIXUNB means that the format of records to be read is "fixed length,
unblocked." All card records are in this format normally, but tape and disk
records may be variable in length, and "blocked"—several records per block. If
this entry is omitted, the Assember assumes FIXUNB.
TYPEFLE = INPUT means that the type of file is input. The operand for punched
output is OUTPUT, and for a combined punch-feed-read device is CMBND. If
the entry is omitted, the Assembler assumes INPUT.
WORKA=YES tells IOCS that we want to process records in a "workarea" rather than
directly in a buffer. IOCS is to transfer records from the buffers to our workarea
as specified in the macro GET CARD,CARDIN. CARDIN is defined elsewhere as
DS CL80. This entry may be omitted, but if so, we must specify another entry as
IOREG = (r), and process the input records directly in the buffers. This practice
may be done with DTFCD, but is illustrated later under DTFDI.

Other entries may also be coded; however, IOCS varies by operating system,
and many programs have unique needs. The Supervisor manual for each system
gives more specific details.

DTFPR DEFINE THE PRINTER FILE. The name in Figure 7-3 given to the printer is
PRINTER. Note that there is no entry for TYPEFLE because DTFPR is understood to be
an output file. The entry EOFADDR is omitted because it is only for input files.
DTFPR also permits entries other than the ones shown in the example.

BLKSIZE 121 tells IOCS that the size of the block of output data is 121 bytes The
first (leftmost) byte is reserved for the forms control character, so that only 120
device re Pnnted' ^ maX'mum block len§th dePends on the particular printer

CTLCHR^YES means that the program is using the 360/370 forms control character
sociationTet^ ^ C°dm8 CTLCHR=ASA stipulates the American Standards As-

DEVhvDtDhK=f?|YSnST d^neS SYScST' the Pnmary SyStem Printin8 device to be used

by th ® die. Depending on the system, we may also designate a programmer
ogical unit, as SYSnnn appropriate to the computer installation.
153 The OS DCB File Definition Macro

DEVICE = 1403 designates the printer device for the file, such as 1443, 3203, etc.
IOAREA1 =IOARPR1 specifies the name of the first buffer (I/O area). We have de¬
fined this buffer elsewhere in the program as IOARPR1 DS CL1 21. Any unique
name could be used. The entry is required.
IOAREA2 = IOARPR2 gives the name of the second (optional) buffer. It is defined
elsewhere as IOARPR2 DS CL121. The use of more than one buffer provides
more efficient processing.
RECFORM = FIXUNB means that the output format is "fixed length, unblocked."
WORKA=YES tells IOCS that we want to process records in a "workarea" rather
than in buffers. IOCS is to transfer records from our workarea to the buffers, in
the example by means of the macro PUT PRINTER,PRINT. PRINT is defined
elsewhere as DS CL121, and is our workarea for defining output records.

IOCS MODULES. For each file, the Linkage Editor includes an IOCS logic module
immediately following the program. A macro such as PUT PRINTER,PRINT links to
the DTFPR, which in turn links to the printer logic module following the program.

Program

Card module IOCS

logic
Printer module modules

The size and location of these modules are available on the Linkage Editor Map (use
the control statement ACTION MAP). An example of the Linkage Editor Map and
names of the IOCS logic modules are given in Chapter 15.
The IOCS modules are preassembled and catalogued, and the Linkage Editor
includes the appropriate modules with all programs that require input/output.

THE OS DCB FILE DEFINITION MACRO

DCB, Data Control Block, is equivalent to the DOS DTF macro, and is used to define
a "data set." Because OS has considerable device independence capability, a rec¬
ommended approach is to define all data sets as disk in order to facilitate this feature.
Many of the entries required for DTF's are omitted for DCB's. Under OS, we may
specify additional I/O attributes at execute-time by means of the DD, Data Defini¬
tion, job control cards. This feature permits some programming changes concerned
with I/O without reassembling the program.
The Assembler completes as much of the "data control block" as possible from
the DCB entries. Prior to execution, the system checks for missing entries, and
 *** INITIALIZATION
PR0G7B START 0

SAVE (14,12) SAVE REGISTERS FOR SUPERVISOR

0ALR 3,0 INITIALIZE BASE REGISTER

USING *.3

ST 13.SAVEAREA+4 SAVE AOORESSES FOR RETURN

LA 13,SA VE AREA * TO SUPERVISOR

OPEN (FILEIN,(INPUT),FILEOT .< OUTPUT) )

* ** PAGE OVER FLO

A10FE AD MV I CTLCHAR,X•8B• MOVE FORMS CONTROL CHARACTER

PUT FILEOT.PRINT SKIP TO NEW PAGE
ZAP LI NEC T , =P•0• CLEAR LINE COUNT

*** MAIN P R 0 c ESS I N G

BIOREAD GET FILEIN,INAREA

M VC RECPR.INAREA MOVE RECORD TO PRINT AREA
MVI CTLCHAR,X»09• MOVE CONTROL CHARACTER
PUT FILEOT,PRINT PRINT, SPACE 1 LINE

AP LINECT,=P*1* ADD TO LINE COUNT

CP LINECT, = P *50• ENO OF PAGE 7
BH A 10 HEAD YES - SKIP PAGE
B BIOREAD
NO - READ NEXT RECORD

*** END-OF-FI L E

Z10 END CLOSE (FILEIN,,FILEOT)

L 13,SAVEAREA+4 ENC-CF-JOB, RETURN

RETURN (14,12)
* TO SUPERVISOR

***
declarati V E S

L INECT DC PL2•0• LINE COUNTER

INAREA DS CL80 INPUT KORKAREA

PRINT OS OCL133 PRINT AREA :

CTLCHAR DS OCL 1
* CONTROL CHAR POSITION
OC CL20• • *
RECPR DS CL80
* RECORD PRINT AREA
DC CL33■ • *

FILEIN DCB BLKSIZE=aO,

DEFINE the input FILE
DONAME=SYSIN.
4-
DE VD = DA.
4-
DSORG=PS.
4-
E0DAD=Z10END,
4-
MACRF=(GM)

FILEOT DCB BLK SIZ£=133,

DEFINE THE PRINTER FILE
DCNAME=SYSPRINT.
OEVD=0A, 4-
4-
DSCR6=PS,
4-
MACRF=(FM),
RECFM=FM 4-

SAVEAREA DS l 8F
REGISTER SAVE AREA
ENO PRCG7e

FIGURE 7-4 OS input/output macros.

154
155 The OS DCB File Definition Macro

accesses them from the DD statement. In this way, entries in the DCB have priority
over those in the DD statement. If there is information not provided, the system may
make a default assumption, or if not possible, the program will possibly "bomb"
when attempting an I/O operation.
Figure 7-4 illustrates the OS DCB macro and initialization, using the same
example as the previous one for OS, reading and writing card records.

DCB FOR INPUT. In the example, the name of the data set is FILEIN. Some of the
DCB entries may be made on the DD job control cards.

BLKSIZE = 80 means that the size of each data block is 80 bytes.

DDNAME = SYSIN tells Data Management that the "data definition name" is the
logical address SYSIN (or whichever unit applies).
DEVD = DA means that the device for the data set is "direct access", or disk. The use
of this entry instead of RD for card reader facilitates device independence, so
that, for example, card records may be "spooled" onto disk for later processing.
DSORG = PS means that the data set organization is "physical sequential" (that is, the
data is organized as sequential, rather than as direct access or indexed
sequential—two disk processing methods). This entry may appear only in the
DCB macro, and not in the DD job statement.
EODAD=Z1 OEND tells Data Management that the end-of-data address is Z10END
(or any other program label designated as the end routine). Data Management
(like IOCS) directs the program to this address on encountering the end-of-file
indication on the input data set (/* on cards).
MACRF=(GM) means that the "macro format" to be used in the program is "Get and
Move" to a workarea (the coding is to be GET FILEIN,workarea).

We may provide other definitions at execute-time with the DD (Data Defini¬

tion) job control card, such as assigning the actual I/O device to be used (printer,
tape, disk, etc.). Also, we do not define the buffers with the DCB. The DD card
specifies the number of buffers; if omitted, OS assumes two buffers by default.

DCB FOR OUTPUT. In Figure 7-4, the name of the DCB printer data set is FILEOT,
and provides one possible coding:

BLKSIZE, DEVD, and DSORG are similar to the definitions for the input data set.
DDNAME = SYSPRINT means that the system printer is the device for this data set.
MACRF=(PM) means that the macro format is "Put and Move" from a workarea (the
coding is to be PUT FILEOT,workarea).
RECFM = FM. F means "fixed, unblocked". M is for "machine code", the format for
the regular 360/370 print control characters. For ASA characters, use A. The
requirements for other installations may be quite different. Some systems block
print records onto disk prior to printing, and the entry may be FBM or FBSM.
 156 INPUT AND OUTPUT

LOCATE MODE

It is possible to process input/output records directly in the buffers. The advantage

(not very great) is that the workarea need not be defined. GET and PUT are coded
without specifying a workarea in operand-2, as

GET FILEIN and PUT FILEOUT

The DTF and DCB requirements differ. For the DTF, the entry IOREG replaces
WORKA, as IOREG = (reg) specifying an available general register. IOCS is to load
the register with the address of the buffer that contains the next record to be pro¬
cessed. The DCB entry to denote processing in a buffer ("Locate Mode") is
MACRF = (GL) for input and MACRF=(PL) for output. The system uses register-1 for
the address of the buffer that contains the record to be processed.
The example in Figure 7-5a shows the first GET executed. IOCS reads record-1
into buffer-1 and loads the address of buffer-1 into "register-r". Then, while the
program processes the record in buffer-1, IOCS reads record-2 into buffer-2:

I/O areal I/O area2 Register-r

1st GET: Record-1 Record-2 A (I/O areal)
GET FILEIN Buffer-1 Buffer-2

FIGURE 7-5a

The example cites "register-r" to mean the specified register in the DTF or register-1
for the DCB.
Figure 7-5b shows the second GET executed. IOCS loads the address of
buffer-2 (which contains record-2) into register-r. Then, while we process record-2
IOCS reads record-3 into buffer-1:

2nd GET: I/O areal I/O area2 Register-r

GET FILEIN Record-3 Record-2 A (I/O area2)

FIGURE 7-5b

Processin§ continues "flip-flopping" between the two buffers (or more under
OS). GET reads a record into one of the buffers, but which one? After the GET the
register will contain the address of the first byte of the buffer in which the next input
record is located. For the programmer, the simplest action is to move the contents of
the buffer to a workarea for processing. We can use the address in the register
fo^MVC is" ^ MVC °Perat'0n lmmediatelV following the GET. The symbolic format
 157 Locate Mode

MVC D1(L,B1),D2(B2)

We can use explicit base/displacement addressing in either operand In this

case, since register-r contains the address of the buffer, we can code the following:

GET FILEIN Read File—Load Register with Buffer Address

MVC INAREA,0(r) Move Buffer to IN AREA

The MVC instruction works as follows: Using the address in register-r (base register-r,
no displacement), move from the specified storage location to INAREA (an 80-byte
move, based on the length of INAREA). The GET operation is basically the same for
uub and Ob, although OS requires the use of register-1 only. The PUT statements
and file definitions differ.

DOS CODING FOR LOCATE MODE. The changes required to process in the
suffer are compared in Figure 7-6 with the conventional use of a workarea. The
example arbitrarily selects register-4 for the input register and register-5 for the output
one, with the IOREG entry replacing the WORKA entry. Any available register (2
through 12) will work, but not the base register(s). For printing, the OPEN statement
establishes in register-5 (in this case) the address of the first available print buffer.
Before the PUT, we move the contents of the PRINT area to the buffer: operand-1 of
the MVC, coded as 0(121,5) uses base register-5, displacement zero and length 121
explicitly to move the contents of PRINT to the designated storage locations. The
following PUT statement initializes register-5 with the address of the next available
buffer.

Macro Using workarea Using locate mode

Read GET CARD,CARDIN GET CARD
MVC CARDIN,0(4)
Write PUT PRTR,PRINT MVC 0(121,5),PRINT
PUT PRTR
Input file definition DTFCD . DTFCD.

WORKA=YES IOR EG=(4)

Output file definition DTFPR. DTFPR.

WORKA=YES IOREG=(5)

FIGURE 7-6 DOS locate mode.

OS CODING FOR LOCATE MODE. Under OS, the DCB entry for processing in the
buffer for the input data set is MACRF=(GL) for Get Locate, and the entry for the
output data set is MACRF=(PL) for Put Locate. Figure 7-7 compares the conventional
use of a workarea with Locate Mode. Since the DCB contains the entry for (PL), we
158 INPUT AND OUTPUT

Macro Using workarea Using locate mode

Read GET FI LEIN,INAREA GET FILEIN
MVC INAREA,0(1)
Write PUT FILEOT.OUTAREA PUT FILEOT
MVC 0(133,1),OUTAREA
Input file definition DCB . DCB .

MACRF=(GM) MACRF=(GL)
Output file definition DCB . DCB .

MACRF=(PM) MACRF=(PL)

FIGURE 7-7 OS locate mode.

must code the PUT with no operand-2. PUT inserts into register-1 the address of the
first byte of the buffer that is to receive the next output record. We code PUT to locate
the output buffer, and then can use register-1 explicitly to move data into the buffer.
But watch out—the coding for PUT and MVC under OS is reverse to that for DOS.

We are not yet fully ready for explicit use of base/displacement, covered in a
later chapter. What have we accomplished? Using standard workareas, IOCS would
perform these functions automatically. Processing fully in a buffer without moving to
a workarea requires extensive use of explicit base/displacement processing. Chapter
1 5, under DSECT, does provide a sophisticated method of processing within a buffer,
and giving names to the various fields in that area. Meanwhile, feel free to continue
using workareas, the approach most commonly used in handling input/output.

DEVICE INDEPENDENCE UNDER DOS

With DTFCD and DTFPR we can normally read and write data only on the card
reader, punch, and printer. Some situations, however, require more I/O flexibility.
For example, assume a multiprogramming system that is executing two programs.
The first program fully uses the only printer, but the second program also needs the
printer. We may ask the system to direct the second program's output onto magnetic
tape, which can later be used to print the output when the printer is available. We
can enhance the flexibility of device independence (assigning tape output for a
printer, for example) with the use of the macro DTFDI (Define the File Device
Independent) in place of DTFCD and DTFPR. OS and larger DOS/VS versions, de¬
signed for device independence, do not require such a special macro.
The module that DTFDI generates is larger than those for DTFCD and DTFPR,
but is more versatile. Among restrictions, records must be fixed length, unblocked
and with no workarea specified. Figure 7-8 illustrates DTFDI macros for input and for
output.
159 Device Independence Under DOS

FILEIN DTFDI DEVAOOR=SYSIPT . DEFINE INPUT FILE 4-

EOFADDR = ZI0END . ♦
RECSIZE = 80• ♦
I0A RE A 1 = BUFF INI . ♦
IOAREA2=BUFFIN2.
IDREG=(A)

BUFF IN 1 DC CL60• • INPUT BUFFER 1

BUFFIN2 DC CL80• • INPUT BUFFER 2

PRTR DTFDI DEVADDR=SYSLST, DEFINE PRINT FILE -f

RECSIZE=121. ♦
I0AREA1=BUFF0UT1. ♦
IOAREA2=BUFFOUT2, ♦
IOREG=(5I

BUFFOUT1 DC CL 12l • • OUTPUT BUFFER 1

EUFFOUT2 cc CL I2 1 • • OUTPUT BUFFER 2

FIGURE 7-8 DOS DTFDI macros.

DTFDI FOR INPUT. The name in the figure given to the file is FILEIN. Entries
EOFADDR, IOAREA1, and IOAREA2 are coded the same as for DTFCD.

DEVADDR uses only the primary system input device names SYSIPT and SYSRDR.
IOREG = (4) tells IOCS to load register-4 with the address of the buffer that contains
the current input record. Any available register, 2 through 12, may be assigned.
With IOREG, we code GET filename (with no workarea indicated).
RECSIZE = 80 designates the length of the input area as 80 bytes, the maximum length
allowed.

Note the use of RECSIZE instead of BLKSIZE. We do not code DEVICE (because
it is device independent), RECFORM (always fixed, blocked), TYPEFLE (files can be
input or output), or WORKA (processing is in a buffer, not a workarea).

DTFDI FOR OUTPUT. The name given to the output file in the figure is PRTR. Note
that we do not code CTLCHR, DEVICE, RECFORM, or TYPEFLE. Entries DEVADDR,
IOAREA1, and IOAREA2 are the same as for DTFPR.

IOREG = (5) tells IOCS to load register-5 with the address of the buffer that is next to
be used for output. Initially, the OPEN macro loads register-5, and subsequently
the PUT macro as executed. Any available register, 2 through 12, may be
assigned. With IOREG, we code PUT filename (with no workarea indicated).
RECSIZE = (121) defines the length of the output record. The first byte is reserved for
the control character. The maximum length is normally 121 for SYSLST (printer)
and 81 for SYSPCH (card punch).
160 INPUT AND OUTPUT

ABNORMAL TERMINATION

Both DOS and OS have macros that are used to terminate the program abnormally
when a serious error condition is encountered. Both provide a hexadecimal dump of
the registers and the program storage area. The DOS macro is DUMP and the OS one
is ABEND.

NAME OPERATION OPERAND

DUMP Ignored, use for comments

ABEND completion-code,DUMP

THE DOS DUMP MACRO. DUMP terminates program execution and provides a
storage dump. Generally, PDUMP is more convenient to use when testing a program
because it continues processing the program. The CANCEL macro also terminates
processing, and flushes all input records through tothe/& Job End card. If we precede
program execution with a // OPTION DUMP job card, the Supervisor automatically
produces a storage dump after the CANCEL. (// OPTION PARTDUMP on some larger
systems.)

THE OS ABEND MACRO. To provide for a serious error condition where we want
an "abnormal end" of the program, we code the ABEND macro. The operand
includes a "completion-code", any decimal value up to 4095, as ABEND 25,DUMP.
There could be several ABENDS in the program, but the completion code 25 iden¬
tifies which ABEND when it prints at termination. The DUMP operand invokes the
ABDUMP macro (abnormal DUMP) which prints a hexadecimal dump of the reg¬
isters and relevant parts of main storage.

DEBUGGING TIPS

Coding errors based on input/output are many and serious. The Assembler can
identify the most obvious spelling errors, but others include:

— Under DOS, failure to open a file.

the data immediately following. When at some later poi,

execute the garbage", the results will be unpredictable.
161 Problems

— Incomplete file definition macro entries, allowing the Assembler to default to

unexpected values (such as ASA forms control character).
— Confusion in use of Locate Mode with file definition, imperative macro, or reg¬
ister.

PROBLEMS

7-1. What is the difference between "Supervisor” and "Problem" state?

7-2. What is a "privileged" instruction?
7-3. What is the advantage (if any) of buffers?
7-4. What is a "file definition" macro and an "imperative" macro?
7-5. Give the MVI and the PUT to print and space 3 lines, using file PRTR and
workarea PRINT.
7-6. Provide the file definition macro for a card reader called READER, end-of-file
address P35END, device 2540, and a workarea. If using DOS, define two
buffers.
7-7. Provide the file definition macro for a printer called PRTR, device 1403, and a
workarea of 133 bytes. If using DOS, define two buffers.
7-8. Redefine the file in Problem 7-6 for Locate Mode. Provide the GET statement.
7-9. Redefine the file in Problem 7-7 for Locate Mode. Provide a PUT and MVI for
print space 2.
7-10. Recode any previous program. Assign base registers and use full IOCS. Re¬
place any special macros such as INIT, DEFCD, DEFPR, and PUTPR.
 CHAPTER 8

STRATEGY, STYLE, AND

STANDARDS

Up to now, most of the emphasis in this book has been with the technical aspects of
Assembler programming. In this chapter we take a break, and examine program
organization, style, and standards. Much of this material is relevant to any programm¬
ing language.

PROGRAMMING OBJECTIVES

The goal of a computer system is to produce information. We reach this goal by

means of three objectives: accuracy, efficiency, and clarity.

1. Accuracy. A program must produce 100 percent accurate results, since the recip¬
ient of the report may base decisions on the information. For example, if a report
detailing delinquent customer payments is incorrect, the company may start bad¬
gering customers who are fully paid up.
2. Efficiency. In these days of large main storage, "virtual” storage, and fast
execute-time, efficiency is no longer such a consideration as once it was. There
may even be justification for some inefficiency, where the added cost of pro-

762
163 Subroutines and Linkage

gramming time exceeds the expected cost of CPU time, or when there is an urgent
need for information. However, in the interests of less execute-time and storage
space, an efficient program is always a reasonable objective.
3. Clarity. Since many installations devote considerable time to program corrections
and revisions, it is vital to design programs that are clear and maintainable. In the
past, there have been many programmers with great technical skill who coded
incredibly complex routines, and used the most sophisticated instructions where
simple ones would work equally well. Today's emphasis is on code that is simple,
clear, and well-organized.

This chapter first examines an approach to program organization, subroutines,

then Programming Style, and finally Standardization and Documentation.

SUBROUTINES AND LINKAGE

A subroutine is a section of program coding that acts almost as an independent part

of the program. Sometimes more than one part of the main program uses the sub¬
routine. For example, we can treat the section of coding for page overflow as a
separate part of the main program. It can be written as a subroutine used by different
parts of the main program. Each time a line is printed, the program can check if the
maximum number of lines per page has been reached. If so, the program branches,
or links, to the subroutine. The subroutine executes the following:

— Skips to a new page.

— Prints the heading.
— Initializes the line counter.
— Adds one to the page count.
— Returns, or links, to the point of invocation in the main program.

The use of subroutines has several advantages: (a) It simplifies program writing.
Commonly used routines, or complex routines, may be separated from the main
program. The main program logic then is simplified, (b) A subroutine may be written
once, then catalogued as a permanent part of the system, available for use by other
programs, (c) It facilitates teams of programmers working on one program.

SUBROUTINE LINKAGE—BAL AND BR. We perform subroutine linkage by

means of two instructions that use a register: BAL and BR.

NAME OPERATION OPERAND

[symbol) BAL R1.X2 or R1,D2(X2,B2)

[symbol] BR R1
 164 STRATEGY, STYLE, AND STANDARDS

BRANCH AND LINK—BAL. BAL is similar to BALR, covered earlier. The rules are:

1. Operand-1 specifies a register to be used for subroutine linkage.

2. Operand-2 references an address, generally the subroutine.
3. On execution, BAL loads the address of the next instruction into the operand-1
register (the instruction address, bits 32-63 of the PSW). Then BAL branches
unconditionally to the operand-2 storage address.

For example, BAL 8,P10PAGE means: load the address of the next instruction in
register-8, and branch to the address of P10PAGE.

BRANCH ON CONDITION REGISTER—BR. BR is an unconditional branch to an

address in a register. We commonly use BR to return from a subroutine. For example,
BR 8 branches unconditionally to an address stored in register-8. BR is an ”extended
mnemonic,” and is actually a BCR (Branch Condition Register) operation.

USE OF LINKAGE. We allocate any available register for subroutine linkage. We

should be careful, however, not to change the contents of the register between the
time BAL loads the address and the time BR returns from the subroutine. In Figure
8-1/ fhe main program has two linkages to the subroutine, statements 1 and 5. The
program executes as follows:

STATEMENT DESCRIPTION

1 BAL loads the address of the next instruction, statement 2, into register-8
and branches to P10PAGE, statement 9.
9-12 The subroutine, P10PAGE, is executed. At statement 12 the program
branches to the address stored in register-8, statement 2.
Statements 2, 3, and 4 are executed.
5 BAL loads the address of the next instruction, statement 6, in register-8
and branches to P10PAGE, statement 9.
9-12 Statements 9, 10, and 11 are executed. At statement 12 the program
branches to the address stored in register-8, statement 6.

Main program Subroutine

1 BAL 8, P10PAGE P10PAGE
(N CO 't

BR 8
5 BAL 8, P10PAGE
6 .
7 .
8 EOJ

FIGURE 8-1 Subroutine linkage

165 Subroutines and Linkage

6 8 Statements 6, 7, and 8 are executed. Statement 8 terminates program

execution.

We must ensure that the subroutine is a separate part of the program. The only
way this subroutine should be normally entered is with BAL 8,P10PAGE. The normal
exit in this example is back through register-8. The program, however, may branch
out of the subroutine to any address, such as to an error routine.

SUBROUTINE FLOWCHARTING. Both the subroutine coding and the subroutine

flowchart are separated from the main program. The only new requirements are the
flowchart symbols for linkage to and from the subroutine. The main program uses
one symbol that represents the entire processing in the subroutine, as shown in
Figure 8-2, one of several ways to represent subroutines.

Main program Subroutine PlOPage

i
PI OP AGE (_" ENTRY )
HEADING
ROUTINE
p. XX

symbols for processing

A_
P10PAGE
HEADING
ROUTINE
p. XX
c RETURN

FIGURE 8-2 Subroutine symbols.

The symbol in the main program that represents the subroutine processing
shows:

1. The name of the subroutine (P10PAGE),

2. A description of the subroutine (HEADING ROUTINE), and
3. The flowchart page number on which the subroutine detail is given.

For a complete example of main logic and subroutines, refer to the flowchart
and program at the end of this chapter.
166 STRATEGY, STYLE, AND STANDARDS

PROGRAMMING STYLE

A subroutine need not be limited in use to a common section of code, such as the
example page heading. Good programming practice today is in the style of "struc¬
tured programming". Now, Assembler language does not lend itself well to struc¬
tured programming requirements, which are better facilitated by high-level lan¬
guages like PL/I and COBOL. But we can adhere to some of its main features:

— Organization of the program into a "main logic" section with various subsidiary
routines (subroutines). The main logic handles input and testing for record code
or sequence to determine the action to take. It then uses BAL to perform the
required subroutine.
Each subroutine has a specific identifiable purpose and contains only logic re¬
lated to its purpose. In a Payroll program, for example, one subroutine calculates
income tax, another calculates pension deduction, etc.
— The main logic and the subroutines are each contained within one page of
printed code (or the number of lines on a visual display terminal). By this limita¬
tion, the mind can grasp (hopefully!) the entire processing logic of the routine.
Routines that continue for pages become incomprehensible. (One exception
could be for a routine that performs many repetitious Move/Edit operations.)
— Each subroutine has one entry-point, at its start, and one exit-point, at its end. The
program accordingly organizes itself into clear, logical sections, with no confus¬
ing branches back and forth between routines.
Within a subroutine, branch statements should go forward as much as possible.
The only statements that branch backwards are those that loopAe.g., branch
back to read the next input record). The following example illustrates an un¬
necessary branch backwards caused by an illogical approach:

UNNECESSARY BRANCH
PROPER CODING
CP CUSTBAL.CREDLIM CP CUSTBAL.CREDLIM
BH D30 BNH D20
D20 •
• MVC MESSOUT, = COVER LIMIT’
•
D20
D30 MVC MESSOUT, = COVER LIMIT’
B D20

Fully structured programming as used in PL/I and COBOL entirely eliminates the GO
TO statement (in Assembler, B, BH, BNE, etc.) because of their powerful "macro
statements", DO WHILE and PERFORM. powerrui macro
The examPle program at the end of this chapter illustrates a Payroll program
at is organized according to the foregoing conventions. The objective of such
programming style is to gain better clarity and to facilitate program maintenance.
167 Program Documentation

Because a large part of programming effort is in correcting and revising programs,

there is an urgent need for clear, concise, and well-organized programs.
Good programming style is only one way to provide better clarity. Others are:

— The use of meaningful names that describe the fields being defined, such as
TOTALTAX instead of AMOUNTA, or worst of all, cryptic one-letter names such
as A and X.
— A systematic labelling convention that provides easy locating of branch points
and clearly identifies the section in which it belongs. In the example program at
the end of this chapter, the Main Logic routine has labels that all begin with 'A':
A1 OREAD, A20, A30; the Wage Calculation subroutine labels are 'B'; and Em¬
ployee Total subroutine labels begin with 'D'; etc.
— Assigning certain registers always with specific purposes, such as 3, 4, and 5 for
base registers; 6 and 7 for subroutine linkage; etc. Such conventions help
minimize errors in register usage.

PROGRAM DOCUMENTATION

An important element of program maintenance is adequate documentation. There is

certainly no universal standard of documentation. Some installations keep a program
listing only, well-documented with comments, sometimes stored on disk and avail¬
able to users through visual display terminals. Others keep a record of each program
in files or binders for quick reference, along with other related material, such as
flowcharts and test runs. This text does not advocate any particular method of
documentation. Programmers quickly develop bad habits in areas that are non¬
productive and uninteresting (such as documentation). Learners should at least begin
developing good habits and apply them to their installation's standards.

THE PROGRAM DOCUMENTATION FILE. The following is an example of one

possible documentation file, by section.

1. Title Page. The first page could contain program number, program name, the
names of the programmers who wrote it, and the date completed. It might also
specify who authorized the program originally, and the date. This section could
also contain the dates of any revisions, who requested them, and who made
them.
2. Contents Page. If the size of the program warrants it, a contents page may be
useful.
3. Program Objective. This section consists of one or two paragraphs providing the
objective(s) of the program, in effect what the program is to accomplish.
4. Operator's Guide. Many installations have a preprinted operator's guide that the
programmer completes to facilitate running of the program. The guide contains
inputs and their sequence, output devices, printer forms, control totals, and error
168 STRATEGY, STYLE, AND STANDARDS

messages, listing of job control cards (if any), and approximate run time. A copy
of this guide is often usefully included in the program documentation file.
5. Layouts for Input and Output Records and the Printed Report. The report layout
shows the print position of every field in the headings, detail line, total lines, and
error messages.
6. Flowcharts. The current program flowchart (or decision tables in some installa¬
tions) should be filed. A large program could also have an overall summary
flowchart.
7. The Program Listing. The current program listing is included, with the date
clearly identified.
8. Example Test Data. A program using tape or disk input generally is tested using
"live" data. If input is from punched cards, it is not difficult to arrange and list
sample data for testing the program. The test cards should be kept for use in
testing the program whenever it is revised. On the listing of the data, each input
field should be clearly indicated, along with any intentional errors. The list of
input data should show expected results (the totals that we expect the run to
produce), and a random sample of calculations (such as hour x rate in the
documented program following).
9. Program Report Output. This section gives a sample of the program's printed
output, either from live data or from test data, with adding machine tapes to
prove the accuracy of the test.
10. Previous Listing. The previous program listing should be preserved in case re¬
visions turn out to be wrong, or the revision is cancelled and we have to reverse
the changes.

The next section illustrates an Assembler program fully documented according

to the preceding discussion. The example is somewhat overdocumented to make it
clearer to readers not familiar with Assembler language. The only topic in the pro¬
gram not yet covered is table look-up.
DOCUMENTED PROGRAM

TITLE PAGE

Program Number: PROG08

Program Name: Weekly Wage Calculation
Programmer: Oliver Twit
Completion Date: January 28, 19xx
Authorization: J. P. Megabuck
Payroll Department
January 27, 19xx
Language: Assembler
Status: Tested and fully working.
Revisions:

WEEKLY WAGE CALCULATION PROGRAM PROG08

CONTENTS

Page
Program Objective 1
Operator Guide 2
Program Description 3
Input Record Layout 4
Printer Forms Layout 5
Program Flowchart 6
Program Listing 8
Listing of Test Input Data 12
Test Output 13

PROGRAM OBJECTIVE 1

To calculate employees’ wages for the current pay period, and to pro¬
duce the weekly wage report.

169
 OPERATOR GUIDE 2

PROGRAM: PROG08, Weekly Wage Calculation

INPUT FILE: Employee weekly time records (code 04) for the cur¬
rent pay period.
SEQUENCE: Employee number
RUN TIME: 10 minutes
FREQUENCY OF RUN: Weekly
OUTPUT: Printer:
Employee Weekly Wage Report
Forms: 8V2 x 14 management report form
2-part
standard carriage control tape
RECIPIENT OF REPORT: Payroll Department, both parts
CONTROL TOTALS: The program produces total hours and wages by em¬
ployee number (indicated by *) and for final total (in¬
dicated by **). Final total hours on the report must
agree with the precalculated hours in the Payroll Con¬
trol Register before continuing with the next payroll
job. Total wages from the report is to be entered in
the Control Register.
ERROR MESSAGES: CAUSE:
’INVALID RECORD CODE’ A record does not contain 04’ in columns
1-2.
’RECORD OUT OF SEQUENCE’ An employee number read is lower than
the preceding record.
’JOB NO. NOT IN TABLE’ A job number on an input record is not in
the table of jobs in the program.
Action: The program prints the error message and
continues processing with the next input record. In¬
valid records should be corrected and the job rerun.

7 70
 PROGRAM DESCRIPTION 3

The program is organized into the following sections:

SECTION A: MAIN LOGIC (READ & CHECK VALIDITY & SEQUENCE)
Checks each record for valid code. Sequence-checks on Employee number:
Equal — Process the record (Section B).
Low — Sequence error (Section R).
High — Control break; tests for first record of file:
First record — Bypasses control break (goes to Section B).
Not first — Performs Employee totals (Section D).
On end-of-file, links to address A50END (see DTFCD in program). This routine
performs Employee Totals, Section D, then Final Totals, Section E, and terminates
processing.
SECTION B: PROCESS EMPLOYEE RECORD
Uses Job number from the input record to locate related rate-of-pay in a stored
table. (A Job not found in the table is an error.) For example, Job number is ’02’
and located rate-of-pay is $6.15. The program multiplies Hours worked (21.5) by
rate to calculate Wage:

21.5 x $6.15 = $132,225 (rounded to $132.23)

Accumulates total Employee hours and wages, and prints Employee detail line
(see print layout). Returns to read the next record (Section B).
SECTION D: EMPLOYEE TOTALS
Prints total Employee hours and wages (one *), accumulates final total hours and
wages, and clears Employee totals.
SECTION E: FINAL TOTALS
Prints total hours and wages (two **’s).
SECTION H: PAGE OVERFLOW & HEADINGS
Prints page heading at the start of the run and on reaching the end of each page.
SECTION P: PRINT SUBROUTINE
Performs all printing and adding to line counter.
SECTION R: ERROR ROUTINES
The Operator’s Guide describes the three error routines.
REGISTERS USED: Register: Purpose:
3 Base register for addressing
7 Subroutine linkage
9 Table look-up for Job number
SWITCHES USED: None.

7 77
 MULTIPLE-CARD LAYOUT FORM

7 72
 5

7 73
 6

Main logic routine

174
 7

Employee total subroutine

Print subroutine

Final total subroutine

Error message routines

Page heading subroutine

175
 - 8

TIALIZATION
1 N I

6 PROG08 START 0 INITIALIZE 8 A 5F REGISTER

7 8 ALR 3,0
USING *.3
a ACTIVATE FILES
OPEN FILE IN.PRTR
10 PRINT HEADING
B AL 7.H1CHEAD
19

N LOGIC
21 ♦** M A I

READ A RECORD
23 AlOREAC GET FILEIN,INAREA
VALID RECORD CODE?
CLC CODE IN, = C* 04*
29 NO - ERROR
30 BNE R1OCODE

EMPLOYEE SEQUENCE?
CLC EMPNOIN.PREVEMP
32 EQU - PROCESS
33 BE A20
LOW - ERROR
34 BL R20SEQ
HI - NEW EMPLOYEE
35 ♦
PREVEMP.LOVALUE FIRST INPUT RECORD?
36 CLC
YES - BYPASS CTL BREAK
37 BE A20
NO - PRINT E MPL TOTALS
3e B AL 7,01CEMP

linectr.endpace END OF PAGE?

40 A20 CP
NO
41 BL A30
YES - PRINT HEADINGS
42 B AL 7.HI0HEAD

PERFORM CALCULATIONS
44 A30 BAL 7.BIOCALC
45 B AlOREAO

47 END - 0 F - F 1 L E

7.010EMP EMPLOYEE TOTALS

49 ASCEND e al
7.ElOTOTL FINAL TOTALS
50 A60 BAL
52 CLOSE FILE IN.PRTR
TERMINATE RUN
61 EO J

65 ** CALCULATION OF W AGE - SUBROUTINE

67 BIOCALC LA 9,JOBTAB INIT. SEARCH FOR JOB RATE

CLC J0BIN,0(9> COMP JOB NO. TO TABLE ENTRY
68 820
69 BL R30JOB LOW - NOT IN TABLE

70 BE B30 EQU - FOUND

71 AH 9,—H• 4 • HI - INCREM. NEXT ADDRESS

72 B B20

74 B30 ZAP RATEPK.2(2.9) EXTRACT RATE FROM TABLE

75 PACK HRSPK.HRSIN
76 ZAP wagepk.hrspk CALCULATE WAGE =
77 MP WAGEPK,RATEPK HOURS X RATE
78 SRP WAGEPK,63,5 SHIFT A ROUND 1 DIGIT

80 MVC WAGEPR.EDAMT3 EDIT:

31 ED WAGEPR,WAGEPK+1 WAGE
82 MVC H0URSPR.EDHRS2
83 ED HOURSPR.HRSPK HOURS
84 MVC RAT EPR,EDR ATE2
85 ED RATEPR.RATEPK RATE
86 MVC JOBPR * JO BIN

88 CLC EMPNQIN.PREVEMP IF NEW EMPLOYEE NO.

89 BNE B40 OR
90 CP LINECTR.TOP AGE IF TOP OF PAGE
91 BNE B50 MOVE
92 04 C MVC NAMEPR.NAMEIN NAME A
93 MVC empnopr.empnoin EMPLOYEE NO. TO PRINT

7 76
 9
95 850 M VC PR I NT,DETALINE
96 GAL B.P20WSP1 PRINT 4 SPACE 1
97 >*VC DETALINE.blank CLEAR PRINT AREA
98 AP EMPHRPK.HRSPK ADD TOTAL HOURS 4 WAGES
99 AP EMPWGPK.WAGEPK FOR EMPLOYEE
100 MVC PREVEMP.EMPNOIN
10 1 BR 7

103 ** OUTPUT TOTAL HOURS 4 WAGES FOR EMPLOYEE - SUBROUTINE -

105 01GEMP M VC T0TWAGPR.ECAMT4 EDIT employee totals:

106 EO T OT WAGPR•EMPWGPK WAGES
107 N VC TOTHRSPR.EDKRS3
108 ED TOTHRSPR.EMPHRPK HOURS
109 M VC PRINT.TOTALINE
110 8AL 8.P30WSP2 PRINT 4 SPACE 2

1 12 AP TOTHRPK.EMPHRPK ADD TO FINAL TOTAL HOURS

113 AP TOTWGPK.EMPWGPK & WAGES
1 14 ZAP EMPHRPK.=P*0* CLEAR EMPLOYEE HOURS
l 1 5 ZAP EMPWGPK.=P*0* 4 WAGES
1 16 BR 7 BRANCH TO AODR REG7-A20 OR A60

1 19 ** PRINT FINAL TOTALS - SUBROUTINE

12 1 EICTOTL MVC ASTERPR2 <2) ,=C****

122 HVC TOTWAGPR,EDAMT 4 EDIT FINAL TOTAL:
123 ED TOT WAGPR.TO TWGPK WAGES
124 MVC ASTERPR1<21»=C••
125 MVC TOTHRSPR.EDHRS3
126 EO TOTHRSPR.TOTHRPK HOURS
127 MVC PRINT.TOTALINE
128 e AL 8.P20WSP1 PRINT 4 SPACE 1
1 29 BR 7

13 1 ** PAGE HEADING SUB-ROUTINE

133 H10HEAC E AL 8.P10SKIP SKIP TO NEXT PAGE

134 MVC PAGEPR.EDPAGE SET UP HEADING LINE 1
135 EO PAGEPR.PAGECTR
1 36 MVC PRINT.HEAOING1
137 E AL 8.P30WSP2 PRINT 4 SPACE 2

l 39 MVC PRINT.HEA0ING2
140 E AL 8.P30WSP2 PRINT 4 SPACE 2
14 1 ZAP LINECTR.TOPAGE INITIALIZE LINE COUNT
142 AP PAGECTR.=P*1* INCREMENT PAGE NO.
143 eR 7 RETURN

1 46 ** PRINT SUBROUTINE

148 PlOSKIP MV I CTLCHAR.SKIP SKIP CHARACTER

149 B P90

151 P20WSP1 MV I CTLCMAR.WSP1 WRITE 4 SPACE CHARACTER

152 AP LINECTR.=P*I• ADD TO LINE COUNTER
153 B P90

155 P3CWSP2 MVI CTLCHAR.WSP2 WRITE 4 DOUBLE-SPACE CHARACTER

156 AP LINECTR.=P*2» ADO TO LINE COUNTER

158 P9C PUT PRTR.PRINT PRINT

164 0R 8 RETURN

7 77
 10

166 SKIP EOU x*ae*

167 MSP1 EQU X•C9•
168 WSP2 EOU X* I 1 •

171 44 ERROR ROUTINES

173 R|OCOOE MVC DETALINE460IL 'ERRCOOE). ERR CODE

174 e RSO

176 R20SE0 M VC DETALINE 460<L•ERRSEC > •ERRSEQ

1 77 B RSO

1 79 R30JCB M VC OETALINE460IL•ERRJOB» •ERRJOB

181 R50 MVC EMPNOPR.EMPNOIN

1 82 MVC NAMEPR * NAME IN
1 83 MVC PRINT.DETALlNE
184 BAL 8.P2CMSP1 PRINT ERROR MESSAGE
185 MVC DETALINE.BLANK
iee B A10REAC
O

ID
V

188 4 LARATIVES

ISO F ILE IN DTFCO fiLKSIZE=80. OEFINE INPUT FILE 4

DEVAODR=SYSIPT. ♦
0EVICE=1442. ♦
EOFAOOR=A50ENC. 4-
IOAREAI = INBUFF 1* ■f
IOARE A2=INBUFF2. ♦
TVPEFLE=INPUT. •f
MORKA=YES

2 12 INBUFFI OC CL0O* • INPUT BUFFER-1

213 INBUFF2 OC a_ao* • INPUT BUFFER-2

2 15 INAREA OS 0CL80 INPUT AREA

216 CODE IN DS CL2 * RECORD CODE
217 EMFNOIN DS CL5 * EMPLOYEE NO.
218 NAME IN OS CL 15 * EMPLOYEE NAME
2 19 JOB I N DS CL 2 * JOB NO.
220 HRSIN OS CL3 * HOURS MORKEO (XX.X)
22 1 OS CL 5 3 * UNUSED

223 PRTR DTFPR BLKSIZE=133. DEFINE printer FILE ♦

CTLCHR=YES.
DEVADOR=SYSLST.
DEVICE=1403.
IOAREAl=PRBUFFl.
I0AREA2=PRBUFF2.
40RKA=YES

245 PRBUFF1 OC CL133* • PRINTER BUFFER-1

246 PREUFF2 DC CL 133* • PRINTER 8UFFER— 2

248 PRINT OS 0CL133 PRINT OUTPUT AREA

249 CTLCHAR DS CL 1
PRINT CTL CHARACTER
250 OC CL 132* • 4

252 HEAO ING1 OS 0CL133 1ST HEADING LINE

253 DC CL 23• •
254 OC CL4e*W E E K L Y HA GE REPORT*
255 DC CL5* PAGE•
256 PAGEPR OS ZL4
257 OC CL53• •

178
 11

2S9 HEADING2 DS 0CL133 2ND HEADING LINE

260 DC CL 13* •
26 1 DC CL26*EMPLOYEE NAME*
262 DC CL94•JOB RATE HOURS WAGE*

264 BLANK DC C* • BLANK TO CLEAR PRINT AREA

265 DETALINE DS 0CL133 EMPLOYEE DETAIL PRINT LINE
266 OC CL 15* •
267 EMPNOPR DS CL5
268 OC CL 3* •
269 NANEPR DS CL 15
270 OC CL2 • •
271 JOBPR DS CL 2
272 DC CL 2 ' •
273 RATEPR DS ZL5
274 DC CL 2 • •
275 HOURSPR DS ZL6
276 DC CL6 • •
277 WAGEPR DS ZL 9
278 DC CL61• •

280 T01ALINE DS 0CL133 TOTAL WAGE PRINT LINE

28 1 DC CL 4 8* •
282 TOTHRSPR DS ZL9
283 ASTERPR1 DC CL 3•*•
284 TOTWAGPR DS ZL 1 2
2eS ASTERPR2 OC CL61 •

2e7 ERRCOOE DC C*INVALID RECORC CODE*

288 ERR J OB DC C'JCE NO. NOT IN TABLE*
289 ERRSEQ DC C•RECORO OUT OF SEQUENCE*
290 PREVEHP DC XL5* 00*
291 LOVALUE OC XL5* 0 0 *
PACKED declaratives:
292 *
293 HRSPK CC PL2'0' |XX|.xc|
OC PL2•0• | X . X | XC 1
294 RATEPK
295 WAGEPK DC PL4*C*
296 E NPHRPK OC PL 3*0*
297 EMPwGPK CC PL4•0•
298 TOTHRPK DC PL 3* 0*
299 TOTWGPK DC PL 4 * 0 *
300 LI NEC Tfi DC PL2* 0*
301 PAGECTR DC PL2• 1 •
302 TOPAGE OC P* 5'
303 ENCPAGE DC P* 40 •
eoit words:
304 *
305 EDPAGE OC X* 40202020*
306 EDHR S2 DC X* 4020214B2060•
307 E0RATE2 OC X* 40 20 4 B20 2 0•
CC X*402020214B2020C3D9*
308 EDAMT3
309 EDHR S3 DC X•40206B2020214B20605C5C*
OC X* 4020206B20202 148 2020C3D95C5C *
310 EDAMT 4

TABLE OF JOB NOS. 4 RATES

312 JOBTAB DC C*01*.P*7.25*
*
1
3 3 DC C•0 2•,P*6.15*
C* 04•.P* 7.45* ♦
3 14 DC
C•05 *.P*8.55* *
2 15 DC
C*06*.P* 7.50* ♦
316 OC
COS* .P* 9.25* *
3 17 OC
C* 10*.P*8.95* *
318 DC
X'FFFF*,P*0.00* * END OF TABLE
3 19 CC

END PRCG08

179
 12
RUN *] VALID TEST INPUT CA TA
04 11111 ANOERSON 04 10„5 Expected AMU.l£&:
04 mu ANDERSON 0 1 2 15
0411111 ANDERSON 01 315
04 1 1111 ANDERSON 0 1 105 Job 01 7.25 x
0411111 ANDERSON 04 105 Hours 99.9
04^2222 BROWN C2 400 724.28 *
0422222 BROUN 02 500
04 22233 CARPENTER 01 999 Job 04 7.45-x
04 22233 CARPENTER 04 o i5 Hours 01.0
04 22233 CARPENTER 02 250 7.45-*
04 2223S DIXON 02 400
04 22240 EMMETT 01 150 Job 02 6.15 x
04 22240 EMMETT 0 1 150 Hours 25.0
04 22240 EMMETT 04 050 153.75 *
04 2230 1 FLANDERS 01 255
04 2230 1 FLANDERS 0 1 255 Total 724.28
04 2230 1 FLANDERS 01 050 wage£ 7.45-
0 4 22355 GAROMSKI 04 015 153.75
04 22355 GAROMSKI 04 015 870.58
04 22355 GARC*SKI 04 0 15
04 22350 HENDERSON 02 080 Employee 22360:
04 22360 HENDERSON 02 080 Job 02 6.15
04 22360 HENDERSON 02 080 Hours 8.0
04 22360 HENDERSON 02 080 49.20
04 22360 HENDERSCN 02 Iceo
Total WouJii, 41 3.9 Total 49.20
wage* 5
246.00
RUM #Z INVALIO TEST INPUT DAT

04 mil ANOERSON 04 ioAs

04 11111 ANDERSON 01 2 15
04 mil ANDERSON 01 315
04 11111 ANOERSON 01 105
04 mu ANOERSON 04 105
0 4 22222 3R0WN 02 400
3 2 2222 BROUN
C 4 22222 3RCKN
C2 500
02 500
INVALID CODE

04 22222 BROWN (3 200 INVALID JOB

0< 11111 ANDERSON 04 105 OUT-CF-SEQUENCE
04 22222 BROWN 02 4CaC
Code Emp.lt Name Job How

180
 13

OUTPUT RUN K1 WEEKLY WAGE REP CRT PAGE 1

EMPLOYEE NAME JOB RATE HOURS WAGE

1 1 1 1 l ANDERSON 04 7.45 10.5 70.23

0 1 7.25 21 .5 155.08
0 1 7.25 3 1.5 220.30
0 1 7.25 10.5 76.13
04 7.45 10.5 78.23
84.5 4 616.e5 4

22222 BROWN 02 6.1 5 40.0 246.00

02 6. 15 50.0 307.50
90.0 4 553.50 4

22233 C ARPENTER 0 1 7.25 99.9 724.28 Agmu, uitth

04 7.45 l .0- 7.45CR expected
02 6.15 25.0 153.75 fieMilti {on
123.9 4 870.58 Emp. 22233

22235 D I XCN 02 6.15 40.0 246.00

40.0 4 246.00 4

22240 EMMET T 0 1 7.25 15.0 ice.75

0 1 7.25 15.0 108.75
04 7.45 5.0 37.25
35.0 4 254.75 4

2230 1 FLANDERS 0 1 7.25 25.5 i84.ee

01 7.25 25.5 ie4.ee
0 1 7.25 5.0 36.25
56.0 4 406.0 1 4

22355 GARCWSKI 04 7.45 1 .5 11.18

04 7.45 l .5 11.10
04 7.45 1.5 11.18
4.5 4 33.54 4

2 236 0 HENOERSON 02 6.15 8.0 49.20

WEEKLY WAGE REP 0 R T PAGE 2

NAME JOB RATE HOURS WAGE

EMPLOYEE

HENDERSON 02 6.15 8.0 49.20 Ag4.ee4 with

2236C
02 6.15 8.0 49.20 expected
02 6.15 8.0 49.20 WMlCU {on
02 6.15 8.0
40.0 4
49.20
246.00 4 _, Emp. 22360

^4 7 3.9) 4 * <^3.227.23~>** Total

Agmz-i ullth "Total Hu" in cxpectco
flUul-ti — checked

OUTPUT RUN *2 WEEKLY WAGE REP CRT PAGE l

EMPLOYEE NAME JOB RATE HOURS WAGE

ANOEfiSON 04 7.45 10.5 70.23

11111
01 7.25 2 1.5 155.86
01 7.25 31 .5 228.38
01 7.25 10.5 76.13
04 7.45 10.5 78.23
84.5 4 616.e5 4

BROWN 02 6.15 40 . C 246.OC

22222
INVALID RECORD CODE
22222 BROWN
C2 6.15 50.0 307.50
JOB NO. NOT IN TABLE
22222 BROWN
RECORD OUT OF SEQUENCE
11111 ANDEPSO N
02 6.15 40.0 246.00
130.0 4 799.50 4

2 14.5 4 * 1.416.35 44

181
182 STRATEGY, STYLE, AND STANDARDS

DEBUGGING TIPS

"Preventative programming” can minimize the bugs in the program. A recom¬

mended approach is to organize the program into logical segments—a main logic
routine to handle input processing, and various subroutines, each containing related
processing. With such an approach, we are more likely to keep a firm grip on the
logic, and can more readily locate execution bugs.
When using subroutines, be especially careful in the use of registers. If all
subroutines are at the same "level”, then the main logic could link to every sub¬
routine using the same register, as:

BAL 9,subroutine

Sometimes, however, it is necessary to link from one subroutine to another. In large

programs, the linkage can become complex and confusing. Doublecheck the link¬
age, and ensure that the return register is the correct one.

PROBLEMS
8-1. Three programming objectives are accuracy, efficiency and clarity. Discuss the
significance of each objective.
8-2. What are the advantages (if any) of organizing a program into subroutines?
8-3. Consider the following code. Is there a bug? If so, explain.

BALR 3,0
USING *,3

BAL 3,P10PAGE P10PAGE •

BR 3
8-4. Consider the following code. If there is a bug, explain.

BALR 3,0
USING *,3

BAL 5,P10PAGE P10PAGE

BR 3
8-5. What are the features of "structured programming” that can be applied to
Assembler programs? eu lo
8-6. What are the purposes (if any) of program documentation?
8-7. Revise a previous program, organizing it into a main logic routine and various
broutines, each containing related processing, in a logical sequence.
 PART III

BINARY OPERATIONS
 CHARTER 9

REGISTERS AND BINARY

PROGRAMMING

Chapter 6 introduced registers and their use in base addressing. The registers may
also perform binary arithmetic and manipulate data in binary format. Indeed, binary
arithmetic is done only in the general registers, and conversely the registers perform
arithmetic only in binary format. This chapter covers basic binary and register oper¬
ations: first, defining of binary data and then the instructions for binary arithmetic.
Binary data may enter the program from sources such as:

— Defined in storage as a constant, as binary (B-type), fullword (F-type), and

halfword (H-type).
— Generated in a register by such operations as CVB, LA, BAL, EDMK.
_ Received from external input such as disk or tape where the data was written in
binary format.

Although processing binary data in registers is extremely fast, there may be

additional steps converting data from character input to packed and to binary, and
then into printable format: binary to packed to edited character. Binary format does
have useful applications, however, especially in manipulating addresses for table
searching, as covered in the next chapter.

185
186 REGISTERS AND BINARY PROGRAMMING

BINARY DATA REPRESENTATION

Binary numbers, whether defined in storage by constants of types B, F, and H, or used

in the general registers, have the following features:

1. For reference, hits are numbered from left to right, with the leftmost bit numbered
zero:

Binary value: 00000000

Position: 01234567 etc.

2. The sign is the leftmost bit, position zero: a 0-bit indicates a positive value, and a
1-bit indicates negative. A zero value is always positive.
3. The rules of binary addition are:

0 + 0 = 0 i+i=io
0+1=1 1+1+1=11

For simplicity, the following examples of decimal and binary addition assume
5-bit fields, with the leftmost bit the sign:

DEC BINARY DEC BINARY DEC BINARY

4 0 0100 7 0 0111 7 0 0111
+2 0 0010 +2 0 0010 +7 0 0111
6 0 0110 9 0 1001 14 0 1110

4. Negative numbers are expressed in what is called two's complement form To

obtain a negative binary number, reverse all the bits of its positive value (a 0-bit
becomes 1 and a 1 -bit becomes 0), then add 1. The same procedure converts
negative values to positive values. For example, what is the binary representation
of-7, assuming a 5-bit field?: H °n

Decimal value 7 = 0 0111

Reverse bits = 1 1000

■t
Add 1 = i iooi
(two's complement representation of -7)

sign bit

5. For subtraction, the field being subtracted is

converted to its two's complement,
and then added:

Decimal value 7 0 0111 0 0111

Subtract ^5 = -0_0101 = 1 1011
(add two's complement of 5)
Result __2 0 0010
(binary value 2)
187 Binary Constants

Note that there is a carry into and out of the sign position. Where there is both a
carry into and out of the sign bit, the result is correct, not an overflow.
6. Invalid overflows occur on the following conditions:
a. Overflow caused by carry into the sign position:

Decimal value 9 0 1001

Add +9 = 0 1001
Result 18 1 0010 (negative value, minus 14)

There is a carry into the sign position, and none out of it. The sum is an
incorrect negative value. (To determine the value of 1 0010, reverse the bits (0
1101), then add '1' (0 1110). Since this value is +14, then 1 0010 has a value
of —14, but was supposed to be +18.)
b. Overflow caused by carry out of the sign position:

Decimal value -9 1 0111

Add +(—9) = 1 0111
Result -18 0 1110 (positive value, plus 14)

There is no carry into the sign position but one out of it. The sum is an
incorrect positive value, +14 instead of -18.

Problem 9-1 should now be done.

BINARY CONSTANTS

Both DS and DC may define a binary field. There are three types: B (ordinary binary),
F (fullword fixed-point), and H (halfword fixed-point). The following sections de¬
scribe DC's; DS statements are written similarly except that the constant is optional
and acts as a comment.

BINARY CONSTANT—B. Type B constants contain binary ones and zeros. A

common use is for immediate operands for instructions such as Nl, Ol, XI, and TM,
covered in a later chapter. Although the format has some specialized uses, its use is
limited by the fact that the binary instruction set is designed to work better with F and
H formats.

NAME OPERATION OPERAND

[symbol] DC dBLn'constant’

Optional: d = duplication factor.

Required: B specifying binary constant.
188 REGISTERS AND BINARY PROGRAMMING

Optional: Ln = length of the field in bytes, maximum 256.

Required: 'constant,' containing ones and zeros. If the length of the defined constant
is different from the specified length (Ln), the Assembler pads or truncates
the constant on the left.

Example B-format declaratives:

LENGTH DECIMAL
IN BYTES ASSEMBLED AS VALUE
BIN1 DC B‘00010011 ’ 1 00010011 19
BIN2 DC BLI‘110’ 1 00000110 6
BIN3 DC BL2‘100010011’ 2 00000001 00010011 275

BINARY (FIXED-POINT) CONSTANTS—F AND H. Fixed-point constants are

commonly used in register arithmetic.

NAME OPERATION OPERAND

dPconstant’ (Fullword)
Isymbol] DC dHconstant’ (Halfword)

Optional: d = duplication factor.

Required: Type: F = Fullword (4 bytes) and H = Halfword (2 bytes). For F-type, the
Assembler generates a binary constant in a 4-byte field, aligned on a
fullword boundary (a storage address evenly divisible by four). For
H-types, the Assembler generates a 2-byte constant aligned on a
halfword boundary (a storage address evenly divisible by two). These are
the normal required formats for binary arithmetic.
Required: 'constant', containing a decimal number which the Assembler converts
to a binary number. If the length of the constant is greater than the
explicit or implicit length, the Assembler truncates it on the left.

With bit 0 (the leftmost bit) as the sign, maximum and minimum values are:

BITS MAXIMUM MINIMUM

Halfword 16 215-1 = 32,767 ~2 15 = -32,768
Fullword 32 23i-l = 2,147,483,647 -23i = -2,147,483,648

Figure 9-1 depicts Fullword and Halfword declaratives.

BiNVALI is a DS that simply causes the location counter to align on a fullword

boundary. (Check the hex address for the statement.)
BINVAL2 defines a 2-byte field aligned on a halfword boundary.
189 Binary Constants

24 *

25 * DS £ DC FULLWORD £ HALFWORD DECLARES

26
0038 34 27 RINVAL1 DS OF SETS LOC'N CONTER TO FULLWORD ADDR.
003834 28 BINVAL2 DS H A HALFWORD AREA
003838 29 BINVAL3 DS 3F 3 FULLWORD AREAS
003844 0019 30 BINVAL4 DC H1 25 1 A HALFWORD WITH POSITIVE VALUE
003846 0000
003848 FEFEFFFR 31 8INVAL5 DC F i -5 i A FULLWORD WITH NEGATIVE VALUE
00384C 8001 32 BINVAL6 • DC H 1 32769• CONSTANT EXCEEDS MAXIMUM 32767
*** ERROR

FIGURE 9-1 Defining Fullword and Halfword constants.

BINVAL3 defines three adjacent fullwords; a reference to the name BINVAL3 is to

the first fullword.
BINVAL4 is a halfword that defines the decimal value 25. The Assembler converts 25
to a binary value 00011001, shown in object code on the left as X'l 9'.
BINVAL5 defines a fullword containing —5. Note the two's complement of 5 in
object code. Try converting binary +5 (00000101): flip the bits (11111010), add
'V (11111011), which equals X'FB'.
BINVAL6 depicts an error in coding: the halfword defines a value exceeding 32,767.
The Assembler generates an error message and truncates the leftmost bits chang¬
ing the value of the field. In terms of dollars and cents, the maximum halfword
value is $327.67, a trivial amount in many computer problems, and is easily
exceeded.

There may be occasions when it is necessary to define a binary H or F field

without the Assembler's alignment. One case occurs when an input or output record
for tape or disk contains a binary field. Consider the following input record:

LOC
8420 RECORDIN DS 0CL29
8420 ACCTIN DS CL5
8428 AMTIN DS F (F-format causes alignment here)
842C NAMEIN DS CL20

In the example, the Assembler location counter for ACCTIN is at X'8420'. Since
it is a 5-byte field, the next field (AMTIN) would normally begin at 8425. But AMTIN
is defined as DS F, so the Assembler aligns its address on a fullword boundary
following: 8428. There are now three “slack” bytes between the two fields, causing
the record to be defined with 32 bytes instead of the expected 29. Unfortunately, an
input operation would read the 29-byte record byte-for-byte beginning at RECORD-
IN. The first three bytes of the binary amount will be in the slack bytes, and the
program will reference incorrect data in AMTIN and NAMEIN.
A simple remedy is to code the binary fullword as FL4 rather than F. If a
fullword or halfword declarative contains a length (Ln), the Assembler does not align
the field.
 190 REGISTERS AND BINARY PROGRAMMING

ADDRESS CONSTANTS—A. It is often necessary to define the address of a declar¬

ative or of an instruction. For example, BALR initializes the first base register. Ad¬
dress constants may be used to initialize additional base registers. Of the four types of
address constants, this chapter discusses only the common A-format.

NAME OPERATION OPERAND

Isymboll DC A(address-1,address-2,.. .,address-n)

The rules for A-type constants are:

1. The address constant is enclosed within brackets. We may define more than one
address, each separated by a comma. The constant may be either an absolute
value (rarely used) or a symbolic name.
2. The Assembler generates a fullword constant, aligned on a fullword boundary
(provided no length indication is codedT The constant is right-adjusted in the
field. The maximum value is 231-1 (the highest fullword value).

Figure 9-2 gives a number of examples. (At A10, the LM instruction loads the
three addresses into registers 4, 5, and 6. A later section describes this way to
initialize base registers.)

ADDRESS! depicts an address constant with an absolute value. Absolute addresses

are rarely defined, since we do not normally know where the Assembler assigns
addresses or where the program resides for execution.
ADDRESS2 defines the address of DECLAR. The object code hex value generated by
the statement (X'3806'), is the same as the hex address of DECLAR.
ADDRESS3 defines the address of A10. Compare the object code address constant
with that of the actual address of A10.

4 *
5 * DC ADDRFSS CONSTANTS
6
0 03 ft 00 0S30 7 BEGIN ralr 3,0 INITIALIZE BASF REGISTER 3
8 USING *,3,4,5,6
00380? 9846 30?6 ASSIGN BASE REGISTFRS
9 A10 LM 4,6,ADDRESS5 LOAD REGISTERS 4, 5, 6
10 * •

11 *
003806 C1C4C4D9C5E?F?40 1? DECLAR DC C1ADDRFSS CONSTANTS
0 03 8 OF C3D6D5E?F3C105E3
003816 F?
003817 00
003818 00004F20 13 A DDR F SSI DC A(20000 ) ADDRESS OF 20000
0 0381C 00003806 14 ADDRFSS2 DC A(DECLAR )
003820 00003802 ADDRESS OF DECLAR
15 ADDRFSS3 DC A( A10 )
0038 ?4 0000480? ADDRESS OF A10
16 ADDRESS4 DC A(A10+4096) ADDRESS OF A10 + X’10001
003828 0000480200005802 17 ADDRFSS5 DC A ( A 10 + 409 6, A 10+2*40' t A 10+3*409 6) A10 + X11000' ,
003830 0000680?
18 *
A 1 0 + X12000' , A 10+ X'3000'

FIGURE 9-2 Defining address constants.

191 Conversion of Decimal and Binary Data—CVB and CVD

ADDRESS4 illustrates a relative address, A10+4096. The Assembler converts the

decimal value 4096 to X'l 000'. Therefore, the object code address is X'3802' +
X'1000', or X'4802'.
ADDRESS5 illustrates three address constants, separated by commas. Note the use of
Assembler arithmetic: 2*4096 = 8192.

Note on Alignment: On the 360, instructions such as CVB and CVD

require doubleword alignment; L, A, C, M, and D require fullword align¬
ment; and those like LH, AH, and CH require halfword alignment. The
purpose, especially on larger models, was to ensure faster processing of
binary operations. On the 370, such alignment is not necessary—
operand-2 of these instructions need not reference an aligned storage
location during execution. However, if the instructions are aligned, they
will require fewer machine cycles and will execute faster. This text there¬
fore recommends providing for alignment on the 370. (On the 370, only
channel command words and operands of certain privileged instructions
must align on integral boundaries.)

CONVERSION OF DECIMAL AND BINARY DATA—CVB AND

CVD
Convert to Binary, CVB, converts packed decimal data in storage into binary in a
register. The packed data must be contained in a doubleword field (8 bytes), aligned
on a doubleword boundary (evenly divisible by eight). For this purpose, the defini¬
tion DS D is often conveniently used. (A D-type DC normally defines floating-point
values, but a DS may store data in any format.) Similarly, Convert to Decimal, CVD,
converts binary data in a register into packed decimal in storage, also defined as a
doubleword.

NAME OPERATION OPERAND

[symbol] CVB R1,X2 or R1,D2(X2,B2)

[symbol] CVD R1 ,X2 or R1,D2(X2,B2)

For both operations, operand-1 specifies a general register, and operand-2 references
a storage location defined as a doubleword, aligned, containing packed data. Note a
significant difference. CVB converts data from operand-2 (storage) to operand-1 (a
register); CVD converts data from operand-1 (a register) to operand-2 (storage). We
can use CVB to convert packed to binary in a register, perform binary arithmetic, use
CVD to convert back to packed, and then edit for printing.
In Figure 9-3, the packed field, AMTPK, is moved to a doubleword field,
DBFWD1. CVB converts the packed contents of DBFWD1 into binary format in
register-6. CVD converts the binary contents of register-6 into packed format in a
doubleword, DBFWD2.
192 REGISTERS AND BINARY PROGRAMMING

37 *
38 * CVB CONVERT TO BINARY
39 *
00384E F87 1 305E 40 ZAP DBLWD1,AMTPK MOVE TO DOURLE WORD
003854 4 F 60 305E 41 CVB 6,DBLWD1 CONVERT DBLWD1 TO BINARY

43 *

44 * CVD CONVERT TO PACKED DECIMAL

45 *
003858 4F60 3066 46 CVD 6, DBLWD2 CONVERT BINARY TO PACKED
47 *
48 * •

49 * •

003R5C 125C 50 AMTPK DC P'125’

003860 51 DBLWD1 DS D ALIGNED DOUBLEWORD
003868 52 0BLWD2 DS D ALIGNED DOUBLEWORD

FIGURE 9-3 Conversion of packed and binary data: CVB, CVD.

LOADING REGISTERS—L, LH, LR, LM, LA

To load binary fullwords and halfwords in registers, we use load operations. The
most common load instructions are L (Load Fullword), LH (Load Halfword), LR (Load
Register), LM (Load Multiple), and LA (Load Address). These do not set the condition
code. The next section gives a number of less-used Load operations: LCR, LNR, LPR,
and LTR.

NAME OPERATION OPERAND

L R1,X2 or R1,D2(X2,B2)
LH R1.X2 or R1 ,D2(X2,B2)
[symbol] LR R1.R2
LM R1.R3.S2 or R1,R3,D2(B2)
LA R1.X2 or R1,D2(X2,B2)

LOAD FULLWORD—L. The L operation loads a binary fullword value into a reg¬
ister. The rules are:

1. Operand-1 specifies any general register.

2. Operand-2 references a fullword in storage, aligned on a fullword boundary.
Typically we use a declarative or literal with F-format.
3. The contents of the fullword are loaded into the register, replacing the previous
contents.

Figure 9-4 illustrates four L operations, under LOADFULL. The first loads a
fullword literal into register-2. (The Assembler aligns H and F literals the same as
declaratives.) The second example loads the fullword FULWRD1 into register-8. The
third depicts a coding error: operand-2 is a halfword literal rather than a fullword.
(The Assembler does not generate an error message, even if the literal is not a
fullword. The error occurs at execute-time, when the computer loads the halfword
193 Loading Registers—L, LH, LR, LM, LA

plus the following two bytes.) The fourth example loads a literal address constant into
register-5.

LOAD HALFWORD—LH. LH is similar to L, with the following differences:

1. Operand-2 specifies a halfword aligned on a halfword storage boundary. LH loads

its contents into the operand-2 register.
2. LH expands the halfword to a fullword by propagating the sign-bit through the 16
leftmost positions, in the register. If the halfword is negative, LH fills 1-bits to the
left, maintaining the correct two's complement value.

Figure 9-4 depicts LH under LOADHALF. The first example loads a halfword
literal into register-9. The second loads a halfword constant into register-0. The third
example illustrates a coding error: operand-2 is a fullword rather than a halfword.
Again the Assembler does not generate an error message. At execute-time LH loads
only the leftmost two bytes of the fullword into register-8, causing an error that may
be difficult to locate.

LOAD REGISTER—LR. Both operands reference a register. LR loads the contents of

the register specified by operand-2 into the operand-1 register. Figure 9-4 illustrates
the LR operation under LOADREG. First an L instruction loads a fullword into
register-8. Then LR loads the contents of register-8 into register-7.

LOAD MULTIPLE—LM. LM can load more than one register in one operation. LM
is an RS-format instruction, with three operands. The rules are:

1. Operands 1 and 2 each specify a register. They represent a span of registers. That
is, 8,10 means registers 8 through 10, or 8, 9, and 10.
2. Operand-3 references a fullword address in storage, the first of a number of
adjacent fullword values—one for each register that LM is to load successively
into the designated registers.

Figure 9-4 illustrates LM under LOADMULT. The first example loads registers
6, 7, and 8 with FULWRD1, FULWRD2, and FULWRD3 respectively. The second
example shows how the registers may “wrap around". Because registers 15 through
1 are referenced, LM loads registers 15, 0, and 1 with the fullwords.
LM has two common uses. One is to restore registers that were saved when the
program links to a subprogram (covered in Chapter 15). The other use is in base
register initialization. We have used BALR to initialize the first base register. LM may
load subsequent registers with base addresses, although LM is restricted to sequential
register loading. Figure 9-2 gave an example of the use of LM to load base registers 4,
5, and 6. But watch out—after the BALR only base register-3 is initialized, and the LM
will execute correctly only if the constant ADDRESS5 is defined within the first 4K of
the program.
194 REGISTERS AND BINARY PROGRAMMING

55 £ -
56 * L LOAD FULLW0RD DECIMAL
57 * - REG: VALUE
003870 5820 3 1A 6 58 L0ADFUIL L 2 » =F *123456* 2: 123456
003874 5880 309A 59 L 8.FULWRD1 8: 6936
003878 5810 3 1AE 60 L 1 ,=H*287* ERROR: OP-2 SHOULD RE FULLW0RD
00387C 5850 31 AA 61 L 5 * = A(TABL E) 5: ADDRESS OF TABLE

63 A —-

64 « LH LOAD HALFWORD
65 * -
003880 4890 31 B0 66 L0ADHALF LH 9,=H * 500* 9: 0500
003884 4800 3098 67 LH 0 t HAL FWRD1 0: 0595
003888 4880 309 A 68 LH 8,FUL WRD1 ERROR: OP-2 SHOULD BE HALFWORD

70 *
71 * LR LOAD REGISTER
72 *
00388C 5880 309 E 73 LOADREG L 8 >FULWRD2 8 : 7+174
003890 1878 74 LR 7,8 7: 4174

76 *
77 * LM LOAD MULTIPLE
78 *
79 LOADMULT LM 6,8,FULWRD1 6: 6936 7: 4174
003892 9868 309 A 8: 5637
80 LM 15,1,FUL WRD1 15: 6936 0: 4174
003896 9 8 F1 309A 1: 5637
00389A 0253 82 HALFWRD1 DC H * 59 5 '
00389C 00001B1R 83 FULWRD1 DC F *6936*
00 3 8AO 0000104E 84 FULWRD2 DC F *4174*
0038A4 00001605 85 FULWRD3 DC F *5637'
0038A8 86 TABLE DS 50CL5
0039A8 87 L TORG
00 39 A 8 0001E 240 88 = F'123456 *
0039 AC 00 00 38A 8 89 = A(TABLE )
0039B0 011 F 90 = H’2 87 '
0039B2 01 F4 91 =H* 500'

FIGURE 9-4 Load register operations: L, LH, LR, LM.

LOAD ADDRESS—LA. Load Address is a convenient RX instruction to load base

registers and to initialize an address in a register for table look-up. The rules are:

1. Operand-1 specifies any general register.

2. Operand-2 contains a storage address of the form D2(X2,B2).
3. LA loads the operand-2 address into bits 8-31 of the operand-1 register and clears
bits 0-7 to zero. The 24 bits used give a maximum address of 224—1

The following illustrates several uses of LA:

1. LA 9,A10: Assume AI0 is subject to base register-3 containing X'4200' with a

displacement of X 0660'. The object code instruction is
195 Loading Registers—L, LH, LR, LM, LA

41 90 36 60
(a) (B) ©
©
(a) The machine language code for LA is X'41'.
(B) The operand-1 register is 9.
(c) There is no index register signified.
(§) The base register is 3 and displacement is 660.
The instruction adds the contents of the base register (X'4200') plus the displace¬
ment (X 0660 ). The sum X'004860', the address of A10, is loaded into register-9.
2. LA 9,5(0,0): This example illustrates explicit use of base/displacement. (The next
chapter covers this practice more fully.) The object code instruction
is 141 | 90 | 00 | 05 | —assume no base register, no index register, but load the
displacement X'005'into register-9. In effect, the value 5 loads into register-9.
Note: The 5 is a displacement, not a register.
3. LA 9,5: The Assembler treats operand-2 as if it were coded like example-2:5(0,0).
This is a convenient way to load a value into a register, up to a maximum
displacement of 4095.
4. LA 9,1 (0,9): The generated object code is | 41 | 90 1 90 1 01 —load the con¬
tents of "base" register-9 plus a displacement of 001 into register-9. In effect, the
contents of register-9 are incremented by 1. This method of adding to a register,
although efficient, works only for increments up to 4095 (the maximum displace¬
ment), and only if the value in the register is positive and does not exceed 24
bits (because LA clears bits 0-7 to zero).

Figure 9-5 illustrates an efficient way to load additional base registers by means
of the index register feature. The program is assumed to load at X'4800'. BALR loads
register-3 with X'4802'. We now want to load registers 4, 5, and 6 with each base
address successively containing X'5802', X'6802' and X'7802'. We first load 2048 or
X'0800' into register-6. We then load register-4 with:

Contents of base register-3 X'4802'

Contents of index register-6 X'0800'
Displacement X'0800'
Total generated address X'5802'

004800 2
3 *
START X'4800'
REG-3 REG-4 REG-5 REG-6

004800
004802
004802
0530

4160 0800
68
4 *
5

7
BALR
USING
LA
3,0
*,3,4,5,6
6,2048
4802

4802 0800

10
004806 4146 3800 LA 4,2048(6,3) 4802 5802 0800
00480 A 4156 4800 9 LA 5,2048(6,4) 4802 5802 6802 0800
00480E 4166 5800 LA 6,2048(6,5) 4802 5802 6802 7802

FIGURE 9-5 Initialization of four base registers with LA.

196 REGISTERS AND BINARY PROGRAMMING

(In hex, 800 + 800 = 1000.) Check the generated object code for each LA operation.
Registers 5 and 6 are loaded accordingly.

Note: LA is a "logical" instruction (like MVC and CLC) that treats data
as unsigned.

OTHER LOAD OPERATIONS—LCR, LNR, LPR, LTR. There may be occasional use
for these load register (RR) instructions. Each sets the condition code.

LOAD COMPLEMENT—LCR. LCR loads the contents of the operand-2 register (R2)
into the operand-! register (R1), and reverses the sign.

LCR 5,8 Load the contents of register-8 into register-5, reverse the sign, and set
the condition code.

LOAD NEGATIVE—LNR. LNR loads the contents of R2 into R1 and sets the value
to negative. The condition code is set to 0 (zero) or 1 (nonzero minus).

LNR 5,5 Load the contents of register-5 into register-5, force a negative sign, and
set the condition code.

LOAD POSITIVE—LPR. LPR loads the contents of R2 into R1 and sets the value to
positive. The condition code is set to 0 (zero) or 2 (nonzero plus).

LPR 9,7 Load the contents of register-7 into register-9, force a positive sign, and
set the condition code.

LOAD AND TEST—LTR. LTR loads the contents of R2 into R1, just as LR, but in
addition sets the condition code for zero, minus, and plus.

LTR 4,4 Load the contents of register-4 into register-4 and set the condition
code. This example sets the condition code only, a useful technique to
test a register's contents for sign.

STORE REGISTER OPERATIONS—ST, STH, STM

We use store operations to store or "save" the contents of registers. A large program
may require the use of many registers for base addressing, binary calculations, sub¬
routines, and input/output operations. It is necessary then to save the contents of
registers, use them for other purposes, and then use L or LM to reload them

NAME OPERATION OPERAND

ST R1,X2 or R1,D2(X2,B2)
[symbol] STH R1,X2 or R1,D2(X2,B2)
STM R1,S2 or R1,R3,D2(B2)
197 Store Register Operations—ST, STH, STM

The Store operations, ST, STH, and STM, are effectively the reverse of L, LH,
and LM, respectively. They store the contents of registers in storage, on fullword or
halfword boundaries. Note that like CVD, these store instructions move the contents
of operand-1 (a register) to operand-2 (storage).

STORE—ST. ST stores the contents of the operand-1 register (R1) into the fullword
in storage referenced by operand-2. The fullword should be aligned on a fullword
boundary.

STORE EIALFWORD—STH. STH stores the rightmost 16 bits of R1 into the

operand-2 halfword, aligned in storage.

STORE MULTIPLE—STM. R1 and R3 specify the span of registers to be stored. STM

stores the fullword contents of R1 and the fullword contents of each register up to and
including R3 consecutively starting with the operand-2 address. If R1 references a
higher register than R3 (such as 14,3) then the registers stored are 14, 15, 0, 1,2,
and 3.
Figure 9-6 illustrates the Store operations. LM initializes registers 4, 5, and 6
with fullword values. In STORE1, the Store (ST) instruction stores the contents of
register-5 in the fullword SAVEFULL. In STORE2, STH stores the rightmost 16-bit
contents of register-6 in the halfword SAVEHALF.
In STORE3, the first STM stores the contents of registers 4, 5, and 6 in three

0039B4 00000675 96 FULLA DC F'1653'

0039B8 00000138 97 OC F ' 312 '

101100102
0039BC 00002103 98 DC F • 8451'
0039 CO 99 SAVEFULL OS F
0039C4 SAVEHALF OS H
0039 C 8 THREEFW OS 3F
FIVEFW OS 5F
003904
0039E8 9846 3 IB2 103 LM 4,6,FULLA REGS 4,5,6 : 1653, 312, 8451

105 *
106 * ST STORE FULLWORD
107 *
0039EC 5050 31BE

1111112
108 ST0RE1

10
ST 5 , SAVEFULL SAVEFULL : 312

0039F0 4060 3 1C 2 113

115
*
*
ST0RE2

*
STH

STH 6
STORE HALFWORD

,SAVEHALF SAVEHALF : 8451

116 STM STORE MULTIPLF

117 *
0039F4 9046 3 1C 6 118 ST0RE3 STM 4,6,THREEFW THREEFW : 1653, 312, 8451
1 19 STM 15,3,FIVEFW FIVEFW RECEIVES CONTENTS OF
0039F8 90F3 3102 * REGISTERS 15,0,1,2,3

FIGURE 9-6 Store register operations: ST, STH, STM.

198 REGISTERS AND BINARY PROGRAMMING

fullwords labelled THREEFW. The second STM stores the contents of registers 1 5, 0,
1, 2, and 3 in five fullwords labelled FIVEFW.

Problems 9-2 and 9-3 should now be attempted.

BINARY ARITHMETIC—A, S, AH, SH, AR, SR

The following instructions perform binary addition and subtraction in registers. These
operations all treat the leftmost sign bit as a plus or minus sign, not data.

NAME OPERATION OPERAND

A R1.X2 or R1,D2(X2,B2)
S R1.X2 or R1,D2(X2,B2)
AH R1.X2 or R1,D2(X2,B2)
[symbol) SH R1.X2 or R1,D2(X2,B2)
AR R1,R2
SR R1.R2

For valid results, all data must be in binary format. These instructions all set the
condition code (to zero, minus, or plus), which the usual BC operation may interro¬
gate.

ADD AND SUBTRACT—A AND S. Operand-1 references a register. Operand-2

references a storage location aligned on a fullword boundary, containing data in
binary format. All 31 data bits of the fullword are algebraically added to or subtracted
from the contents of the register.

ADD AND SUBTRACT HALFWORD—AH AND SH. Operand-1 references a reg¬

ister, and operand-2 references a storage location aligned on a halfword boundary
containing binary data. Before the add or subtract, the halfword is expanded to a
fullword by filling the sign-bit through the 16 leftmost bit positions. All 31 data bits
are then algebraically added or subtracted, as A and S. Remember that a halfword
has a maximum of 32,767.

SUBTRACT REGISTER-AR AND SR. Both operands reference a reg¬

ister. All 32 bits of operand-2 are algebraically added or subtracted from operand-1.

^ 9'7 the preceding. Each example is unrelated to the others

Note that because of the rules of halfword and fullword alignment for RX instruc¬
tions, we define binary fields in H and F format, not B. In ADDFULL, a fullword
199 Binary Comparison—C, CH, CR

7
8 4 A ADD FULLWORD DECIMAL
9 4 S SUBTRACT FULLWORD VALUE :
10 4
003002 5850 4 02 A 11 ADDFULL L 5 , FWD1 REG-5: 125
003006 5A 50 402E 12 A 5,FWD2 REG-5: 195
00300A 5B50 4046 13 S 5,=F'50' REG-5: 145

15 4
16 4 AH ADD HALFWORD
17 4 SH SUBTRACT HALFWORD
18 4
00300E 5880 402A 19 ADDHALF L 8,FWD1 REG-8: 125
003012 4 A 8 0 4 04 A 20 AH 8,=H'50’ REG-8 : 175
003016 4 B 80 404C 21 SH 8, = H'25 ' REG-8: 150

23 4
24 4 AR ADD REGISTER
25 4 SR SUBTRACT REGISTER
26 4
00301 A 4F10 4036 27 ADDREG CVB 1rDBPKl REG-1: 250
00301E 4F00 403F 28 CVB 0»DBPK2 REG-0: 075
003022 1A0 1 29 AR 0,1 REG-0: 325
003024 1B 11 30 SR 1,1 REG-1: 000
003026 4E00 4036 31 CVD O.DBPKl CONVERT 325 TO PACKED

00302 A 0000
00302C 00000070 33 FWD1 DC F' 125' BINARY FULLWORD
003030 00000046 34 FWD2 DC F ' 70' BINARY FULLWORD
003038 35 DS OD FORCE DOUBLEWORD ALIGN
003038 000000000000250C 36 DBPK1 DC PL 8'2 50 ' PACKED VALUE
003040 000000000000075C 37 DBPK2 DC PL8'075' PACKED VALUE
003048 38 LT0RG
003048 00000032 39 =F'50'
00304C 0032 40 =H’50'
00304E 0019 41 = H'2 5'

FIGURE 9-7 Binary addition and subtraction.

containing 125 (in decimal notation) is loaded into register-5. Afullword containing
70 is added, and a fullword literal containing 50 is subtracted. Although notation is in
decimal format for ease of reading, the fields and registers actually contain binary
values.
In ADDHALF, a fullword is loaded into register-8, a halfword is added, and a
halfword is subtracted. In ADDREG, two packed fields are defined as doublewords.
DS 0D forces alignment on a doubleword boundary. The packed values are con¬
verted to binary in registers 0 and 1. (These registers should be used only for tempor¬
ary calculations.) AR adds the contents of register-1 to register-0. Then SR clears
register-1, and CVD converts the contents of register-0 to packed format.

BINARY COMPARISON— C, CH, CR

These operations compare binary data, just as CLC compares character data, and CP
compares packed data. Each of these operations algebraically compares the contents
of operand-1 to operand-2, and sets the condition code (to equal, low, or high).
200 REGISTERS AND BINARY PROGRAMMING

NAME OPERATION OPERAND

C R1.X2 or R1,D2(X2,B2)
1 symbol! CH R1.X2 or R1,D2(X2,B2)
CR R1.R2

COMPARE—C. Operand-! references a register. Operand-2 references a fullword

aligned on a fullword boundary, containing binary data.

COMPARE HALFWORD—CH. Operand-2 references a halfword, aligned on a

halfword boundary containing binary data. Before the compare, CH expands the
halfword to a full word by filling of the sign-bit value through the leftmost 16 bits.

COMPARE REGISTER—CR. Both operands specify a register. CR compares the

contents of operand-! to that of operand-2.

Figure 9-8 illustrates compare operations. Note how each sets the condition
code. COMP1 loads a fullword FWD3 into register-6. C then compares register-6 to
the contents of FWD4 in storage. COMP2 loads a halfword HWD1 into register-7
and compares its contents to HWD2, another halfword in storage. COMP3 loads
FWD3 into register-8 and a fullword literal into register-9. Then CR compares reg¬
isters 8 and 9.

46 *

66
47 * c COMPARE FULLWORD DATA C0ND'N
48 * CODE :
003050 5860 406A 49 COMP 1 L ,FWD3 _
003054 5960 406E 50 C ,F W D4 1250 < 2575 LOW

52 *
53 * CH COMPARE HALFWORD
54 *
003058 4870 4072 55 C0MP2 LH 7,HWD 1
00305C 4970 4074 56 CH 7,HWD2 365 > 215 HIGH

58 *
59 * CR COMPARE REGISTERS
60 *
003060 5880 406A 61 C0MP3 L 8 » FWD3
003064 5890 4076 62 L 9,=F'975'

00306A
00306C
003070
0000
003068 1989

00000
000004 E?
A0 F
63

6668
65 FWD3
FWD4
CR

DC
8,9

F'1250
1250 > 975 HIGH

DC F'2575
003074 016D 67 HWD 1 DC H'36 5'
003076 00D7 HW02 DC H'215 '
003078 69 LT0RG
003078 000003C F 70 =F•975

FIGURE 9-8 Binary compare operations: C, CH, CR.

201 Multiplication—M, MH, MR

MULTIPLICATION—M, MH, MR

M, MH, and MR multiply fields in binary format. They do not set the condition code.

NAME OPERATION OPERAND

M R1.X2 or R1,D2(X2,B2)
[symbol] MH R1.X2 or R1 ,D2(X2,B2)
MR R1 ,R2

Certain binary operations require a pair of registers to express values greater than
231-1- A double register permits values up to 263-1. The registers are an even-odd
numbered pair, such as 4 and 5, or 8 and 9, with the sign bit in the leftmost bit of the
even register.
Both M and MR require an even-odd pair of registers. We load the multiplicand
into the odd-numbered register. The product is developed in the pair of registers,
with one sign bit and 63 data bits. For most multiplication operations, the product
never exceeds 231 — 1 or 2,147,483,647.* Therefore only one register (the odd one) is
sufficient to contain the product. In this case, the leftmost bit of the odd register
contains the correct sign, the same as that of the even register. Provided we are sure
the product cannot exceed 231-1, we may treat the value in the odd register as the
correct signed product.

EVEN REGISTER ODD REGISTER

Before the M or MR: (Garbage) Multiplicand

After the multiply: (Product) Product

MULTIPLY FULLWORD—M. Operand-1 specifies the even register of an even-odd

pair. The odd register contains the multiplicand. Operand-2 references a fullword in
storage, aligned, containing the multiplier in binary format. The product is developed
in the even-odd pair, and erases the multiplicand. Note: The even register need not
be initially cleared to zero (M ignores its contents).

MULTIPLY HALFWORD—MH. MH is similar to M, with the following exceptions:

1. Operand-1, the mutiplicand, specifies any register, not necessarily an even one.
The mutiplicand is assumed to be 31 data bits.

*When we compute averages and ratios, a value such as 21,474.83647 may be easily
exceeded. Ensure that such a value is not exceeded regardless of the decimal position
(see Double-precision in a later section).
 202 REGISTERS AND BINARY PROGRAMMING

2. Operand-2 references the multiplier—a halfword of binary data aligned on a

halfword boundary in storage.
3. On execution, MH expands the halfword to a fullword by filling the sign-bit
value through the 16 leftmost bits. The 32-bit product is developed in the
Operand-1 register only, and erases the multiplicand.

MULTIPLY REGISTER—MR. MR is similar to M except that operand-2 references

a register containing the multiplier. We may load the multiplier in the even register,
although the product erases it.
Figure 9-9 provides examples of multiply operations. In MULTI, the even-
odd pair of registers is 4 and 5. The fullword MULTCAND is loaded into reg¬
ister-5. The Load instructions are for data in binary format, and CVB if in
packed. To multiply, we specify the even register (4) in operand-1. Operand-2
specifies the fullword multiplier in storage. The product is generated in registers 4
and 5.
MULT2, because MH is used, needs only one register. A fullword is loaded
into register-7, and then MH multiplies register-7 by a halfword in storage. The
product is generated in register-7.
In MULT3, the even-odd pair of registers is 8 and 9. Registers 3 and 9 are
loaded with fullwords which are to be multiplied. For MR we specify the multi¬
plicand in the even register (8) as operand-1. The multiplier in register-3 is operand-
2. The product is developed in registers 8 and 9.
In MULT4, the MR operation uses only two registers. Registers 8 and 9 are
the even-odd pair. The multiplicand is loaded into register-9, and the multiplier in

74 * REG: REG:
75 *
76 M MULTIPLY FULLWORD
77
00307C 5850 4 09 E 78 MUL T 1 L 5,MULTCAND 5 : 03333
003080 5C40 40A2

8
79

1 *
82 *
M

MH
4,MULTPLER

MULTIPLY HALFWORD
4: 00000 5: 66660

83 *
003084 5870 409 E 84 MULT2 L 7,MULTCAND 7: 03333
003088 4C70 4 0A 6 85 MH 7,MULTHALF 7: 09999

00308C 5830 40A2

88
87 ❖

89 *
90 MULT3
MR MULTIPLY REGISTER

88
L 3,MULTPLER 3: 00020
003090 5890 409E 91 L 9,MULTCAND
003094 9: 03333

88,8
1C83 92 MR 8,3 : 00000 9 : 66660
003096 5880 40 A 2 94 MUL T 4 L

8
, MULTPLER : 00020
00309A 5890 4 09 E 95 L 9, MULTCAND 9: 03333
00309E 1C 88 96 MR
: 00000 9: 66660
0030A0 00000005
0030A4 00000014
0030A8 000 3 100
98
99
MULTCAND DC
multpler DC
MULTHALF DC
F'3333*
F • 20'
H' 3'

FIGURE 9-9 Binary multiplication: M, MH, MR.

 203 Register Shift Instructions

register-8. In spite, of its appearance, MR 8,8 does not mean multiply the contents
of register-8 and register-8. Operand-1 refers to the multiplicand in the odd register
(9) of an even-odd pair (8 and 9). Operand-2 refers to the multiplier that happens
to be in register-8. It is erased by the multiplication.

Warning: In these examples, the product does not exceed the capacity
of a single register, which is 231 — 1 or 2,147,483,647. If there is a possibil¬
ity of such a large product, then we must provide additional programm¬
ing. The technique is given later in this chapter in Conversion of Double
Precision Binary to Decimal Format.

REGISTER SHIFT INSTRUCTIONS

We can shift binary data in a register either left or right a specified number of bit
positions. This feature, for example, can clear unwanted bit positions from a field, or
multiply or divide a field by a power of two. The following operations shift the bit
contents of registers, other than the leftmost sign bit which is unaffected. Bits shifted
out of the register are lost. The condition code is set.

NAME OPERATION OPERAND

SRA R1.S2 or R1,D2(B2)

[symbol] SLA R1.S2 or R1 ,D2(B2)
SRDA R1.S2 or R1,D2(B2)
SLDA R1.S2 or R1,D2(B2)

SHIFT RIGHT ALGEBRAIC—SRA. The rules for SRA are:

1. Operand-1 specifies a register whose 31 -bit contents other than the sign bit are to
be shifted to the right. The leftmost sign bit is not moved.
2. Operand-2 denotes the number of bits to be shifted. Normally we code the shift
factor as a decimal number less than 32.
3. Bits shifted off to the right are lost. The sign bit replaces leftmost shifted bits.
There is no overflow or program interrupt.

We may use SRA to divide the contents of a register by a power of 2. For

example, shifting right one bit is equivalent to dividing by 2\ or 2; shifting right two
bits is equivalent to dividing by 22, or 4, etc. Consider a 4-bit register containing
initially (a) 1000, and (b) 1111:

(a) CONTENTS (b) CONTENTS

Initial value: 1000 (8) 1111 (15)

Shift right 1: 0100 (4) 0111 (7)
Shift right 2: 0010 (2) 0011 (3)
Shift right 3: 0001 (D 0001 (D
204 REGISTERS AND BINARY PROGRAMMING

SHIFT LEFT ALGEBRAIC—SLA. SLA is similar to SRA with the following dif¬
ferences:

1. SLA shifts up to 31 bit positions to the left. The leftmost sign bit is unaffected.
2. SLA replaces rightmost shifted bit positions with 0-bits. For example, shift left
three bits: 00001011 becomes 01011000.
3. A leftmost bit shifted out that is different from the sign bit may cause an overflow
and interrupt.

We may use SLA to multiply the contents of a register by a power of 2. For example,
shifting left three bits is equivalent to multiplying by 23, or 8.

SHIFT RIGHT DOUBLE ALGEBRAIC—SRDA. SRDA is similar to SRA except that

the contents of two registers shift as a single unit. SRDA is commonly used with
binary divide operations.

1. Operand-1 specifies the even-numbered register of an even-odd pair of reg¬

isters. The pair is treated as a single doubleword.
2. Up to 63 bits may be shifted. The sign bit in the even register, considered the
sign for the pair, replaces leftmost shifted bits in both registers. The sign bit in
the odd registers is treated as data, therefore yielding 63 bits of data.

SHIFT LEFT DOUBLE ALGEBRAIC—SLDA. SLDA is similar to SLA except that, like
SRDA, operand-1 specifies the even-numbered register of an even-odd pair. The sign
bit of the pair is that of the even register. The sign bit of the odd register is treated as a
data-bit, giving a 63-bit doubleword.

For each shift operation, if operand-2 contains zero, the instruction executes
without shifting. This use of shift is a convenient way to set the condition code If we
want to vary the number of bits shifted throughout the program, we may use the
xise-displacement facility of operand-2, D(B). For example, register-3 contains the
value 12. Given SRA 9,0(3) the contents of register-9 shift right according to the
contents of register-3, that is 12 bits.
Figure 9-10 illustrates shift operations. Check the hex representation for the
fullword constants, and the effect of the shift. Note that it is the bits that shift For

0100 (X'4-! 3 ary ValUe COntaining 0001 ,X'n is left-shifted two bits, the result is

In SHIFT!, SRA shifts the contents of register-9 two bits to the right. This shift is
equ,valent to divtdmg by four. The second example specifies zero in operand-2 No
sh'ft occcm, u, e value ts positive, the condition code is set to high/plus.
In SHIFT2, SLA shifts the contents of register-7 two bits to the left. This shift is
equivalent to multiplying by four. The second example explicitly uses a base register.
205 Binary Division—D, DR

123 $
HEX CONTENTS:
124 $
125 ❖ SRA SHIFT RIGHT ALGEBRAIC
126 $
0039FC 5890 322A 127 SHIFT 1 L 9 tFULLWD2 00004327
003A00 8A90 0002 128 SRA 9,2 000010C9
003A04 8A90 0000 1 30 SRA 9,0 NO SHIFT. SET COND'N CODE

132 * TO HIGH/PLUS
133 * SLA SHIFT LEFT ALGEBRAIC
134 £
003A08 5870 3256 135 SHIFT2 L 7 , = F117191' 00004327
003A0C 8B70 0002 136 SLA 7,2 00010C9C
003A10 4180 0003 138 LA 8,3 LOAD 3 IN REG 8
003A14 8870 8000 139 SLA 7,0(8) SHIFT REG-7 LEFT 3 BITS
141 £
142 £ SRDA SHIFT RIGHT DOUBLE ALGEBRAIC
143 *
003A18 9867 3226 144 SHIFT3 LM 6,7,FULLWD1 0000013F/00004327
003A 1C 8 E 60 0004 145 SRDA 6,4 00000013/F0000432

147 *
148 $ SLDA SHIFT LEFT DOUBLE ALGEBRAIC
149
003A20 9889 3226 150 SHIFT4 LM 8,9 , FUL LWD1 0000013F/00004327
003A24 8F80 0012 151 SLDA 8,18 04FC0001/0C9C0000

003A28 0000013 F 153 FULLWD1 DC F 1 3 19 1 0000013F

003A2C 00004327 154 FULLWD2 DC F • 17191 ' 00004327

FIGURE 9-10 Binary algebraic shift operations.

The value 3 is loaded into register-8. Then register-8 is referenced explicitly in

operand-2 of the SLA to cause a left shift of 3 bits.
In SHIFT3, SRDA shifts the contents of the even-odd registers 6 and 7fourbitsto
the right. In SHIFT4, SLDA shifts the contents of the even-odd registers 8 and 9
eighteen bits to the left.

Problems 9-4, 9-5, and 9-6 should now be attempted.

BINARY DIVISION—D, DR

The D and DR instructions divide fields in binary format. (Unexpectedly, there is no

Divide Halfword operation.)

NAME OPERATION OPERAND

Isymbol] D R1.X2 or R1,D2(X2,B2)

DR R1 ,R2
206 REGISTERS AND BINARY PROGRAMMING

DIVIDE AND DIVIDE REGISTER. Both D and DR, like M and MR, require the use
of a doubleword of 63 bits plus a sign in an even-odd pair of registers. D and DR treat
the pair of registers, all 63 bits, as a dividend field. Possibly, for example, an M or MR
operation generated a two-register product, and it is now necessary to divide this
product by some value. Often, however, the programmer loads the dividend into a
register, and only one register is required to contain the fullword dividend. In this
case, the dividend is in the odd register, but the even register must be initialized so
that it contains the same sign as the dividend. We may force similar signs by the
following practice:

— Load the dividend into the even register.

— Using SRDA, shift the dividend 32 bits out of the even into the odd register. The
even register now is cleared of "garbage" from any previous operation, and
initialized with the correct sign.

EVEN REGISTER, INITIALIZED ODD REGISTER, DIVIDEND SIGN

Binary zeros Positive

Binary ones Negative

The rules for D and DR are:

1. Operand-1 specifies the even register of an even-odd pair of registers containing

the dividend.
2. Operand-2 references the 32-bit divisor. For D, the divisor is a fullword aligned in
storage. For DR the divisor is a register.
3. After execution, the remainder is in the even register and the quotient is in the
odd register. Both contain 31 data bits and a leftmost sign bit. A quotient that
exceeds 31 bits plus the sign causes an overflow and program interrupt. Dividing
by zero will cause this condition.

EVEN REGISTER ODD REGISTER

Before the D or DR: Dividend Dividend

After the divide: Remainder Quotient

4. The sign of the quotient is determined by normal algebraic rules. The remainder's
sign is the same as the dividend. The condition code is not set, but we can ZAP
the quotient into itself to set it.

Figure 9-11 illustrates the D and DR operations. For D, the even-odd pair is
registers 0 and 1. The binary fullword DIVD is loaded into register-0. Then the
contents of register-0 are shifted into register-1, leaving register-0 correctly ini¬
tialized. The fullword divisor DIVSR divides into the even-odd pair. Register-1 now
contains the quotient, 326, and register-0 contains the remainder, 5.
207 Binary Division—D, DR

158 *
159 D DIVIDE REG : REG : DECIMAL
1 60 £
FORMAT:
003A30 5800 324 A 161 L 0 * DIVD 0: 4 569
003A34 8 E 00 0020 162 SRDA 0,32 0: 0000 1: 4569
003A38 5000 3 24E 163 D 0,DIVSR 0: 0005 1: 0326

1 65 £
166 * DR DIVIDE REGISTER
167 *
003A3C 5 8C0 324E 168 L 12,DI VSR 12 : 0014
003A40 58 AO 32 4A 169 L 10,DIVD 10: 4569
003A44 8EA0 0020 170 SRDA 10,32 10: 0000 11 : 4569
003A48 1 D AC 171 DR 10, 12 10: 0005 11: 0326

003A4A 0000
003A4C 000011D9 173 DI VD DC F'4569' FULLW0RD DIVIDEND
003A50 0000000E 174 DI VSR DC F ' 14 ' FULLW0RD DIVISOR

FIGURE 9-11 Binary division operations: D and DR.

For DR, the even-odd pair is registers 10 and 11. The divisor and dividend are
loaded respectively into registers 12 and 10. The contents of register-10 are shifted
into register-11, leaving register-10 correctly initialized. DR then divides register-12
into the even-odd pair. Register-11 now contains the quotient, 326, and register-10
contains the remainder.

SCALING AND ROUNDING. Assembler performs arithmetic on integers only. The

problem of scaling, that is, providing for the decimal point, is similar to that for DP.
We must mentally account for the implicit decimal point. It simplifies programming
to think of binary as decimal values.

23565C 87 DISTPK DC P'2356.5'

01500C 88 GAL S PK DC P'150.0'
0038D0 89 DI STOW DS D
003808 90 GALSDW DS D
0038E0 91 ANSWER DS D

F872 30 CE 30C4 93 DIVIDE ZAP DISTDW,DISTPK REG CONTENTS AS DECIMAL FORM/

F 872 30D6 3 OC 7 94 ZAP GALSDW,GALSPK

118 * ROUND TO TWO DECIMALS :

003936 4F90 30D6 119 DIVID30 CVB 9,GALSDW 9 : 0000001500
00393A 4F60 30CE 120 CVB 6,DISTDW 6: 0000023565
00393E 8E60 0020 121 SRDA 6,32 6: 0000000000 7: 0000023565
003942 4C70 31 88 122 MH 7,=H'1000' 6: 0000000000 7: 0023565000
003946 1D69 123 DR 6,9 6: 0000000000 7: 0000015710
003948 1267 124 LTR 6,7 LOAD QUOTIENT INTO REG-6,
00394A 4740 3154 125 BM DIVID32 TEST CONDITION CODE
00394E 4 A 60 3186 126 AH 6,=H'5' 6: 0000015715 7: 0000015710
003952 47F0 3158 127 B DIVID34
003956 4B60 3186 128 DIVID32 SH 6 » = H'5'
0020 129 DIVID34 SRDA 6,32 6: 0000000000 7: 0000015715
00395A 8E60
31 7E 130 D 6 , = F'10' 6: 0000000005 7: 0000001571
00395E 5D60
4E70 3 ODE 131 CVD 7,ANSWER ANSWER CONTAINS PACKED 15.71
003962

FIGURE 9-12 Binary division with decimal point scaling.

208 REGISTERS AND BINARY PROGRAMMING

Refer to Figure 9-12, which is similar to a DP example in Figure 5-4 which

divides distance (DISTPK) by gallons (GALSPK) to calculate miles-per-gallon (AN¬
SWER). Both DISTPK and GALSPK are transferred to aligned doublewords to permit
CVB to convert them to binary. Distance, in register-6, is shifted all 32 bits into
register-7 to initialize register-6 with the correct sign. We require a 2-decimal quo¬
tient after rounding. Since both distance and gallons contain one decimal position,
we must generate three additional positions.
To generate three decimal places, we multiply by 1000. (Note that shift oper¬
ations, such as SLA, multiply by powers of 2, not 10.) LTR is used to set the condition
code: if positive we add 5; if negative we subtract 5. LTR as well loaded the quotient
from register-7 into register-6, erasing the remainder. This move is done because the
quotient is to be divided again, by 10. Before dividing, we shift the quotient out of
register-6 back into register-7, thereby clearing and initializing register-6 to the cor¬
rect sign. The division by 10 adjusts for the required number of decimal positions.
The following facts should be clearly understood: LTR cleared the remainder
from register-6 because of the subsequent divide by 10. If the remainder were left in
register-6 the second divide would have treated the contents of registers 6 and 7 as
one extremely large 63-bit value. The contents of the registers and fullwords are in
binary format. However, we code decimal format to conveniently represent the
binary values.

CONVERSION OF DOUBLE-PRECISION BINARY TO DECIMAL

FORMAT

A binary multiplication may develop a product that exceeds the capacity of one
register (2,147,483,647). The result is a double-precision, or a two-register, product.
This situation requires additional programming in order to convert the result to
decimal format. Consider a situation in which registers 4 and 5 contain only four bits
0011 and 0111. The sign is the leftmost bit of register-4. The decimal value of this
quantity is 32 + 16 + 0 + 4 + 2 + 1 = 55. Converting register-4 to decimal yields
the decimal value 3, instead of 32 + 16 = 48. To correct this value 3, we may
multiply it by a constant value 16, or 3 x 16 = 48. The constant 1 6 is used because
the register” contains four bits, and the maximum value is 24 = 16. (Determine the
constant required if the registers contain 5, 6, or 32 bits.) With register-4 correctly
converted to decimal value 48, we may now process register-5. Conversion of
register-5 to decimal results in the value 7, which when added to 48 yields the
correct answer 55.
Consider another example of a negative value, minus 59. Its bit representation
in two's complement is:

REGISTER EVEN ODD

Binary value: 0011 1 011 (plus 59)

Reverse bits: 1100 0100
Add 'one': 1100 0101 (minus 59)
209 Conversion of Double-Precision Binary to Decimal Format

The even register contains the sign, a minus, in the leftmost bit. CVD converts the
contents of the even register to -4. (Depict 4 in binary, reverse the bits, and add 1 to
check that the two's complement of -4 is 1100.) Multiplying -4 by 16 gives -64.
The odd register containing 0101 when converted to decimal yields +5. And -64 +
5 gives the correct answer, -59.
But a problem arises if the odd register contains a 1 in its leftmost bit, because
CVD treats the value as negative. Assume the value in the double-register is +40, or
0010 1000. Converting the even register to decimal yields +2. Multiplying +2 by 16
gives +32. CVD converts the odd register to -8, and the sum of +32 and -8, which
is 24, is incorrect.
We can use LTR to test the leftmost sign bit in the odd register. If there is a 0-bit,
the nonminus condition code is set; the conversion may proceed as already de¬
scribed. If, however, the odd register sign is a 1 -bit, the condition code is minus. The
following procedure produces the correct answer for the same example of 0010 1000:

— The odd register is "minus”. Add 1 to the even register, giving 0011 1000.
— Converting the even register to decimal gives +3. Multiplying +3 by 16 yields
+48.
— Converting the odd register to decimal gives -8. 48 plus -8 gives the correct
answer, 40.

This additional step of testing if the odd register is "minus" and adding 1 to the
even register provides the correct answer in all cases. Note that the incorrect answer
was 24 instead of 40, a difference of 16. But the addition of 1 was equivalent to
incrementing the double-precision value by 24, or 16. Figure 9-13 gives the pro¬
gramming for this procedure, in which multiplication of binary values produces a
two-register product.

8 DS 0D
9 DAT A 1 DC PL 8>0123456 >
10 DATA2 DC PL8>-456789>
11 DBLWD DS D
12 PR0DPK DC PL 16 > 0 1
13 CONSTANT DC P14294967296'
14 * REG-6 HEX REG-7 HEX DECIMAL

15 E10D0UBL CVB 6 * DA T A 1 0001E240

16 CVB 7.DATA2 0001E240 F F 89 07 A B
17 MR »
6 6 FFFFFFF2 DEB 1E 0C0
18 LTR 7,7
19 BNM E20
20 AH 6,=H>1' FFFFFFF3 DEB1E0C0

22 E20 CVD 6,PRODPK+8 PRODPK: 013 -

23 MP PRODPK,CONSTANT PRODPK: , , ,
55 834 574 848 -
24 CVD 7,DBLWD DBLWD : , ,
558 767 936 -
25 AP PRODPK,DBLWD PRODPK: , , ,
56 393 342 784 -

FIGURE 9-13 Conversion of double-precision binary to packed.

 210 REGISTERS AND BINARY PROGRAMMING

The two fields, DATA1 and DATA2, are converted into binary format in reg¬
isters of 6 and 7. When the registers are multiplied, the product exceeds the capacity
of register-7. Since register-7 contains a “minus value", 1 is added to register-6. Regis-
ter-6 is converted to decimal format into PRODPK. The constant now used to multi¬
ply is not 24 but 232, or 4,294,967,296. Register-7 is next converted to decimal format
in DBLWD, and PRODPK is added to it. The final product is correct'
56,393,342,784-.

SAMPLE PARTIAL PROGRAM—FINANCE CHARGE REBATES

For some types of loans, finance charges are precomputed; that is, the amount of
interest is precalculated for the term of the loan and added to the amount of the loan.
For example, $500.00 is borrowed for a term of 6 months with precomputed finance
charge of $30.00. The sum of $530.00 is repayable in 6 equal instalments of $88.33.
A borrower who repays the full amount of the balance remaining before the end of
the term is entitled to a partial rebate on the precomputed finance charge. The rebate
can be calculated by the “sum of digits" formula.

t original term in months F = pre-computed finance charge

r = remaining term in months R = rebate

r2+r
r2+r
x F
t2+t
2

Example:

t = 6, r = 5, f = $30.00

fijf X $30.00 = X $30.00 = $21.42

Figure 9-14 gives the programming that calculates the rebate. The program also
checks for minimum f.nance charge of $10.00. That is, finance charge less rebate
must equal at least $10.00. Example: $30.00 - $21.42 = $8.58. Since $8 58 is
less than $10.00, the rebate is $30.00 - $10.00 = $20.00.

DEBUGGING TIPS

The instructions introduced in this chapter provide

an additional dimension of error
possibilities:
211 Debugging Tips

003806 0000
003808 00000006 8 0RIGTERM DC F ' 06 '
00380C 00000005 9 REMGTERM DC F '05'
003810 00000BB8 10 F INCHGE DC F >03000' 030.00
003814 11 REBAT E DS F XXX.XX
12 *
REG: DECIMAL FORMAT:
13 * CALCUL ATE R SQUARED + R
003818 5890 300A 14 CALCREB L 9 »REMGTERM 9: 05
0038 1C 18 79 15 LR 7.9
003 81E 1C69 16 MR 6.9 7: 25
003820 1 A 79 17 AR 7.9 7: 30

19 * MULTIPLY BY FINANCE CHARGE

003822 5880 300E 20 L 8,F INCHGE 8: 030.00
003826 1C68 21 MR 6,8 7: 900.00
003828 5C60 3176 22 M 6,=F'100' 7: 900.0000 SHIFT LEFT
24 * CALCULATE T SQUARED + T
00382C 5890 3006 25 L 9 ,0RIGTERM 9 : 06
003830 1859 26 LR 5.9 5: 06
003832 1C49 27 MR 4.9 5: 36
003834 1 A59 28 AR 5.9 5: 42

30 * DIVIDE TO CALCULATE REBATE:

003836 1D65 31 DR 6,5 7: 21.421
003838 4 A 70 3182 32 AH 7 * =H'50' 7: 21.43: ROUND
00383C 1 B66 33 SR 6,6 CLEAR REMAINDER
00383E 5D60 3176 34 D 6 , = F'100’ 7: 21.43 SHIFT RIGHT

36 * CHECK FOR $10.00 MINIMUM CHARGE :

003842 1898 37 LR 9,8 9: 30.00
003844 1 B87 38 SR 8,7 8: 08.57
003846 5980 317A 39 C 8 , = F ' 1000'
00384A 47B0 3052 40 BNL B 10N0TL0
00384E 5B90 31 7 A 41 S 9 , = F' 1000' 9: 20.00
003852 1879 42 LR 7,9 7: 20.00

003854 5070 3012 44 B10N0TL0 ST 7,REBATE 7: 20.00

FIGURE 9-14 Calculation of finance charge rebate.

—Operand-2 of CVD and CVB must be a doubleword.

— For many operations, the selection of the correct instruction is critical. Consider
the following similar-looking instructions that assemble with no error but may
produce unexpected results:

LR 7,4 Loads contents of register-4 into register-7.

L 7,4 Loads contents of storage locations 4, 5, 6, 7 into register-7.
LH 7,4 Loads contents of storage locations 4 and 5 into register-7.
LA 7,4 Loads the displacement value 4 into register-7.

— Binary division causes more problems than multiplication because the even reg¬
ister should be initialized with the same sign as the odd one.
— Binary calculations may unexpectedly generate a large value that exceeds the
capacity of one register.
212 REGISTERS AND BINARY PROGRAMMING

PROBLEMS

9-1. Add the following as 5-bit binary numbers:

6 9 8 7 -9
±5 ±4 +(~4)
1 1 13 3 3 -17

9-2. Explain halfword, fullword, and doubleword alignment, and the significance of
alignment on the 360 and the 370.
9-3. Given the following declaratives, explain concisely what each of the following
unrelated operations does. Check for possible coding errors.

BINA DC F’285’
BINB DC F’394’
BINC DS D

(a) L 6,BINA .(e) L 6,BINA (i) MVC BINA,BINB

(b) CVB 6, = P’500’ (f) LM 6,7,BINA (j) CVD 6,BINC
(c) LR 9,5 (g) LH 8, = H’25’ (k) ST 12,BINB
(d) LA 12,5000 (h) ZAP 12,=P’5’ (l) LH 8,BINA
9-4. Use the same declaratives as in the previous problem to explain the following
unrelated problems. Check for coding errors.
(a) SH 8, = H’9’ (e) C 9,BINB (i) MH 8, = H’9’
(b) S 8,BINA (f) SH 8,BINB (j) MR 8,9
(c) SR 8,9 (g) S 8, = F’9’ (k) SRA 8,9
(d) CR 8,9 (h) M 8,BINA (I) SLDA 8,9
9-5. Revise Problem 5-5 (Multiply Packed) to perform binary multiplication. Use the
same constants and store the final product in decimal format in PROD.
9-6. Explain the effect of the following related operations. BINA refers to 9-3.
(a) SR 4,4 (b)ACCUM DS PL3 (c) L 5 BINA
L 5, = F’15’ LA 6,ACCUM SLA 52
MR 4-5 AP 0(3,6),0(3,6) ST SABINA
9-7. Follow the same requirements as for Problems 9-3 and 9-4:
(a) D 8,BINA (b) DR 8,9 (c) dr q,8
9-8 Revise Problem 5-6 (Divide Packed) to perform binary division. Use the same
constants and store the final quotient in binary format in QUOT.
9-9 Code the following routine. There are two binary values: BINAM contains a
value to be raised to a power n, called EXPON. Perform repetitious binary
multiplying of BINAM n times to compute BINAM". Program for a double-
precision result, and print the final answer. Both BINAM and EXPON mav be
defined as DC H with constant values. y
 CHAPTER >0

EXPLICIT USE OF BASE

REGISTERS

In many previous examples, we coded the length explicitly to override the implicit
length of the field, such as: MVC P+30(2),=C'**'. In a similar fashion a base register
may explicitly override the assigned base register. This chapter uses base registers
explicitly to permit the use of such operations as EDMK and COMRG, and to modify
an address for table look-up. We may use a base register explicitly in any operand
that references storage, with a reference to a base register (B1 or B2). Since a base
register contains the address of an area of storage, we may override the program's
normal base register with another register containing an address of some other area.
Figure 10-1 is illustrative only and not intended to be realistic. BALR initializes
register-4 with X'3002'. The examples show three different ways to move a field
(ASTERS) to the print area.

ASSGN1 shows a conventional move operation, with both operands subject im¬
plicitly to base register-4. The assembled object code for operand-1
(PRINT+60), is 4056, or base register-4, displacement X'056'. The effective
address is X'3002' plus X'056', or X'3058'.
ASSGN2 explicitly uses a base register. The address of PRINT+60 (X'3058') is loaded
into register-8. MVC explicitly uses the contents of register-8. Since the format

213
214 EXPLICIT USE OF BASE REGISTERS

LCC OBJECT CODE ACDR I AC0R2 STMT SOURCE STATEMENT

003000 3 PRCG10 START X•30 CO*

003000 0640 4 E ALR 4.0
03002 5 USING 4.4

e 4 implicit base register:

003002 D20 1 4056 4093 03056 03095 9 ASSGN1 MVC PRINT+60(2).ASTERS

12 4 EXPLICIT BASE REGISTER:

003008 seec 4096 03098 13 ASSGN2 L 8,=A(PRINT+60)
C 030 OC D201 8000 4093 OOOCO 03095 14 MVC 0(2.8).ASTERS

1 7 4 EXPLICIT base/displacement:
003012 seao 409A 0309C 1 8 ASSGN3 L 0•=A(PR I NT )
0030 16 0201 803C 4093 0003C 03 09 5 19 MVC 60(2.8).ASTERS
20 4 •
2 1 4 •

22 4 •
00301C 404C404040404040 23 PRINT OC CL 12 1* •
003095 5C5C 24 ASTERS OC C* •
003098 25 LTORG
0 030 9 8 00003058 26 =A(PRINT+60)
00309C 000030 1C 27 =A(PPINT)

FIGURE 10-1 Base register assignment and explicit use of a base register.

for MVC is D1 (L,B1 ),D2(B2), we code the first operand explicitly with zero
displacement, a length of 2, and base register-8, or 0(2,8). The assembled object
code for operand-1 is 8000, or base register-8, displacement zero. The
effective address is X'3058'.
ASSGN3 illustrates both explicit base register and displacement. The address of
PRINT (X'301C) is loaded into register-8. Since the move operation is to refer¬
ence PRINT + 60, we need a displacement of 60. The first operand is expressed
as 60(2,8). The assembled object code for operand-1 is 803C, or base register-8
plus displacement X'03C'. The effective address is X'301C' plus X'03C, or
X'3058'. Note how the Assembler generates the same effective address in each
case:

ASSGN1 ASSGN2 ASSGN3

Base X'3002' X'3058' X'301C'

Displacement X'0056' X'OOOO' X'003C
Effective address X'3058' X'3058' X'3058'

EDIT AND MARK—EDMK. On printed checks and customer bills, it is usually

desirable to print the dollar sign to the immediate left of the first significant digit of the
amount. If a field provides for seven digits, and only five are significant, the resulting
edited field could appear as $bbb123.45. We may use EDMK to print the amount as
$123.45.
215 Operations Explicitly Using Base Registers

NAME OPERATION OPERAND

[symbol] EDMK S1.S2 or D1 (LI ,B1 ),D2(E32)

EDMK is identical to ED except that it inserts into register-1 the address of the
firstsignificantdigit in the edited field. We may then decrement register-1 by one since
the dollar sign must be printed one position to the left. We then use register-1 as an
explicit base register to move a dollar sign.

Note: If the significance start character (X'21') forces a zero digit to be

printed, the address is not stored in register-1. Therefore, we should en¬
sure against this possibility by initially loading into register-1 the address
of the significance starter plus one. After the EDMK operation, we deduct
one from register-1; if the significance starter forced the first printed digit,
then register-1 will contain the address of the significance starter, where
the dollar sign should appear.

In Figure 10-2, the editword is moved into P+30, and the address of the X'21' is
P+33. We load the address of P+34 into register-1. After EDMK, register-1 contains
the address of the first significant digit at P+33. Decrementing register-1 causes it to
contain the address of P+32, where MVI inserts the $.

22 *
33 4 EOMK EDIT A MARK
34 4
0 03 0A 0 4 110 4CE2 35 LA 1.P+24 LOAD ADDRESS OF SIGNIFI<
» START CHARACTER +1
0020A4 D206 40 DE 40B6 36 M VC P + 30 <7).EDKORO |40|20|20|21|4B|20|20|
0 0 30 A A OF C 6 400E 4 CBD 37 EDMK P+30(7).AMOUNT |40|40l*0JF3|48|F5|F2l
003060 4e i o 4 1 3E 38 SH 1.=H*I• DECREMENT REG1 (OR BCTR
0030B4 9258 1 000 39 MVI o< i>.c*** |40|40|58|F3|48|F5|F2|
40 4 • *3.52
A l 4 •
42 4 • + P+32
003086 4C202021482020 43 E04QRD oc X*402020214B2020*
0 03 0 BF 00352C 44 AMOUNT oc P* 003.52* ■ILL EDIT AS *3.52
C030C2 4C4C4C4C404C4040 45 P cc CL 12 1* •

FIGURE 10-2 Sample edit and mark operation.

OPERATIONS EXPLICITLY USING BASE REGISTERS

Some operations involve explicit use of base registers. These include Assembler
instructions EDMK, SRP, MVCL, and CLCL and IBM macros COMRG and TIME.

THE COMRG AND TIME MACROS. The communication region is a storage area in
the Supervisor. The first eight bytes contain the date as initialized each day by the
216 EXPLICIT USE OF BASE REGISTERS

computer operator. The format for the date, including the slashes, is: dd/mm/yy or
mm/dd/yy.* Although we do not know the address of the communication region,
under DOS we can use COMRG to ask the Supervisor for the address. The Supervisor
places the address of the communications region in register-!. We then can use
register-! explicitly to address the communications region:

DATE DS CL8 DD/MM/YY’ Area to store date

COMRG Locate address of comm'n region
MVC DATE,0(1) Move date from comm'n region

The OS macro is called TIME. It returns the date in packed format in register-1,
as /00/YY/DD/DC/. The day (D) is Julian, the day of the year. C is a sign digit. Also,
the time is stored in register-0.

FULLWD DS F Fullword area

DATE DS CL7 Area for date 00YYDDD
TIME DEC OS TIME macro, packs date in
register-1
ST 1,FULLWD Store packed date in FULLWD
UNPL DATE,FULLWD Unpack date in DATE

SHIFT AND ROUND PACKED—SRP. The 370 instruction, SRP, permits rounding,
and shifting of packed digits either left or right. SRP can therefore replace MVO and
AP in decimal multiply and divide, and replace MP where used to shift the dividend
to the left.

NAME OPERATION OPERAND

[symbol] SRP S1.S2 or D1(L,B1),D2(B2),I3

Although SS-format, SRP has three operands. Operand-1 denotes the field con¬
taining packed data to be shifted and optionally rounded. Operand-2 is a base/
displacement reference that indicates the number of digits to be shifted. The
maximum shift is 31 digits. Operand-3 provides the value 0-9 to be used for round¬
ing. a left shift will normally have a 0 to indicate no rounding, and a right shift usually
rounds with 5. SRP sets the condition code for zero, minus, and plus.

LEFT SHIFT A positive value as the shift factor indicates a left shift. For example
+ 2 means shift left two digits (digits, not bytes). We may load the shift factor in a

*The communications region contains other fields that may be of interest to the ad¬
vanced programmer. See the IBM Supervisor manual for your installation. The 370 also
contains a different area called "input/output communications area.”
217 Operations Explicitly Using Base Registers

register, and then reference the register explicitly with the SRP, as shown by SHIFL2A
in Figure 10-3. More conveniently, we may code the shift factor as an explicit dis¬
placement using base register-0 (that is, no base register), as in SFHIFL2B and
SHIFL2C. Shifting a significant digit (1-9) off the left sets the decimal overflow
condition but does not cause termination, so we can use Branch Overflow to test if a
significant digit was lost.

♦ Hex representation:
AMOUNT oc PL5* 1234567* 00 12 34 56 7C

* SHIFT LEFT 2 DIGITS: RESULT IN amount:

SHIFL2A LH 14.=H*2*
SRP AMOUNT.0(14).0 12 34 56 70 OC

SHIFL 28 SRP AMOUNT.2(01.0 12 34 56 70 OC

SHIFL2C SRP AMOUNT.2.0 12 34 56 70 OC

A SHIFT RIGHT 2 DIGITS (AND ROUND):

SHIFR2A LH *
14, = H -2 *
SRP AMOUNT.0(14).5 00 OO 12 34 6C

SHIFR2B SRP AMOUNT.X*3E•,5 00 00 12 34 6C

SHIFR2C SRP AMOUNT.62.5 00 00 12 34 6C

FIGURE 10-3 Use of SRP—shift and round packed.

RIGHT SHIFT. A negative value as the shift factor indicates a right shift. We may
load the negative value into a register and reference the register with the SRP, as
shown by SHIFR2A. Although it is more convenient to code the shift factor as a
displacement rather than load a base register, we cannot code such a right shift as
SRP AMOUNT,-2,5; the Assembler does not accept negative "displacements" [that
is, -2(0) for D2(B2)]. Now, we can solve the problem by representing the -2 as a
hexadecimal value. Since SRP can shift only up to 31 digits, we can express the shift
factor with six bits (5 data bits plus a "sign" bit: 011111 =31). The value 2 as six
binary digits is 00 0010, and -2 in two's complement is 11 1110. The hex repre¬
sentation of this number is X'3E', which we can use directly as a shift factor as in
SHIFR2B in Figure 10-3. Similarly, the decimal equivalent of X'3E' is 62, which we
may code as a shift factor, as shown in SHIFR2C.
Note that other right shifts include: 1 = X'3F' or 63, 3 = X'3D' or 61, and 4 =
X'3C' or 60, up to a shift of 31 digits.

MOVE LONG AND COMPARE LONG—MVCL AND CLCL. Move Long (MVCL)
and Compare Logical Long (CLCL) are available only on the 370. MVCL will move
fields and records that exceed 256 positions. One major use is to clear storage. CLCL
compares fields and records that exceed 256 positions. The instruction has an
additional attribute: if the two fields are unequal, CLCL makes the address of the
unequal byte available.
218 EXPLICIT USE OF BASE REGISTERS

NAME OPERATION OPERAND

[symbol] MVCL R1.R2

CLCL R1.R2

MVCL and CLCL require the use of four registers. Operand-1 and -2 both
reference the even-numbered register of an even-odd pair. The complexity of MVCL
and CLCL rather limits their practical use; see the IBM Principles of Operation
manual for details.

TABLES

Many programs require the use of tables (or arrays) in storage for the following
purposes: (1) To provide additional information, such as the tax rate for an income
tax table; and (2) To provide storage by categories as data is processed, such as
accumulating sales according to inventory number.
A simple example of a table is one that stores the numeric and the alphabetic
month. The numeric month from an input record is used to locate the alphabetic
month in the table, used to print on the report heading. In tabular form, the table
appears as:

01 JANUARY
02FEBRUARY

12DECEMBER

TERMINOLOGY. In the preceding example, the numeric month on the input re¬
cord used to search through the table is called the search argument. Each entry in the
table in storage consists of a table argument (the numeric month against which the
search argument is compared), and a function (the alphabetic month, which is the
item for which we are searching). The function may contain more than one field.
Each table argument in the table is the same length and format, and each function is
the same length and format. The search argument is the same length and format (such
as character or packed) as the table argument. Further, the table arguments normally
are defined in an ascending sequence.

TYPES OF TABLES. There are two common types of tables used in business nro-
grammmg. The preceding table of months consists of discrete entries in which the
T„;-'T8Un'‘-;nl must eXiT*ly eclual ,he sear< h argument. Another example of this type
could be an Inventory table containing Stock numbers as arguments and Stock prices
as functions. Also, a second field in the function could be used to accumulate total
219 Tables

Stock issues by Stock number. The Stock numbers in the table are sequential but not
necessarily consecutive, because not all Stock numbers are used. If the search argu¬
ment does not equal one of the table arguments, then a possible error condition
exists. The table could appear as:

STOCK NUMBER (TABLE ARGUMENT) PRICE (FUNCTION)

121 5.25
135 3.10
137 4.00 etc ...

The second common type of table consists of table arguments that provide
ranges or segments, such as the sequential steps of taxable income in an income tax
table. In this case, the search argument will fall within one of the segments. The
function is the tax rate for the segment. The table could appear as:

TAXABLE INCOME (TABLE ARGUMENT) TAX RATE (FUNCTION)

6,000.00 8.0%
8,000.00 etc.... 10.0% etc....

In the table, all taxable income up to $6,000 is taxed at 8.0%, and taxable income
from $6,000.01 through $8,000 is at 10%.
We may define and store tables one of two ways:

1. The table arguments and functions are defined by DC's as constants. This method
is useful when the arguments and functions do not change very often.
2. The area for the table is defined, but the contents of the table, the argument and
function, are read sequentially as data at the start of the program and stored in the
table. This method is useful when the arguments or functions are subject to
frequent change. This method permits changes to the table without reassembling
the program.

TABLE LOOK-UP. A table search requires repetitive processing. We initialize the

search by loading the address of the table into a register, which the program uses
explicitly as a base register. The search argument is compared against the first table
argument. To compare against successive table arguments, the address in the register
is incremented by the length of the argument/function entries in the table. When we
compare the search argument to a table argument, there are three possibilities:

1. The Search Argument Is Equal. In this case the required function has been found,
and the search is terminated.
2. The Search Argument Is High. We must continue the search by examining the
next entry in the table.
3. The Search Argument Is Low. The action depends on the type of table. If the table
contains segments such as a tax table, then the required function has been found;
the tax rate is in this step. If, however, the table contains discrete entries (such as
220 EXPLICIT USE OF BASE REGISTERS

nonconsecutive inventory stock numbers), then the required table argument does
not exist. This latter condition is a common situation that must be checked for in
this type of table.

TERMINATION OF THE LOOP. We must ensure that the search can be termi¬
nated. If no provision is made to end the loop, then the program may compare a
very high search argument against all the entries in the table and against the area
following the table. Several means may force termination:

1. We may assign the last table argument with the highest possible value, such as
packed nines for packed fields, and hex F's for character or hex fields. Because
the search argument cannot exceed this value, there will always occur a branch
on equal (found), or low (found or nonexistent argument depending on the type of
table). Figure 10-4 gives an example.
2. If we know the number of entries in the table, the program may count each time it
compares to an entry. When the count exceeds the number of entries, the search
is terminated. Figure 10-5 gives an example.
3. If we know the address of the last table argument, the program can compare the
address being modified against this address. If the modified address exceeds the
address of the last argument, then the table argument does not exist. Figure 10-6
gives an example.
4. If we know the value of the highest table argument, the program may compare the
value of the search argument to this value. If the value of the search argument
exceeds the known value, then the table argument does not exist, and the search
does not have to be performed.

TABLE LOOK-UP WITH HIGH ARGUMENT. Figure 10-4 provides the coding for
the table look-up of the numeric and alphabetic month discussed earlier, explained
as follows:

— The table consists of a 2-character numeric month and a 9-character alphabetic

month. (The longest month, September, is nine characters.) The last table argu¬
ment contains hex F's.
— Initialization: The address of the table, MONTAB (at location X'300C'), is loaded
into register-8, to be used explicitly as a base register. {Note: LA loads the address
of the table, not its contents.)
— At CIOLOOP, operand-2 of the CLC has the form D2(B2), and the coding 0(8)
references base register-8 and zero displacement, giving the address X'300C'.
The CLC compares the 2-character search argument, MONIN, against the first
two bytes of the table, 01 at X'300C'.
— If the condition is equal, the month is found, and the program branches to
C20EQUAL. 6
— If the condition is low, the month is not in the table, and the program branches to
an error routine. This error could occur if the search argument invalidly con¬
tained a value either less than 01 or greater than 12. All search arguments will be
lower than hex F's at the end of the table, so a low condition is always an error
221 Tables

C0300C FCF1C1C1D5E4C109 10 NONT A8 cc C•01 JANUARY • TABLE OF NUMERIC AND ALPHA

003017 F0F2C6C5C2D9E4C1 1 1 DC C*02FE8RUARY • ♦ MONTHS
003022 FCF3C4C109C3C840 12 DC C•03MARCH • 4
00302D FCF4C1D7D9CSD340 13 DC C04APRIL • 4
003038 F0F504C1E8404040 14 DC C•05MAY • 4
003043 FOF601E405C54040 15 DC C* 06JUNE • 4
00304E FCF7C1E4D3E84040 16 OC C • 0 7 JULY • 4
003059 FCF8C1E4C7E4E2E3 17 DC C* 08AUGUST • 4
003064 FCF9E2C507E3C5D4 18 OC C•09SEPTEMBER• 4
0 0306 F F 1F006C3E3D6C2C5 19 DC C’lOOCTQBEB • 4
0 030 7 A FIF 1D506E5C5D4C2 20 DC C•11 NOVEMBER • 4
003085 F IF 2C4C 5C3C5D4C2 21 DC C*12CECEMBER • 4
003090 FFFF 22 OC X•FFFF• * ENO OF TABLE

C 030 92 24 MONIN DS CL2 SEARCH ARGUMENT

003094 4040404040404040 25 PRINT DC CL 12 1* • PRINT AREA
26 4 •
27 * •
003100 00
00310E 4180 400 A 28 LA 8.MONTAB INITIALIZE ADDRESS OF TABLE

003112 0501 4090 8000 0 30 CIOLOOP CLC MON IN.0(8) INPUT MONTH : TABLE MONTH?
003 1 18 4780 4126 0 31 BE C20EqUAL * EOUAL - FOUND
00311C 4740 50A4 0 32 BL RIOINV • LOW - NOT IN TABLE
003120 4A8C 42A6 33 AH 8,=H*11* INCREMENT BY 11 FOR NEXT ENTRY
003124 47FC 4110 0 34 B ClOLOOP * IN THE TABLE

003128 0208 40F6 8002 0 36 C20EQUAL M VC PRINT*100(9),2(8) MOVE ALPHABETIC MONTH TO PRINT

FIGURE 10-4 Table look-up with hex F's as last argument.

— If the condition is high, it is necessary to examine the next table argument. We

increment base register-8 by 11, the length of each entry. The base register now
contains X'300D', where table argument 02 resides. The program then branches
back to CIOLOOP which compares the search argument against table argument
02.
— At C20EQUAL, the found function, the alphabetic month, is moved to the print
area. Operand-1 indicates that nine bytes are to be moved. Operand-2 references
base register-8 which contains the address of the found table argument. The
displacement is two bytes because the function is two bytes from the first position
of the table argument (the address in register-8).

TABLE LOOK-UP USING A COUNT: BCT, BCTR, BXLE, BXH. Th is section exam¬
ines two ways of performing a table search using the techniques for loop termination
described earlier. The following instructions may be used to decrement a count and
to test termination of a loop. The condition code is not changed.

NAME OPERATION OPERAND

BCT R1.X2 or R1,D2(X2,B2)

BCTR R1.R2
[symbol] BXLE R1,S2 or R1,R3,D2(B2)
BXH R1.S2 or R1,R3,D2(B2)
 222 EXPLICIT USE OF BASE REGISTERS

BRANCH ON COUNT—BCT AND BCTR. Before using these instructions, we

normally load a count in a register, such as the number of entries in the table. The
routine may then use Branch on Count in the loop to decrement the count by 1 and
to check if the count has been reduced to zero. The rules are:

1. Operand-1 specifies any register, which contains a count.

2. Operand-2 references an address in storage if BCT, or a register containing an
address if BCTR. On execution, the computer decrements the contents of the
operand-1 register by 1. If the contents are not zero, the program branches to the
operand-2 address. If the contents are zero, the operation continues with the next
sequential instruction. Since the operation performs no other checking, we must
ensure that the count is initialized with a positive, nonzero amount.
3. For BCTR, if operand-2 specifies register-O, 1 is decremented from the operand-1
register, but no test is made and no brancn taken. This use of BCTR is a con¬
venient way of decrementing by 1 the value in any register. For example,
assume that register-7 contains a positive value:

BCT 7,K50 means decrement register-7 by 1, and if nonzero branch to the

address K50.
LA 9,K50
BCTR 7,9 means decrement register-7 by 1, and if nonzero, branch to the
address in register-9 (K50).
BCTR 11,0 means decrement register-11 by 1 and continue with the next
instruction.

Figure 10-5 depicts a table search using two registers and BCT. The search
argument is a 3-character field called JOBNO. The table, called JOBTABLE contains
60 5-byte entries, a 3-character Job number as the table argument, and' a 2-byte
00312E
4 1 JOENO OS CL3
003131 JOB NUMBER - SEARCH ARGUMENT
42 RATE OS PL 2
RATE FOR STORING FOUND FUNCTION

003133 F0FCF6585C 44 JOBTABLE DC C* 006* .P•5.

003138 FGF1F2715C ♦ JOB NO. 3 BYTES. RATE 2 BYTES
45 DC C* 012* .P»7.
003130 FCF1F5630C 46 CC C* 015*,P*8. *
003142 47 OS 57CL5 * REST OF TABLE
48 4 •
49 * •
50 * •

00325F 0C
003260 4160 4131 52 LA 6,JOBTABLE
003264 4190 003C LOAO AOORESS OF JOB TABLE
S 3 LA 9,60 LOAD NO. OF ENTRIES
003268 D5 02 412C 6000 55 K10LOOP CLC JOBNO.0<6)
00326E 4780 427C INPUT JOB* 1 TABLE JOB* ?
56 BE
003272 4160 6005 K20EQUAL * EQUAL - FOUND
57 LA 6.510.6) INCREMENT BY 5 FOR NEXT ENTRY
003276 4690 4266
58 BCT 9.K10L00P
0 032 7 A 47F0 50A4 DECR REG 9 BY 1. NOT ZER07 - LOCP
59 B R10INV
* ZERO? - NOT IN TABLE. ERROR
00327E F611 412F 6003
61 K20ECUAL ZAP RATE.3(2,6)
STORE RATE from TABLE

FIGURE 10-5 Table look-up using a count and BCT operation.

223 Tables

packed rate as the function. The function when found is to be stored in a field called
RATE. The example loads the number of entries in the table, 60, into a register. BCT is
used to decrement this count. If the loop is performed 60 times, the count is reduced
to zero, and the required argument is known to be not in the table. An advantage of
this approach is that Job numbers need not be in ascending sequence, so that the
most commonly referenced Job numbers could be first in the table.

BRANCH ON INDEX LOW OR EQUAL—BXLE. This instruction requires the use of

three registers, two of which are an even-odd pair. BXLE does not directly reference
the odd-numbered register. Before executing the BXLE we must ensure that all three
registers are properly initialized. BXLE is an RS format instruction with three oper¬
ands. The rules are:

1. Operand-1 specifies a register containing generally a count or an address.

2. Operand-2 normally denotes the even-numbered register of an even-odd pair
such as 10 and 11. It contains a value used to increment or decrement the
operand-1 register. All 31 bits are added in normal binary addition. The odd-
numbered register is not directly referenced. It contains the limit or address
against which operand-1 is compared.
3. Operand-3 references a storage address, the branch point for low/equal condi¬
tions.

On execution, BXLE adds the operand-2 even register constant to the

operand-1 register. Operand-1 is then compared to the unreferenced odd register. If
the operand-1 contents are low or equal, the program branches to the address in
operand-3. If the contents are high, the program continues with the next sequential
instruction.

Note: If the register in operand-2 is odd rather than even, the compari¬
son is made to the operand-2 odd register rather than to the next register.
Therefore, the operand-2 register is both the increment (decrement), and
the limit.

Figure 10-6 illustrates a table search using three registers and the BXLE instruc¬
tion. The table, JOBTABLE, is defined in Figure 10-5. This example loads the length
of each entry (5) and the address of the last entry into the even-odd registers, 8 and 9.
BXLE increments the address of base register-6 by the constant 5 in register-8. If the
base register exceeds the address of the last entry, the program has stepped through
the table without locating the required argument.

BRANCH ON INDEX HIGH—BXH. BXH is similar to BXLE except that whereas

BXLE branches if not high (low or equal), BXH branches if high. BXH is used to
search through tables from the high argument through the low argument, that is a
"reverse scan".
224 EXPLICIT USE OF BASE REGISTERS

66 ♦
67 ♦ 8XLE BRANCH CN INDEX LOW OR EQUAL
ee *
69 LA 6.J0BTA8LE LOAD ADDRESS OF JOB TAeLE
70 LA 8.5 LOAD LENGTH OF EACH ENTRY
71 LA 9.J0BTABL£+59*5 L0AC AODRESS OF LAST ENTRY

73 L1OL OOP CLC J0BNC.0I6) INPUT JOB* : TABLE JOB* 7

74 BE L20ECUAL * EQUAL - FOUND
75 BXLE 6.8.L10LQOP INCR REG 6 BY 5. CCMP REG 6 : 9
76 *
* L0/EQ7 - BRANCH TO L10LOOP
77 B R1CI X V * HIGH7 - NOT IN TABLE

79 L20EQUAL ZAP RATE.3(2.6) STORE RATE FROM TABLE

FIGURE 10-6 Table look-up using BXLE.

SUMMARY. The preceding examples give some of the common methods of ter¬
minating a table search. The commonest and simplest method is to define the last
table argument with a high value, such as hex F's for character and nines for packed
format. The methods using BCT and BXLE are efficient if enough registers are avail¬
able. We should use whatever method is efficient and clearly understood.

Problems 10-1, 10-2, and 10-3 should now be attempted.

DIRECT TABLE ADDRESSING

Table arguments are normally arranged sequentially, but are not necessarily con¬
secutive. Consider a table composed of discrete arguments, such as Job numbers or
inventory Stock numbers. If the table is both sequential and consecutive, such as
I D, I i ,1 z, then we do not require table arguments or a table look-up. To locate
he required function, we can by direct table addressing calculate its reladve por¬
tion m the table For example, the function for Stock item 0010 would be the tenth
entry m the table. Direct table addressing is an extremely efficient way of locating
functions, because no repetitive looping and comparing are required Y §
Refer to the table of numeric and alphabetic months in Figure 10-4 The table
contains arguments of numeric months from 01 through 12 that are both sequential
tThl C°"fCUtlVe- AFl§ure 10-7 omits the arguments and finds the function by direct
e addressing. Assume that the search argument, MONIN, contains 04 for Aoril
The month is tested and found valid. It is converted into a register aTd decremented

hex ;i8BV's8 t'hnCeSCh tabr'e emrY iS 9 IOn8' the 3 is mu|hphed by 9, giving 27 or

X 40 B ’ I0" r ^SS ° MONTABLE is X'4°00', when added to X 1 B' we ge
a 401 B , the correct address for 'APRIL'. e &et

Note: We must ensure that the search argument is valid. For example if
the search argument is incorrectly punched as 14, then the program will
calculate an address that is outside the bounds of the table.
225 Direct Table Addressing

004000 01C1C5E4C109E840 88 MONT ABLE oc C'JANUARY • TABLE OF 12 9-CHARACTER

004009 C6C5C209E4C109E8 89 oc C•FEBRUARY • * ALPHABETIC MONTHS
004012 D4C109C3C8404040 90 oc C*MARCH • *
0040 1 0 C10709C903404040 91 DC CAPRIl • 4
004024 0 4 C 1E84040404C40 92 DC C'MAY • «
0 040 2D 01E4D5C540404040 93- DC C* JUNE • 4
004036 D1E403E640404040 94 DC C*JULY • 4
004G3F C1E4C7E4E2E34040 95 OC C*AUGUST • 4
004048 E2C507E3C5D4C2C5 96 DC C* SEPTEMBER* 4
004051 06C3E306C2C50940 97 DC C*OCTOBER • 4
0 0 40 5 A 0S06E5C5D4C2C509 98 DC C•NOVEMBER • 4
004063 C4C5C3C5D4C2C509 99 OC C * DE CE MBER • 4

004C6C 00004000 101 ADDRTA8 DC A(MCNT ABLE) AODRESS OF TABLE

0040 70 102 DBLEMORD OS 0 DOUBLE WORD FOR SEARCH AR<
103 4 •
104 * •
004078 F27 1 506E 4C90 105 PACK DBLEtfORO,MONIN PACK MONTH IN DOUBLE WORO
00407E F970 506E 50AA 106 CP DBLEIORO *=P •1• IS MONTH < 1 7
0C4C84 4 74C 50A4 107 BL RSOLOM YES - ERROR

004088 F971 506E 50A6 109 CP OBLEWORO,=P*12* IS MONTH > 12 7

C0408E 4720 50A4 1 10 BH R60HIGH YES - ERROR

004092 4F7C 506E 112 CVB 7.DBLEWORD CONVERT MONTH TO BINARY

C 04 096 0670 1 13 BCTR 7.0 DECREMENT MONTH BY 1
0C4C9e 4C70 5CA8 114 MH 7 . = H* 9 * MULTIPLY MONTH BY LENGTH
00409C 5A70 506A 115 A 7,ADORTAB ADO TABLE ADDRESS
0C40A0 D2C8 40F6 7000 1 16 M VC PRINT410C<9).01 7) MOVE ALPHABETIC MONTH

FIGURE 10-7 Direct table addressing.

CALCULATION OF THE DIRECT ADDRESS. Assume the following:

A(F) = the address of the required function

A(T) = the address of the table

SA = the value of the search argument

L = the length of each function

N = the value of the table argument representing the first, or lowest, function in
the table. SA N.

The function is located by the formula: A(F) = A(T) + [(SA-N)x L], In the example
program, A(T) = X'4000', L = 9, and N = 01 (for January). Given search arguments of
respectively 01, 02, and 12, the calculation of A(F) is as follows:

SA: Calculation of A(F):

01 X'4000' + [(01-1) X 9] = X'4000'

02 X'4000' + [(02-1) x 9] = X'4009'

12 X'4000' + [(12-1) x 9] = X'4063'

Check the logic of the formula and the calculations of A(F) against the table in Figure
10-7.
 226 EXPLICIT USE OF BASE REGISTERS

SORTING DATA IN STORAGE

Computer manufacturers supply package "utility" programs for such operations as

sorting. These programs are used to sort disk and tape records according to some
user-specified sequence. Records are read by the sort program into main storage,
sorted into the new sequence, and written on another disk or tape. More records are
read, sorted, and eventually merged with the previously sorted records on disk or
tape. Finally, the entire file is processed and the file is fully sorted.
Occasionally a program must be written to sort data. This problem should not
be confused with the sorting of records on disk or tape. To sort data we must write
our own routine. Data to be sorted typically is in the form of a table. The table is
arranged in sequence of the argument; generally it is to be rearranged in sequence of
the function.
In the example in Figure 10-5, the argument was the Job number and the
function was the rate-of-pay. Assume that we are to sort the table by the rate-of-pay
in order to print a report as ascending rate-of-pay with Job number. Figure 10-8 gives
the coding for the sort, one of many techniques.

C 0280 2 4 16C 3057 7 SICSCRT LA 6.J0ETABLE REGe: ADDRESS OF 1ST ENTRY

002806 4 170 3 1 7E 8 LA 7,JOeTABLE+59*5 REG7: ADDRESS OF LAST ENTRY
00280 A 4 180 31 79 9 LA 8,JCeTABLE*5e*5 REG8: ADDRESS OF NEXT-TO-LAST

C0280E 4 190 6005 1 1 S2C LA 9.5(0.6) REG9: ADDRESS OF REG-6 ♦ 5

0C2812 F9 1 1 6003 90 C 3 1 3 S3 C CP 3(2.6) .3(2,9) compare functions (rate-of-pay)

002816 4 7D 0 303E 1 4 BNH S40 * NOT HIGH - BYPASS EXCHANGE
0028 1C 0202 3C54 6000 1 5 M VC SAVES.0(6) EXCHANGE
002822 0202 6000 9C0C 16 M VC 0(3,6).0(9) * JOB NUMBERS
002828 D 2 02 9000 3054 1 7 M VC 0(3,9),SAVE3 *
00282E F8 1 1 3052 6003 18 ZAP SAVE2.3(2,6 ) EXCHANGE
002834 F611 6003 9003 1 9 ZAP 3(2,6) .3(2,9) * RATES-OF-PAY
0028 3A F6 1 1 9003 3052 20 ZAP 3(2.9),SAVE2 •
002e4C 4 1 SC 9CC5 22 S4C L A 9,5(C,9) INCREMENT REG9 BY ENTRY-LENGTH 5
002844 1 997 23 CR 9.7 ADD H IN REG 9 : AD DR LAST ENTRY?
002646 4 7D0 30 1 0 24 BNH S30
* NOT HIGH - CONTINUE SORT

0 02 8 4 A 4160 6005 26 LA 6,5(0 ,6)

00284E 1 968 INCREMENT REG6 BY ENTRY-LENGTH 5
27 CR 6,8
002e50 47DC 30 0C ADDR IN REG 6IADDR NEXT-LAST
28 BNH S20
* NOT HIGH - CONTINUE SORT
29 ♦ •
30 * •
END OF SORT
3 1 * •
O028S4 32 SAVE2 DS PL 2
002656 33 SAVE3 OS CL 3

002e 59 FCFCF2999C 35 JGBTABLE DC C•C 02• ,P*9.99* JOB NO. 4 RATE-OF-PAY

00285E FOFOF6876C 36 4 DC C•006•,P•8.76• *
cc2ee3 FCF1F2715C 37 CC C•0 I 2* , P • 7 •15* *
002868 F0F2F6585C 38 DC c•026*.P's.es* *
0 02 860 F1F2F3450C 39 CC C*123*,P *4.50 • *
40 ♦ DC • REST
4 1 ♦ DC • CF
42 ♦ DC •
TABLE ENTRIES

FIGURE 10-8 Program to sort table functions in ascending sequence

227 Sample Program—Calculate Stock Value

This routine works as follows: Function-1 (the first rate of pay) is compared
against function-2. If function-1 is higher, the two entries are exchanged. Function-1
is next compared against function-3. If function-1 is higher, they are exchanged.
Function-1 is compared successively against each other function, until eventually
the lowest entry is stored in entry-1. Function-2 is then compared against function-3,
function-4, etc., until the second lowest entry is stored in entry-2. The remaining
functions are compared against the higher functions as in the preceding steps, ex¬
changing entries where necessary. Once the next-to-last function compares to the
last function, the sort is ended.

BINARY SEARCH

For long tables that do not lend themselves to direct addressing, it is often more
efficient to use a binary search rather than a regular sequential table look-up. The
search uses an approach of successive halving. It starts at the midpoint of the table—
if the search argument is higher than the mid entry, we compare to the midpoint of
the upper half of the table; if lower than the mid entry, we compare to the midpoint
of the lower half. The search continues in this fashion until the argument is found or
determined as not in the table. The following routine uses the same table as in Figure
10-8, the sort.
Note that COUNT initially contains a value of one more than the number of
arguments in JOBTABLE (i.e., if JOBTABLE has 50 arguments, then COUNT contains
51). The routine initializes register-6 with 1 for the low entry-point, and loads
COUNT in register-10 for the initial high entry-point. It uses these two values to
calculate the midpoint (initially [1 +51] -e 2 would give entry 26 as the middle).
Since the length of each entry is five bytes, the routine multiplies this midpoint value
by 5 to calculate a displacement, and adds the starting address of JOBTABLE (actually
JOBTABLE-5) for the direct address of the midpoint. Use JOBTABLE as defined in
Figure 10-8 with five arguments, and work through the binary search routine in
Figure 10-9 to locate each of the five arguments.

SAMPLE PROGRAM—CALCULATE STOCK VALUE

The flowchart in Figure 10-10 and the program in Figure 10-11 illustrate the use of
subroutines and many features in the last two chapters. The objective is to calculate
the cost of inventory Stock on hand. There is one type of input record containing:

Column 3-4 Branch number

5-8 Stock number
11-13 Quantity

The program reads each input record and checks sequence on Branch/Stock number:
228 EXPLICIT USE OF BASE REGISTERS

COUNT os f NUMBER OF ENTRIES IN TABLE + 1

SEARCH DS CL 3 SEARCH ARGUMENT

LA 6, 1 LOAD INITIAL LOW ENTRY

L 10,COUNT LOAD INITIAL HIGH ENTRY
LA 6.0 CLEAR MIO-POINT

C1OLOOP LR 9,6 LOAD LOW ENTRY IN CALC’N REGISTER

AR 9.10 ADO HIGH ENTRY TO CALCN REGISTER
SR A 9, 1 MID = 1/2 SUM
CR 8,9 COMPARE NEW MID TO PREV. MIO
BE R1OERR ERROR IF EQUAL - ENTRY NOT IN TABLE

LR 0.9 MID NEW MIO INTO PREVIOUS

LA 5.JOBTABLE-5 LOAD AODR OF TAB MINUS ENTRY LENGTH
MH 9,=H•5• DISPLACEMENT = MID X ENTRY LENGTH
AR 5.9 ADD DISPLACEMENT TO ADDRESS
CLC SEARCH,0(5) COMPARE SEARCH TO TABLE
BE OlOFOUNO * EQUAL - FOUND
BL C20LGW * LOW

LR 6,8 * HIGH - LOAD MID INTO LOW

8 Cl OLOCP

C20L0W LR 10,8 * LOW - LOAC MID INTO HIGH

B ClOLOCP

DIOFOUND • • • ROUTINE FOR FOUND CONDITION

R10ERR • • • ROUTINE FOR NOT FOUND

REGISTER USAGE ;
5 FOR CALCULATION OF THE TABLE AODRESS.
6 LOW ENTRY NUMBER for the TABLE. INITIALIZED TO 1.
a MID-POINT NUMBER
FOR THE TABLE.
9 FOR CALCULATION OF THE TABLE DISPLACEMENT.
10 HIGH ENTRY NO. FOR TABLE. INITIALIZED WITH NO. OF ENTRIES +■

FIGURE 10-9 Binary search.

Low — Error routine for out-of-sequence input.

Equal — Add the quantity on the record to the accumulated quantity for that stock
number.
High — Use the Stock number for the previously stored stock to search a table The
table contains Stock number, unit cost, and description. If the item is found the
routine calculates cost = quantity x unit cost. If not found, this is an error.

The program prints totals of cost by Stock number (minor), Branch number
(intermediate), and final total (major). It is organized as follows:

Initialization Section initializes the base register, opens the reader and print files and
sets the line counter to a high value to force an initial page overflow.
Main Logic Section reads input records and sequence-checks by Branch/Stock
totals*1"' AUheend of file' A40END'the Program prints Stock, Branch, and Final

Process Receipts Subroutine, E10RECT, adds the quantity received to Stock quantity.
Cost Calculation Subroutine, CIOCALC, is performed for a new Stock number and
229 Sample Program—Calculate Stock Value

Branch totals
Process receipt subroutine
subroutine

FIGURE 10-10 Flowchart to calculate stock values.

 * INITIALIZATION
*

PROGIO START 0
SAVE <14,121
e ALR 3.0 INITIALIZE BASE REGISTER
USING 4.3
ST 13.SAVEAREA+4
LA 13.SAVEAREA
OPEN (FILE IN.< INPUT)•PRTR,(OUTPUT))
LH 10, = H # 55• SET LINE COUNT PAST MAXIMUM
e al 9,P1 OPAGE PRINT HEAO ING FOR PAGE I

4 MAIN LOGIC
4
A10READ GET FILEIN,INAREA
CLC CTLIN.PREVCTL NEK BRANCH/STOCK J PREVIOUS?
BE A30EQ 4 EQUAL - PROCESS RECEIPT
BL R10SEC 4 LOK - OUT-OF-SEQUENCE
*
4 HIGH - NEK STOCK NO.
CL I PREVCTL.X*00• FIRST RECORD OF FILE?
BE A30EQ 4 YES - PROCESS RECORO
E AL 9,P1 OPAGE CHECK FOR PAGE OVERFLOK
eAL 9.G10CALC CALC. A PRINT UNIT COST

CLC BRANCHIN.PREVBR NEK BRANCH = PREV BRANCH?

BE A30EQ 4 YES - PROCESS RECORD
BAL 9.H1OBRNCH 4 NO - PRINT BRANCH TOTAL

A30EQ EAL 9.E10RECT PROCESS RECEIPT RECORD

B A 1 OREAD

ENO-OF-FILE

A40END EAL 9.G10CALC

EOF - CALC A PRINT UNIT COST
EAL 9,H1OBRNCH • PRINT BRANCH TOTAL
BAL 9,J1OF INAL * PRINT FINAL TOTAL
CLOSE (FILEIN..PRTR)
L 13,SAVEAREA+4
RETURN (14,12)

PROCESS RECEIPT SUBROUTINE

E10RECT PACK QTYPK,QTYREC IN

AP QTYPKCK.QTYPK
ADD QUANTITY RECEIVED TO STOCK
MVC PREVCTL.CTLIN
STORE BRANCH-STOCK IN PREV
BR 9

* COST CALC L ' N SUBROUTINE

*
GIOCALC LA 2,COSTABLE
INITIALIZE TABLE SEARCH
G20 CLC PREVST K,0(2)
INPUT STOCK* : TABLE STOCK*?
BE G30
* EQUAL - FOUND
BL R20N0STK
4 LOK - NOT IN TABLE
AH 2,=H•14*
* HIGH - TEST NEJ(T ENTRY
B G20

G30 ZAP COSTPKDK.4(3,2)

EXTRACT UNIT COST FROM TABLE
CVB 1 .COSTPKDK
CONVERT UNIT COST TO BINARY
CVB 0.QTYPKDK
CONVERT QUANTITY TO BINARY
MR 0,0
MULT UNIT COST BY QUANTITY
CVD 1 .COSTPKDK
CONVERT COST TO PACKED

MVt COSTPR.EOCOS EDITS

ED COSTPR.COSTPKDK+4
* STOCK COST
MVC UNCOSPR.EDUNIT
EO UNCOSPR,4(2)
* UNIT COST (FROM TABLE)
MVC QTYPR.EDQTY
ED QTypr.qtypkdk+5
* QUANTITY

FIGURE 10-11

230
 MVC 0ESCRIPR.7I2)
MOVE DESCRIPTION (FROM TABLE)
HVC STOCKPR .PREVSTK
* STOCK NO.
PVC BRANPR.PREVBR * BRANCH NO.
eAL 11.M10WSP1
PRINT STOCK INFORMATION
AP BRCOSTPK .COSTPKDW+4(4) ADD COST TO BRANCH TOTAL
ZAP CTYPKDW.=P*o• CLEAR STOCK QUANTITY
BR 9
RETURN

BRANCH TOTAL SUBROUTINE

HIOBRNCH BAL 11.M50SPC1 SPACE 1 LINE

MVC COSTPR(L* EDCOS+1).ECCOS
ED COSTPR,BRCOSTPK
MVC DESCRIPRI 12),=C•BRANCH TOTAL•
eAL I1.M20WSP2 PRINT ERANCH TOTAL

AP FINCOSPK,BRCOSTPK ADD BRANCH COST TO FINAL

ZAP BRCOSTPK,=P* 0* CLEAR ERANCH COST
BR 9 RETURN

♦ final total s UBROUTINE

*
J10FINAL LA 1.PA69 AODRESS OF SIGNIF. START ♦ 1
MVC COSTPRIL*EDC0SH2).EOCOS EDIT FINAL TOTAL COST
E DMK COSTPR.FINCOSPK • WITH FLOATING * SIGN
SH 1 • =H • 1 • * DECREMENT REG I ST ER-1
MV I 0< 1),C* *• * INSERT $ SIGN
MVC DESCRIPRI12),=C*FINAL TOTAL*
BAL 11 .Ml 0MSP 1 PRINT FINAL TOTAL
BR 9 RETURN

* PRINT SUBROU TINE

4
MOOSK IP MV I P.X*88* SKIP TO PAGE
SR 10.10 CLEAR LINE COUNT
B M90PR INT
M10ASP1 mv r P.X* 09* WRITE. SPACE 1
AH 10,=H • 1 • ADD 1 TO LINE COUNT
B M90PRINT
M20WSP2 MVI P.X* 1 1* WRITE. SPACE 2
AH 10.=H•2• ADD 2 TO LINE COUNT
B M90PRINT
M50SPCI MVI P.X* OB* SPACE. NO WRITE
AH 10.=H*1 • ADD 1 TO LINE COUNT

M90 PR I NT PUT PRTR.PRINT

MVC PR I NT.BLANK
eR 1 1

* PAGE HEADING SUBROUTINE

P10PAGE CH 10.=H*S5* END OF PAGE?

BL P20 • NO - EYPASS PAGE OVERFLOW
eAL 11,MOOSKIP SKIP TO A NEW PAGE
MVC PRINT.PRHEAD1
BAL 11.M20WSP2 PRINT REPORT HEADING-1
MVC PAGEPR.EDPAGE SET UP
EC PAGEPR.PAGEPK • PAGE NO.
MVC PRINT.PRHEAD2
eAL 1 I .M20WSP2 PRINT REPORT HEADING-2
AP PAGEPK* = P•1 • INCREMENT PAGE COUNT
P20 BR 9 RETUflN

FIGURE 10-11 (Continued)

231
 4 ERROR ROUTINES
*
RIOSEQ MVC P+41IL*ERRSEO),ERRSEQ OUT OF SEQUENCE BRANCH-STOCK
B RBO

R20NOSTK MVC P*41< L•ERRST KJ.ERRSTK STOCK ITEM NOT IN TABLE

SPACE
Rao MVC STOCKPR.PREVSTK
MVC ERANPR.PREVBR
eAL U.M20WSP2 PRINT ERROR MESSAGE
CLOSE (FILEIN.,PRTR»
ABENC 09.DUMP

* DECLARATIVES
* _

FILEIN DCB BLK SIZE = 8 0. DEFINE THE INPUT FILE ♦

ODNAME=SYSIN. 4
OEVD=DA, ■f
OSORG=PS, 4*
EOOAD=A40END. 4-
MACRF = (GMI

PRTfi CCB BLKSIZE=133. DEFINE THE PRINTER FILE 4

DONAME=SYSPRINT. 4*
DEVD=OA.
•4
DSORG=PS,
4*
MACRF = (PM ) ,
4
RECFM=FM

SAVEAREA DS
REGISTER SAVE AREA
DS
00 PACKED - ALIGNED 00U8LEK0RD:
CCSTPKDW DC PL8 # 0 • *
QTYPKD4 DC PL8• 0 • *

qtypk DC PL2•0•
NORMAL PACKED DECLARES:
BRCOSTPK DC PL4 • 0 • *
FINCOSPK DC PL 4*0* 4
PAGEPK DC PL 2 • 1 • 4

ERRSEQ DC C’RECORD OUT OF SEQUENCE CN ERANCH/STOCK•

errstk OC C'STOCK ITEM NOT IN TABLE*

PREVCTL DS 0CL6
PREVIOUS CONTROL WORD
PREVSR DC XL 2 • 0 0 •
* BRANCH NO.
PREVSTK DC XL4•00•
* STOCK NO.

E DCCS DC
X*40202068202021482020C309*.C*44*
EDUNIT DC X*402020214B2020*
EDQTY DC X*402020202020C309*
edpage CC X * 40202020•
4
STOCK table:
COSTABLE DC C* 1234*.P*0 01.0 0* .C•GIDGET S• STOCK NO.. COST. DESCR * N
DC C•24$8* .P* 015.25* *C* 4I0GETS* 4
DC C * 24 70•*P•100.17*.C*MIDGETS* 4
DC
C*2844*,P*020.00*,C*FIDGETS* 4
OC 4X*FF* »PL3*0*,C*INVALID*
* end of table

INAREA DS 0CL80
INPUT RECORD:
CODE IN DS CL2
01-02 RECORD CODE
CTLIN DS 0 CL 6
branchin DS BRANCH/STOCK CONTROL MORD
CL2
03-04 BRANCH
STOCKIN OS CL 4
05-08 STOCK NO.
DS CL2
09-10 UNUSED
QTYRECIN DS ZL3
11-13 QUANTITY
DS CL6 7
14-80 UNUSED

FIGURE 10-11 (Continued)

232
 PRHEADl DS 0CL133
heaoing-i area:
DC CL29* • *
DC CL 104*1 N V E N T 0
RY UNIT COST REPORT

PRHEAD2 OS OCL133 HEADING-2 AREA

CC CL 15* • ♦
DC CL29•BRANCH STOCK* ♦
DC CL42*GUANTITY UNITCO ST COST•
DC CLC 9• PAGE* ♦
PAGEPR OS CL04 *
oc CL34• • *

BLANK DC C • •
BLANK FOR CLEARING PRINT AREA
PRINT DS OCL133
REPORT PRINT AREA
P DS CLO 1 ♦
DC CL I6• • ♦
BPANPR DS CL 0 2
♦ BRANCH NO*
CC CL03• • *
STQCKPR OS CL 04
♦ STOCK NO.
DC CL02* • *
OESCRIPR OS CLOT
* DESCRIPTION
DC CLC 9• • *
qttpr DS ZLca * QUANTITY
DC CLOI• • ♦
UNCGSPR DS ZL07
♦ UNIT COST
DC CL01* • *
COSTPR DS ZL 12 * cost
OC CL60* • ♦

END PROG 10

TEST INPUT DATA:

DEPT STOCK QTY

03 1234 125
03 2844 086
03 2844 086
05 2470 035
05 2470 035

R Y UNI T

BRANCH STOCK QUANTITY UNITCOST COST PAGE

03 1234 GIDGETS 125 1.00 125.00

03 2844 FIDGETS 172 20.00 3.440.00

BRANCH TOTAL 3.565.00 •

05 24 70 MIDGETS 70 100.17 7.011.90

BRANCH TOTAL 7.011.90 ♦

FINAL TOTAL * 10.570.90 **

FIGURE 10-11 (Continued)

234 EXPLICIT USE OF BASE REGISTERS

for end-of-file. The routine includes a table look-up, binary multiplication, and
printing of the Stock detail line. It also adds Stock cost to Branch cost.
Branch Total Subroutine, HIOBRNCH, is performed on a change of Branch and at
the end-of-file. It prints Branch cost and adds to Final cost.
Final Total Subroutine, IIOFINAL, performed at the end-of-file, prints total Final cost.
Page Heading Subroutine, PIOPACE, is performed at the start of the program and
whenever the end of a page is reached.
Error Routines process out-of-sequence records and Stock items not in the table.

Register Usage:

0,1 Calculation of binary cost

1 EDMK
2 Table look-up on the Stock Cost Table
3 Base register for program addressing
9 Subroutine linkage
10 Line count for page overflow

DEBUGGING TIPS

Among the many common errors that programmers tend to make when using tables
are the following:

There are arguments missing from the table, or the functions are incorrect.
Argument/function also may not be consistently the same length.
— The increment value for stepping through the table is incorrect.
— There is no way to ensure termination of the search, so that a CLC, for example
may continue frantically checking right through main storage.
— The branch instruction that returns to perform the next compare goes instead to
the preceding instruction that initializes the search:

W30SRCH LA 9,TABLE
CLC

B W30SRCH

w'ifh o^8ratorSIOOPS endle5sly-an error more P°Pul*r with programmers than

’ ^rf,iCa'ed.rOUtineS SUCh 35 direct addressinS- binary search, and sorting can

rntP natVPHCtfh Ular err°rs‘ ^OSt Pro§rammers code these so carefully they8exe-
cute perfectly the first time (but everything else blows up!).

This chapter completes comments on debugging. At this point you are far
enough advanced and your programs so complex that your best debugging aids are
carefulness, detective skills, hex storage dumps, and access to an experienced svs
terns programmer. wpenencea sys-
235 Problems

PROBLEMS

10-1. Given the contents of registers: 7 = X'3000', 8 = '4500', and 9 = X'4000',

what is the result in register-6 for LA 6,7(8,9)?
10-2. What is the effect of the following AP?

TOTAL DS PL5
AMOUNT DS PL4
LA 8,TOTAL
LA 9, AMOUNT
AP 6(5,8),0(4,9)

10-3. Provide the code to extract today's date from your computer system. Assume
any necessary declaratives.
10-4. What are the various ways an Assembler program may use to force termina¬
tion of a table look-up? What may be the result if some provision is not made
to force termination if the argument is (a) packed; or (b) character?
10-5. Assume that register-4 is initialized to zero in each case. Given declaratives
BIN1 and BIN2, explain the code and determine the contents of register-4 in
each case.

(a) (b)
BIN1 DC F‘20’ L 6, BIN 1 LA 5,100
BIN2 DC F‘200’ A15 A 4, = F‘2’ LM 8,9,BIN1
BCT 6,A15 B15 A 4,=F‘3’
BXLE 5,8,B15

10-6. What does the following accomplish?

LA 6,W30
LA 5,10
BCTR 5,6

10-7. Define the table required to calculate the current federal income tax. Use a
field called TAXINC for taxable income to locate the required rate. Calculate
TAX based on this rate.
10-8. Direct table addressing. Assume a payroll table, with consecutive job num¬
bers from 031 through 055. Each job number has an associated rate-of-pay
(xx.xx) as the function. The following declaratives are given:

JOBNO DS CL3
HOURS DS P’00.0’
WAGES DS P’0000.00’

Code the declaratives for the payroll rate table, called JOBTAB. Write the
routine to use JOBNO to locate the correct rate in the table. Multiply HOURS
by the rate, round the result to two decimals, and store it in WAGES.
10-9. CUSTOMER BILLING FOR ELECTRIC CONSUMPTION.
236 EXPLICIT USE OF BASE REGISTERS

Required: A program that reads customer billing records containing previous

and present electric reading, and calculates consumption and the billing
amount.
Input: Customer billing records containing:

BILLING MASTER CONSUMPTION CARD

Record code 1-2(31) 1 -2 (32)

Region 3 -4 3-4
Customer number 5-9 5-9
Customer name and address 10-69

Previous reading: Day/month/year 10-15 (dd/mm/yy)

Meter reading 16-20
Present reading: Day/month/year 21 -26 (dd/mm/yy)
Meter reading 27-31

Procedure:
— Check for valid record codes, and sequence-check the file according to
region-customer number. Within a region, customer numbers are in as¬
cending sequence. Each customer has one billing master card (31) fol¬
lowed by one consumption card (32).
— Calculate electric consumption in kilowatt-hours = present reading -
previous reading and calculate the billing amount based on the electric
billing schedule for your community.
— Print the detail for each customer, and print total consumption and billing
amount for each region and for the final total.
— Use subroutines extensively.
 CHAPTER 11

LOGICAL OPERATIONS AND

BIT MANIPULATION

Certain logical operations, such as CLC, CLI, MVC, and LA treat data as "logical”.
The operations assume that the fields contain no sign, and act nonalgebraically on
each byte as a string of eight bits. Similarly, certain binary operations process binary
data as logical by treating all 32 bits of the binary fullword as unsigned data. The first
section discusses the logical operations that add, subtract, compare, and shift. These
instructions are useful if arithmetic fields are of such magnitude that they require
double precision, a 63-bit field plus a sign bit. Such a field requires two registers: the
left one contains the sign and the leftmost 31 data bits; the right register contains the
rightmost 32 data bits.
Of greater use are the other logical operations: Test Under Mask, Translate, and
Translate and Test. Although technically a branch operation, Execute is also in¬
cluded. These instructions provide a repertoire of powerful techniques to manipulate
bits, to translate bits to other codes, and to handle variable length records. Logical
operations are also used to translate binary (fixed-point) to floating-point format.

LOGICAL OPERATIONS

ADD AND SUBTRACT LOGICAL—AL, ALR, SL, SLR. These instructions treat bi¬
nary fields as unsigned logical data.

237
238 LOGICAL OPERATIONS AND BIT MANIPULATION

NAME OPERATION OPERAND

AL R1 ,X2 or R1,D2(X2,B2)
[symboll ALR R1 ,R2
SL R1,X2 or R1,D2(X2,B2)
SLR R1 ,R2

AL, ALR, SL, and SLR are similar to A, AR, S, and SR, with the following
differences: (1) Since the field is treated as logical data there is no sign; all 32 bits are
added or subtracted; (2) There may be a carry out of the leftmost bit (bit 0). For
subtract, if the carry out of bit 0 differs from bit 1, an overflow occurs; (3) The
condition code is set as follows:

CODE ADD SUBTRACT

0 Zero sum Zero difference

1 Nonzero sum Minus
2 Zero sum, with carry Plus
3 Nonzero sum, carry Overflow

DOUBLE PRECISION ADDITION. Double precision binary fields contain a sign bit
and 63 data bits. We must give such fields special programming consideration,
because a register can handle only 32 bits.
Assume two 64-bit fields, called DBL1 and DBL2, are to be added, and the
result stored in DBL1. Figure 11-1 gives the coding. It is necessary to split each field
into two 32-bit fields. DBL1 is loaded into register-6 (the leftmost 32 bits) and
register-7 (the rightmost 32 bits). The sign is the left bit of register-6. The rightmost 32
bits of DBL2 are added to register-7. We use a logical add because register-7 has no
sign bit. If an overflow occurs, a bit has been lost; adding 'V to register-6 remedies
this situation. Then the leftmost 32 bits of DBL2 are added to register-6. The example
shows two 5-bit registers for ease of understanding. Check the binary values for each
step.

6 * REG-6: REG-7
7 DBL1 os 0 00 101 110 10 ASSUME 10-BIT FI ELC 186
8 DBL2 DS 0 0001 1 10110 ASSUME 10-BIT FIELD 11 8

10 L 6iDBL1 00101 LOAD LEFTMOST 32 BITS

1 1 L 7.DBL1+4 00101 110 10 LOAD RIGHTMOST 32 BITS
12 AL 7 »DBL2+4 00101 10000 ADD RIGHTMOST 32 BITS
13 BC 12 »NCFLON BRANCH IF COI >ID CODE 0 CR 1
14 ♦ NO BRANCH IF CARRY SUM OR
15 ♦ NON-ZERO SUM
16 AH 6.=H•1• 00110 10000 ADO 1 TO LEFTMOST FIELO
17 hOFLOW A 6.DBL2 01001 10000 ADD LEFTMOST 32 BITS
18 ST 6.DBL 1 STORE LEFTMOST 32 BITS
19 ST 7 t DBL1+4 STORE RIGHTMOST 32 BITS

FIGURE 11 -1 Addition of double precision binary fi

239 Logical Operations

COMPARE LOGICAL—CL, CLR.

NAME OPERATION OPERAND

Isymbol] CL R1,X2 or R1 ,D2(X2,B2)

CLR R1 ,R2

These instructions are similar to C and CR. However, CL and CLR compare logically
all 32 bits from left to right regardless of sign. An unequal compare terminates the
operation. The usual condition code is set: Equal (0), Low (1), High (2).

SHIFT LOGICAL—SRL, SLL, SRDL, SLDL. These instructions shift bits right or left
logically regardless of sign, and treat the entire 32 or 64 bits as a single unsigned
field. Operand-1 of SRDL and SLDL references the even register of an even-odd pair.

NAME OPERATION OPERAND

SRL R1 ,S2 or R1 ,D2(B2)

[symbol) SLL R1 ,S2 or R1 ,D2(B2)
SRDL R1 ,S2 or R1,D2(B2)
SLDL R1 ,S2 or R1,D2(B2)

The rules for SRL, SLL, SRDL, and SLDL are similar to those for SRA, SLA,
SRDA, and SLDA except that: (1) All 32 or 64 bits shift; (2) Zero bits replace bits
shifted off the left or right; (3) The condition code is not set and no overflow occurs.

BINARY DATA PACKING AND UNPACKING. The following routine illustrates

shifting of logical data in registers. Frequently a file consists of thousands or hundreds
of thousands of records stored on tape or disk. One way to conserve storage is to
"pack" fields in binary format. Assume an electric utility with part of each Customer
record in character format.

NUMBER OF NUMBER OF BITS FOR

CHARACTERS BINARY REPRESENTATION
District 3 10
Account 5 17
Rate Code 1 1
Service Code I 2
10 bytes 30 bits or 4 bytes

We can store the contents of District in 3 characters or alternatively in a 10-bit

binary field, which can store a value up to 1023. Similarly, Account, with a
maximum value of 99999, can be stored in a 1 7-bit binary field. Rate Code requires
 240 LOGICAL OPERATIONS AND BIT MANIPULATION

only a 1 -bit field: 0 for domestic or 1 for commercial rate. Service Code can contain
4 possibilities requiring two bits:

CODE BITS CODE BITS

None 0 00 Meter rental 2 10

Budget 1 01 Both 3 11

Character format requires 10 bytes to store the data. Binary format requires only
30 bits or one fullword of 4 bytes. If there are 400,000 records kept on a disk or tape
file, then we have saved 400,000 x 6 = 2,400,000 bytes of disk or tape storage (not
main storage). We have to condense or compress these fields into one binary
fullword prior to writing the data on disk or tape. Figure 11 -2 illustrates coding that
performs this condensing. Because there are no signs, we can use logical shift oper¬
ations. The "packed" binary format is to be:

BITS BITS

Unused 0-1 Rate 29-29

District 2-11 Service 30-31
Account 12-28

1 45 * ASSUMED VALUES- char: binary:

146 DISTRICT DC CL3•630• 638 1101000110
147 ACCOUNT DC CL 5• 17603* 17683 00100010100010011
i4e RATE DC CL 1*1* 1 1
140 SERVICE DC CL1*2* 2 10
150 DOLBWORD OS D
151 FULLWORD DS F
152 *
REG: BINARY FORMAT:
153 BINPACK PACK DOUBWORO.01STRICT
154 CVB 6,CDUBWORD 6: -22ZER0S— —1101000110

1 56 PACK DOUBWORO.ACCOUNT
157 CVB 7.DOUBWORO 7: -- 15ZER0S -- 00100010100010011
158 SLL 7,15 7: 00100010100010011— 15ZEROS -
159 SLDL 6.17 6: 000001 1010001 1000100 01010001001 1

161 PACK DOUB W*ORD . R AT E

162 CVB 7,DOUBWORO 7: - —31 ZEROS— -1
163 SLL 7,3 1 7: 1- —31 ZEROS— -
164 SLDL 6.1 6:
00001101000110001000101000100111

166 PACK DOUBWORO.SERVICE

167 CVB 7,DOUBWORO 7: - —30ZEROS— —10
168 SLL 7,30 7: 10 - —3 0 ZEROS— _
169 SLDL 6.2 6:
170 ST 00110100011000100010100010011110
6.FULLWORD

FIGURE 11-2 Binary data packing.

Problem 11-1 should now be attempted.

241 Boolean Logic

BOOLEAN LOGIC

Boolean logic was devised by George Boole (1815-1864). Practical applications

have been in switches for telephone circuits and in the design of electronic com¬
puters. Boolean logic uses only digits 0 and 1 and has two arithmetic functions—
addition and multiplication:

ADDITION MULTIPLICATION

0 0 1 1 0 0 1 1
+0 +1 +0 +1 X0 XI X0 xl
0 1 1 1 0 0 0 1

Assembler language uses Boolean logic for the logical functions AND, OR, and
Exclusive OR (XOR) to perform bit manipulation. For each of the three logical
functions there are four instructions, in RR, RX, SI, and SS format (not available on
some smaller models).

AND: OR: XOR: Instruction Format:

NR OR XR RR
N 0 X RX or R1,D2(X2,B2)
Nl 01 XI SI or D1 (B1),S2
NC OC XC SS or D1 (L,B1 ),D2,(B2)

For all twelve instructions, operand-1 is called the target field and operand-2 is
the mask. The operations compare the bits in the mask against those in the target,
one at a time from left to right. The target bits are modified to 0 or 1 according to the
bit contents and the logical operation. The condition code is set as follows:

0 if all target bits are set to 0. Test with BZ or BNZ.

1 if any target bit is set to 1. Test with BM or BNM.

The following shows two 4-bit fields, called MASK and TARGET. The three
unrelated cases illustrate AND, OR, and XOR. Each case sets the condition code to 1.

Field: AND OR XOR

MASK 0011 0011 0011
TARGET 0101 0101 0101
Result 0001 0111 0110

AND. The logical function AND is equivalent to Boolean multiplication. If both the
mask AND and the target bit are 1, then the target bit is set to 1. All other cases set the
 242 LOGICAL OPERATIONS AND BIT MANIPULATION

target bit to zero. In Figure 11-3, NR ANDs the contents of register-8 (the mask) with
that of register-9 (the target). N ANDs the contents of MASK in storage (a fullword
aligned) with the target in register-8. Nl, an immediate operation, ANDs the single
immediate byte with the first byte of TARGET. NC ANDs the first two bytes of MASK
and TARGET.

OR. The logical function OR is equivalent to Boolean addition. If either or both the
mask or the target bit is 1, then the target bit is set to 1. Where both bits are zero, the
target bit is set to zero. Figure 11-3 illustrates the four OR operations.

EXCLUSIVE OR (XOR). If either the mask or the target bit (but not both) is 1, then

23 OS OF FORCE FULLWORD ALIGNMENT

24 MASK OC B'001101110010100111110 0011001101*
25 TARGET OC B*010101011100100110000 1110011110*
26 *
27 * ANC - nr, N. NI, NC
26 *
29 AND L 8.MASK LOAD MASK VALUE
30 L 9,TARGET LOAD TARGET VALUE
31 NR 9,8 •AND* TARGET WITH MASK

33 L 8,TARGET LOAD TARGET VALUE

34 N 8•MASK •AND* TARGET WITH MASK

36 N I TARGET.8*01010101* •AND* FIRST BYTE OF TARGET

38 NC TARGET(2J.mask •ANO* FIRST 2 BYTES OF TARGET

40 •
41 * OR - OR. C, 01, OC
42 *
43 OR L 8•MASK LOAD MASK VALUE
44 L 9.TARGET LOAD TARGET VALUE
45 OR 9.8 •OR* TARGET WITH MASK

47 L e,TARGET LOAD TARGET VALUE

48 C 8 * MASK •OR* TARGET WITH MASK

50 01 TARGET,8*01010101* •OR* FIRST BYTE OF TARGET

52 OC TARGET(2).MASK
•OR* FIRST 2 BYTES OF TARGET

54 *
55 * EXCLUSIVE OR - XR, X. XI, XC
56 *
57 XOR L 8 tMASK
LOAD MASK VALUE
58 L 9.TARGET
LOAD TARGET VALUE
59 XR 9.8
•XOR* TARGET WITH MASK

61 L 8.TARGET
LOAD TARGET VALUE
62 X 8,MASK
•XOR* TARGET WITH MASK

64 XI TARGET,B*01010101*
•XOR* FIRST BYTE OF TARGET

66 XC TARGET < 2).MASK

•XOR* FIRST 2 BYTES OF TARGET

FIGURE 11-3 Boolean operations: AND, OR, EXCLUSIVE OR.

243 Boolean Logic

XOR sets the target bit to 1. Where both are zero or 1, the target is set to zero. Figure
11-3 illustrates the four XOR operations.

COMMON USES FOR BOOLEAN OPERATIONS. Figure 11 -4 shows several appli¬

cations of Boolean operations. In CLEAR, the Exclusive OR clears an area to hex
zeros. Since both mask and target contain the same bits, Exclusive OR sets all bits to
zero. The example clears a binary field to X'OO's, all binary zeros. Some pro¬
grammers use XC to clear the print area, as XC PRINT,PRINT.

70 FULLW D OS F BINARY FULLWORD

7 1 PAGENO DC PL 2*1* PAGE COUNTER

73 A CLEAR A FIELD TO HEX ZEROS: ♦

74 CLEAR XC FULL IID . FULL WO CLEAR BINARY VALUE

♦ CORRECT SIGN FOR PRINTING: ♦

76

77 SIGN UNPK PR I NT+91< 3).PAGENO UNPACK PAGE COUNTER

78 01 PRINT+93.X* FO• FORCE F-SIGN WITH OR OPERATOR

80 A EXCHANGE 2 REGISTERS: 7 1010 a: 1001 ♦

81 REVERSE XR 7,8 7 00 1 1 8: 1001

82 XR 8.7 7 001 1 a: 10 10
83 XR 7.8 7 1001 8: 10 10

85 A CHANGE NOP TO BRANCH

SWITCH NOP CHANGE INSTRUCTION OEFINED AS NO-OP

86
87 A •
ee A •
Cl SWITCH41 ,X•FO * CHANGE SWITCH MASK TO
89
A • X•F• (B)
90
91 A •
92 e SWITCH
CHANGE N I SWITCH+1,X•OF• CHANGE SWITCH MASK TO
93
A • X*0* (NOP)
94
95 A •

97 A TEST BITS ON FOR CUSTOMER CODE:

MV C TESTiCOOE MOVE CODE TO TEST

98 CODES
N I TEST.8* 11100000* * AND* FIRST 3 BITS
99
BRANCH IF ANY BIT IS ON
100 A BNZ
10 1 A •
102 A •
103 CODE DS BL 1
104 TEST DS BL 1

A TEST CHARACTERS FOR F-ZCNE

l 06

STORE,FIELD MOVE CHARACTER FIELD TO STORE

107 ZONES M VC
STORE.=X•F0F0F0F0F0• •AND• WITH X•FO*S
108 NC
STORE,=X*FOFOFOFOF0• IF UNEQUAL. SOME BYTE HAS
1C9 CLC
NO F-ZONE
1 10 A BNE
1 1 1 A •
1 12 A •
1 1 3 FIELD DS CL 5
1 14 STORE DS CL5

FIGURE 11-4 Sample use of Boolean operators.

244 LOGICAL OPERATIONS AND BIT MANIPULATION

SIGN corrects the sign in an unpacked field. Earlier we saw that a packed field
such as/23/4C/ when unpacked becomes /F2/F3/C4/. This amount prints incorrectly
as 23D. The solution used MVZ to insert an "F"-sign in place of the C-sign, /F2/F3/F4/.
This example unpacks a page counter, PAGENO, in the print area. 01 forces all
four sign bits to be turned on, thereby adjusting the sign to X'F'. For example,
C4 OR'd with F0 gives F4.
REVERSE shows how XR may interchange two registers without the use of an
intermediary register. The 4-bit areas illustrate how the example works.
SWITCF1 illustrates switching. We may manipulate the mask in the Branch on
Condition (BC) instruction to change the program flow. BC 15 (unconditional
branch) is commonly written as B. BC 0 is a no-operation condition which performs
no branch at all; the extended mnemonic is NOP. The mask is in bits 8-11 of the
object code. The example switches the mask from X'O' to X'F' (NOP becomes B) and
vice versa. Clever, but not good programming practice.
CODES uses bits that represent yes or no conditions for customers. In the
example, a utility company customer has an 8-bit code designed as follows:

Bit 0 - Electric account Bit 4 - Electric heating

Bit 1 - Gas account Bit 5-30 days delinquent
Bit 2 - Budget account Bit 6 - Rented meter
Bit 3 - Industrial Bit 7 - Not used

A 1 -bit means the condition exists, and more than one bit may be validly on. The
example tests if the customer has any of the conditions: electric, gas, budget. The Nl
operation tests bits 0, 1, and 2; any equal bits set the condition code to 1.
ZONES tests for F-zones in a character field. This is a useful check for validity of
input data, such as date, account number, and amounts (except the units portion of
minus amounts, such as F1F2F3F4D5).
The TM instruction in the next section may more effectively test bits.

OTHER OPERATIONS

TEST UNDER MASK—TM. The previous section used bits as switches or indicators.
An efficient instruction to test bit conditions is TM, Test Under Mask

NAME OPERATION OPERAND

Isymbolj TM SI,12 or D1 (B1), 12

TM is an immediate instruction (like MVI) with two operands: Operand-1 refers

to one byte in storage, containing the bits to be tested: operand-2 is the 8-bit mask in
immediate format. One-bits in the mask indicate which bits to test in operand-1. TM
245 Other Operations

compares the 1 -bits in the mask against the selected bits in operand-!, bit for bit. For
example, if the immediate operand is B'01001100', then TM tests only bits 1,4, and
5 of operand-!. Operand-! is unchanged. The condition code is set as follows:

CONDITION
SELECTED BITS IN OPERAND-1 CODE TEST USING

All selected bits are 0 0 BZ Branch Zeros or BNZ not Zeros

Bits are mixed—some are 1 BM Branch Mixed or BNM Branch
1, some are 0 not Mixed
All selected bits are 1 3 BO Branch Ones or BNO Branch
not Ones

TM tests only the bit position of the mask that contains a 1 and ignores zero
mask positions. (Boolean operators, however, process all bit positions regardless of 0
or 1.) The extended mnemonics for testing the condition code are the same—BZ,
BM, and BO, but for TM are described differently. Branch Minus is called Branch
Mixed and Branch Overflow becomes Branch Ones.
In the example CODES in the previous section, an 8-bit code represented yes or
no conditions for utility customers. The next three examples in Figure 11-5 test this
code for BZ, BM, and BO.

7 4 TM TEST UNDER MASK

8 ♦
9 CODE OC B* 1 1 10010C*

l1 TESTZERO TM CODE•B * 00010010* ALL SELECTED BITS ARE

12 4 ez .. . BRANCH ON ZEROS
ZERO

14 TESTMIX tn CODE.8• 1000 1 100• ALL SELECTED BITS ARE MIXED

15 4 BM • • • BRANCH ON MIXED

17 TESTONES TM CODE.B * 1 1 100000• ALL SELECTED BITS ARE CNES

18 4 80 •• • BRANCH ON ONES

FIGURE 11- 5 Sample uses of test u nder mask—TM.

To test if the customer has an industrial account with a rented meter, we test
bits 3 and 6 of CODE. In the example TESTZERO, the selected bits in CODE are both
0. Because the condition code is set to 0, BZ causes a branch. To test if the customer
has an electric account, electric heating, and is 30 days delinquent in paying his bill,
we test bits 0, 4, and 5 of CODE. In the example TESTMIX, the selected bits are: bit 0
is on, bit 4 is off, bit 5 is on. Because the bits are mixed off and on, the condition code
is set to 1. BM causes a branch. To test if the customer has electric, gas, and budget,
we test bits 0, 1, and 2. In the example TESTONES, the selected bits in CODE all
contain 1. The condition code is set to 3, and BO causes a branch.
 246 LOGICAL OPERATIONS AND BIT MANIPULATION

INSERT CHARACTER AND STORE CHARACTER—1C AND STC. 1C moves a single

byte (8 bits) from storage into a register, and STC moves a byte from a register into
storage.

NAME OPERATION OPERAND

(symbol) 1C R1.X2 or R1,D2(X2,B2)
STC R1.X2 or R1,D2(X2,B2)

For both instructions, operand-1 references the rightmost 8 bits of a register (bits
24-31). Operand-2 references one byte of storage. 1C, like LH, transfers data from
operand-2 (storage) to operand-1 (register). STC, like STH, transfers data from
operand-1 (register) to operand-2 (storage). However, the 1C and STC operations do
not affect the other bits (0-23) of the register. Further, operand-2 can specify any
storage position, odd or even.

register byte in main storage

EXTENDED 1C AND STC EXAMPLE. Figure 11-6 illustrates both 1C and STC and
introduces variable length fields. This example reads a record from an input device.

which may be any length,

number preceding the field

11 e ♦
119 * IC INSERT CHARACTER
120 * STC STORE CHARACTER
12 1 *
122 XR 1. 1 CLEAR REC 1
123 LA 9,NAMADOR
ADDRESS OF 1ST LENGTH INDICATOR
124 IC 1.0(0.91 LENGTH OF NAME IN REG 1
125 LR 8. 1
LOAD REG 1 INTO REG 8
126 8CTR 1 .0 DECREMENT REG 1 ST 1

128 STC 1 .MIOMOVE+l

129 STORE DECREMENTED LENGTH
LA 9.1(0,91
INCREMENT FOR NAME FIELD
1 30 MlCMOVE M VC PR INT420 (0 } ,0(91 MOVE NAME TO PRINT
131 AR 9. 8 ADDRESS OF NAME ♦ LENGTH FOR A
2ND LENGTH INDICATOR
132 IC 1.0(0.9}
LENGTH OF ADDRESS IN REG 1
133 BCTR 1.0 DECREMENT REG 1 8Y 1
1 34 STC 1•M20MOVE+1
STORE DECREMENTED LENGTH
I 35 LA 9,1(0.9}
136 INCREMENT FOR ADDRESS FIELD
M20M0VE MVC PRINT450(01.0(91
♦ MOVE ADDRESS TO PRINT
137 •

138 • •
139 NAMADOR OS CL 4 2
VARIABLE NAME A AODRESS
140 PRINT DC CL 121* •
PRINT AREA

FIGURE 11-6 Moving variable name and address fields using 1C and STC.
247 Other Operations

name address
0A ADAM SMITH OC 423 JONES ST
hex character hex character

The name is 10 characters long. Therefore X'OA' is stored as a length indicator before
the name. Because the address is 12 characters long, X'OC' is stored before the
address. The entire record consists of 1 +10 +1 +1 2 = 24 bytes. Other records would
vary in length accordingly. The maximum record length is assumed to be 42 bytes.
The purpose is to move the name and the address separately to the print area. 1C
extracts the length indicator, and STC inserts the length indicator (minus 1) into the
second byte, the length, of the MVC instruction. (At execute-time, the computer adds
1 to the instruction length.) Carefully check each instruction. The next section uses
the EX instruction for the same example.

print area: ADAM SMITH 423 JONES ST

t t
PRINT+20 PRINT+50
Problems 11-2, 11-3 and 11-4 should now be done.

EXECUTE—EX. Although generally we keep declaratives separate from instruc¬

tions, under certain unique circumstances an instruction may be coded within the
declaratives, or at least outside of the normal execute flow. This is called a "subject
instruction" and may be executed by means of the EX (Execute) operation.

NAME OPERATION OPERAND

[symbol] EX R1.X2 or R1,D2(X2,B2)

The ability of EX to modify the second byte of the subject instruction gives us
the power, depending on the instruction format, to change the register reference, the
immediate operand, or the operand lengths. The second byte (in machine object
code) that is subject to change is underlined:

FORMAT OPERANDS

RR R1,R2
RS R1,R3,D2(B2)
RX Rj,D2(X2,B2)
SI D1(B1),|2
SS (1) D1(L,B1),D2(B2) (one length)
SS (2) D1(U,B1),D2(L2,B2) (two lengths)

The rules for EX are: (1) Operand-1 designates a register containing some value
used to modify the second byte of the subject instruction; (2) operand-2 refers to the
subject instruction, defined somewhere in storage, to be executed by EX. Any instruc-
 248 LOGICAL OPERATIONS AND BIT MANIPULATION

tion except another EX may be subject to EX; (3) EX ORs bits 8-15 (byte 2) of the
subject instruction with bits 24-31 (the rightmost byte) of the operand-1 register. The
subject instruction, however, is not actually changed in storage. Exception: If
register-0 is specified, no modification is done. After executing the subject instruc¬
tion, the program either returns to the next sequential instruction following the EX or,
if the subject instruction is a branch, to where the branch is directed.
Figure 11-7 depicts each instruction format subject to EX. (In practice, the
contents of the operand-1 register would generally be a result of a calculation.) In
each case the second byte of the subject instruction (ADDREG, STOREGS, etc.) is
defined as zero because the byte is to be ORed. These examples are intended to
illustrate how EX works, but not how we would use it in practice.
EXRR inserts X'14' into register-5 and ORs byte 2 of ADDREG with X'14'. This
process causes the second byte of ADDREG to reference temporarily registers 1 and
4. ADDREG executes out-of-line as: add the contents of register-4 to register-1. EXRS
ORs the second byte of STOREGS with X'DF'. This process causes byte 2 of
STOREGS to reference registers 13 and 15. STOREGS executes out-of-line as: store
the contents of registers 13, 14, and 15 in SAVEREGS.

6 *
7 * EX EXECUTE
8 ♦
00.38 0 2 4 3 5 C 43EE 9 EXRR IC 5,=X•14• INSERT X*14• IN REG 5
C0380t 4450 4 OC 0 10 EX 5.ACCREG A 00 CONTENTS OF REG 4 TO REG 1

00380 A 4360 43EF 12 EXRS IC 6,=X*DF* INSERT X * OF * IN REG 6

G0380E 4460 40C2 1 3 EX 6.STOREGS STORE CONTENTS OF REGS 13.14.15

003812 4270 43F0

003816 4 4 7C
15 EXRX IC .
7 =X•20 • INSERT X•20• IN REG 7
4CC6 1 6 EX 7,STCRCH S TORE RIGHTMOST BYTE OF REG 2

0 0 381 A 438C 43F l 18 EXSI IC 8.=X*5B* INSERT X * 58• IN REG 8

0038 IE 4480 4 OC A 19 EX 8,MOVIMM MOVE * TO PRINT AREA

003822 42SC 4 3F2 21 EXSSL IC 9,=X •02 •

003826 4490 4CCE INSERT X•0 2• IN REG 9
22 EX 9.MOVECHAR MOVE *•* TO PRINT AREA

003824 43A0 43F3 24 EXSSLL IC 10, = X *32•

00382E 44 A C INSERT X•32• IN REG 10
4CD4 25 EX 10,ACDPK ADD FLO 2 TO FLO 1
26 * •
27 * •
003834
29 SAVEREGS OS 3F
003840 3 FULLMQROS
30 SAVEBYTE OS C ONE BYTE
003841
0038EA
4040404040404040 31 PRINT cc CL121* • PRINT AREA
22 FLO 1 DS PL4
00388E 33 FLD2 DS PL 2

0038C1 00 35 * SUBJECT INSTRUCTIONS FOR EX:

0038C2 1AOC
36 ADOREG AR 0,0 ._
0038C4 9000
0038C8 4200
4032 37 STOREGS STM 0.0.SAVEREGS ERS RR
403E 38 STORCH STC ,
0 SA V E BYTE f*°RE REG1STERS RS
0038CC 9200
4053 39 MOVIMM MV I PRINTF20 X«00« STORE CHARACTER Hx
0 0380C 0200
40 SD 4 3F 4 40 MOVECHAR MVC PRINT+30I0) -<-•***• M°VE IMMEDIATE SI
003806 FAO 0
.088 408C 4, AOOPK AP FU,;io ADO^PACKED ‘ F^ EL DS £

FIGURE 11-;7 Sample operations using EX.

249 Other Operations

EXRX ORs the second byte of STORCH with X'20\ This process causes byte 2
of STORCH to reference base register-2 and index register-0. STORCH executes aS:
store the rightmost 8 bits of register-2 in SAVEBYTE. EXSI ORs the second byte of
MOVIMM with X'5B'($). This process causes byte 2 of MOVIMM to "contain" X'5B\
(Remember that the subject instruction is not physically changed.) MOVIMM then
moves X'5B' to P+20, and the instruction can thus move any immediate value.
EXSSL and EXSSLL both modify operand lengths. Remember that when execut¬
ing an SS instruction, the computer adds 1 to the operand length. EXSSL uses
MOVECHAR to move a specified number of asterisks (up to three) to the print area,
and could be used to print one, two, or three asterisks to denote the total level.
EXSSLL executes an AP operation in which byte-2 contains both length codes.

EXTENDED EX EXAMPLE. Figure 11 -6 illustrated variable length move operations.

Figure 1 1 -8 in this section uses EX to code the same example. Carefully compare the
two examples to see how EX is used. A later section uses the same example to
illustrate the TRT instruction.

22 XR i. i CLEAR REG 1
23 LA 9.Nahaodr ADDRESS OF 1ST LENGTH INDICATOR
24 I C 1,0< 0,9) LENGTH OF NAME IN REG 1
25 Lfi 8, 1 SAVE LENGTH IN REG 8

27 BCTR 1.0 DECREMENT REG 1 BY 1

28 LA 9.1(0,9) INCREMENT FOR NAME FIELD
29 EX 1.M30MCVE EXECUTE M 30 MO VE INSTRUCTION
30 AR 9,8 ADDRESS OF NAME ♦ LENGTH FOR +
2ND LENGTH INDICATOR
31 I C 1 ,0 (0,9 > LENGTH OF ADDRESS IN REG 1
32 BCTR 1,0 DECREMENT REG 1 8Y 1
33 LA 9.1(0,9) INCREMENT FOR ADDRESS FIELC
34 EX 1 .M40MCVE EXECUTE M40 MOVE INSTRUCTION
35 * •
36 * •
37 • .
38 NAMADDR DS CL42 VARIABLE NAME 4 AODRESS
39 PRINT cc CL 12 1 • • PRINT AREA

41 M3CM0VE MVC PR I NT 72 0 ( 0 ) ,C ( 9) MOVE NAME TO PRINT

42 M40M0VE MVC PRINT750 <0),0(9) MOVE ADDRESS TO PRINT

FIGURE 11 -8 Moving variable name and address fields using EX.

TRANSLATE—TR. At times data introduced into a program is not in the required

EBCDIC code. (EBCDIC is the standard 360/370 8-bit code.) Or, it may be necessary
to translate certain EBCDIC characters into some other characters. Examples of the
need to translate code include:

— Some systems use ASCII mode (American Standard Code for Information Inter¬
change). If delivered as input to the 360 or 370 (by magnetic tape or teleproces¬
sing), ASCII must be translated to EBCDIC.
 250 LOGICAL OPERATIONS AND BIT MANIPULATION

— Card columns may be punched with invalid characters in amount fields that are
to be packed. For example, a column punched with 12-6-8 punches is read as
X'4E'. When packed, the byte becomes X'E4'. Because the byte is not in valid
packed format, operations such as AP or SP cause a program interrupt.
— Source programs on other computers may have similar but not identical codes.
The 360 or 370 may have to translate the different codes to EBCDIC in order to
list a program source deck.
— Alphabetic letters are normally recorded in upper-case format. It may be required
to translate and print in lower-case on either the console typewriter or a special
print device.

The instruction that translates code from one format to another is Translate, TR. The
rules for TR are: (1) Operand-1 references the address of the argument—the byte or
bytes to be translated. TR may translate a field or record up to 256 bytes long (such as
a record coded in ASCII). (2) Operand-2 references a table of functions, which
contains the required new code (such as the correct EBCDIC code). The definition of
the table is the key to the use of TR (and TRT following).

NAME OPERATION OPERAND

[symbol! TR Si ,S2 or D1 (L, B1 ),D2(B2)

TR starts with the leftmost byte of the argument. A byte can contain any value
X'00' - X'FF', and TR adds this value to the address of the table, giving a range of
addresses from table+X'00' through table-t-X'FF'. The contents of the table address is
the function that TR uses to replace the argument byte. The operation continues then
with the next argument, proceeding from left to right one byte at a time until complet¬
ing the argument length.
Figure 11-9 translates hex numbers to alphabetic characters. Assume that the
number one (X'01') is to be translated to the first character “A" (X'CI'), 10 or X'OA'
to the tenth character 'J', 19 or X'13' to the 19th character 'S', etc. The only valid
expected values are 0 through 26 (X'l A'). The table is defined as TABLE, with a blank
followed by the letters A through Z. Assume that the argument, ARGUMENT, con¬
tains X'0104010D'. The example works as shown on page 251:

45 ♦ -
46 * TR TRANSLATE
47 * -
43 ARGUMENT DS CL4 ASSUME CONTAINS X* 01040100*
49 TABLE DC C* ABCOEFGHIJKLMNOPQRSTUVWXYZ•

51 TR ARGUMENT.TABLE TRANSLATE ARGUMENT

FIGURE 11-9 Translation of argument using TR.

251 Other Operations

ARGUMENT before TR:

Contents of TABLE:

ARGUMENT after TR:

— TR adds the first byte of ARGUMENT containing X'01' to the address of TABLE. At
TABLE + 1 is the letter 'A' (X'CI'). 'A' replaces X'01' in ARGUMENT.
— TR adds the second byte of ARGUMENT containing X'04' to the address of
TABLE. At TABLE+4 is the letter 'D' which replaces X'04' in ARGUMENT.
— TR adds the third byte of ARGUMENT containing X'01' to TABLE. The letter 'A'
replaces X'01' in ARGUMENT.
— TR adds the fourth and last byte of ARGUMENT containing X'OD' to TABLE. At
TABLE + 1 3 is the letter 'M' which replaces the X'OD'. ARGUMENT is now cor¬
rectly translated to 'ADAM'.

Question: Why does TABLE begin with a blank byte rather than the
letter 'A'? Warning: An argument may be invalid with respect to the
table of functions. For example, assume that ARGUMENT contains X'28',
or decimal value 40. TR will access the address TABLE+40, which yields
a "function" that is outside the bounds of the table. Preediting the argu¬
ment for validity prior to the TR is recommended. For many types of
translations where almost any argument is valid, it is necessary to define a
table with all possible 256 EBCDIC codes, as illustrated in the next sec¬
tion.

EXTENDED TR EXAMPLE. Figure 11-10 depicts an example discussed earlier

which translates bytes in an input amount field that may contain invalid characters.
When read in character format, these bytes should contain only the values:

-0 through —9, represented by X'DO' through X'D9'

and
+ 0 through +9, represented by X'FO' through X'F9'

55 ♦ position:
56 TABL62 DC 208X* FO' 000-207 20 3 BT TES INVALID
57 DC X* 000 102030405 06070809' 208-217 10 BYTES -0 THRU
58 OC 22 X•F 0• 218-239 22 BYTES INVALID
59 DC X* FOF1F2F3F4F5F6F7F8F9' 240-249 10 BYTES -*■0 THRU
60 DC 6 X•FO• 250-255 6 BYTES INVAL10

62 INAREA DS CL80 INPUT AREA

63 AMTPK DS PL4 PACK AREA

65 TR INAREA'10(6).T AELE2 TRANSLATE INPUT AREA

66 PACK AMTPK.INAREA+10I6) PACK VALIDATED FIELD

FIGURE 11-10 Translate invalid bytes for packing using TR.

252 LOGICAL OPERATIONS AND BIT MANIPULATION

These valid values are to stay the same, whereas all other hex values are to translate
arbitrarily to X'FO'. We therefore define all possible keypunch codes in a table of
functions that "translates” valid argument bytes to the same value, and translates
invalid bytes to X'FO'. Note the positioning of the table functions:

TABLE TRANSLATES
FUNCTIONS HEX VALUE DEC. VAL. TO

First 208 Invalid hex arguments X'OO'-X'CF' 0-207 X'FO'

Next 10 Valid characters —0 through -9 X'D0'-X'D9' 208-217 not changed
Next 22 Invalid X'DA'-X'EF' 218-239 X'FO'
Next 10 Valid characters +0 through +9 X'F0'-X'F9' 240-249 not changed
Last 6 Invalid X'FA'-X'FF' 250-255 X'FO'

The example shows how invalid bytes in INAREA, assumed to be an amount field,
are translated to X'FO'. Devise some examples of valid and invalid data to check the
operation. Another approach translates a field to check if all bytes are numeric. The
following translates all numeric (0-9) bytes to asterisks/and checks if the TR changed
every one to an asterisk. (Checking if the rightmost byte could contain a minus
overpunch will require special treatment.)

TEST DS CL6 MVC TEST.INAMOUNT Move numeric amount

TABLE DC 240X00’ TR TEST,TABLE Translate numerics to *
DC 10C’*’ CLC TEST, =6C’*’ Test all asterisks?
DC 6X00’ BNE error No—perform error routine

If it is necessary to know which record positions contain an invalid character

and to print a warning message, we can use the TRT instruction covered next.

TRANSLATE AND TEST—TRT. It is sometimes necessary to scan a record in order

to detect an invalid character (as in the previous example under TR), or to detect an
unique character, such as a "delimiter” that terminates a variable length record.
Translate and test, TRT, conveniently serves this purpose.

NAME OPERATION OPERAND

[symbol] TRT S1,S2 or D1 (L,B1 ),D2(B2)

TRT is similar to TR in that: (1) Operand-1 references the address of the argu¬
ment, up to 256 bytes in length; (2) operand-2 references a table of functions contain¬
ing the required new code; (3) the operation begins with the first byte of the argu¬
ment, and processes one byte at a time. TRT adds the value of each argument byte to
the address of the table to find each function in the table.
TRT differs from TR in that: (1) If the value of the table function is zero, TRT
continues with the next argument byte; (2) if the value of the function is nonzero,
253 Other Operations

TRT inserts into register-1 the address of the argument in bits 8-31 (bits 0-7 are
unchanged), and inserts into register-2 the contents of the function in bits 24-31 (bits
0-23 are unchanged); (3) the argument byte is unchanged—there is no translation. In
effect, TRT is a scan operation; (4) TRT terminates on finding a nonzero function or
on reaching the end of the argument; (5) the condition code is set as follows:

CODE CAUSED BY TEST WITH

0 All functions found were zero BZ, BNZ

1 A nonzero function found, but
not yet at the end of the argument BM, BNM
2 A nonzero function found at the
end of the argument BP, BNP

The three examples in Figure 11-11 illustrate the condition codes set by TRT.
Each example assumes the same argument, ARG. For SCAN 1, each byte (pair of hex
digits) of ARG is scanned. For instance, X'02' is directed to TABLEA+2, etc. All
function bytes are found to be zero. Therefore, the condition code is set to zero and
registers 1 and 2 remain unchanged, as shown in comments to the right.

ARG: 02\ 03
. v-
00 06'' 04
/
\
TABLEA: 00 5C 00 00 06 5C 00 (all located function bytes = 0)

70 *
7 l ♦ TRT TRANSLATE 4 TEST
72 *
73 ARG DC X* 0203000604*
74 ♦ REG—1: REG-2: CODE:

75 SCAN 1 TRT ARG,TABLEA UNCHANGED UNCHANGED 0

76 TABLEA CC X * 005COOCOO05CG0•

78 SCAN2 TRT ARG.TABLEB A(ARG + 3) X• 5C # 1

79 TABLES DC X•004BOCOG004B5C•

81 SCAN3 TRT ARG.TABLEC A(ARG + 4) X•SB* 2

82 TABLEC DC X■004B0GO05B5C00•

FIGURE 11-11 Sample translate and test TRT operations.

For SCAN2, X'02', X'03', and X'00' in ARG direct the operation to zero
functions in TABLEB. X'06' in ARG, however, directs the operation to TABLEB + 6,
which contains X'5C'. Therefore TRT does the following: (1) Inserts the address of
ARG + 3 in register-1; (2) inserts the table function X'5C' in register-2; and (3) sets the
condition code to 1.
For SCAN3, the first four bytes of ARG locate zero functions in TABLEC. The
last byte, X'04', however, directs the operation to TABLEC+4, which contains X'5B'.
 254 LOGICAL OPERATIONS AND BIT MANIPULATION

TRT does the following: (1) Inserts the address of ARG + 4 in register-1; (2) inserts the
table function X'5B' in register-2; and (3) because the last byte of ARG was pro¬
cessed, sets the condition code to 2.

EXTENDED TRT EXAMPLE. The next example for variable length fields is similar to
those for 1C, STC, and EX in Figures 11-6 and 11-8. This example has no length
indicator preceding the name and address. Instead, a "delimiter” character, in this
case an *, indicates the end of the variable length field:

ADAM SMITH*423 JONES ST*

In Figure 11-12 TRT scans the record to find the delimiter. We then use the
address of the delimiter to calculate the length of the name and the address, and to
determine the address of the next field. The program uses two TRT and two EX
operations to move the name and address to the print area. The table, TABSCAN,
contains only a nonzero function for the X'5C' (*) position, and zero functions for all
other codes. The example assumes, perhaps unwisely, that a delimiter always follows
both name and address.
Further examples of EX, TRT, and variable length records are in the next
chapter.

86 ♦
POSITION:
0 0 3A 9 1 OCCOOCOCCCOCOOOO 87 TABSCAN cc 92X•00• 000-091 92 ZERO FUNCTIONS
003AEC 5C 88 DC X • 5C • 092-092 1
0 03 A EE ASTERISK *
OOOCOCOOOOCOOOOO 89 DC 163X•0 0• 093-255 1 63 ZERO FUNCTIONS
003B91 91 NAMADC DS CL4 2 VARIABLE NAME 4 ADDRESS
0C3Bee 00
0L3BBC 1 B1 1 93 SR 1. 1 CLEAR REG 1
0038BE 4190 438F 94 LA 9.NAMADC LOAD ADDRESS OF VARIABLE
0038C2 DD14 9000 428F RECORD
95 TRT 0(21,9) .TABSCAN SCAN FOR NAME DELimiter
96 * EZ
NOT FOUNDi ERROR
OOZBCe 1671 98 LR 7,1
003BCA 1019 SAVE ADDRESS OF OELIMITER
99 SR 1.9
003BCC 0610 CALCULATE LENGTH CF NAME
100 BCTR 1.0
003BCE 4410 43E2 DECREMENT LENGTH BY 1
101 EX 1.M50M0VE
003BD2 4190 7001 EXECUTE M50 MOVE INSTRUCTION
102 LA 9.1(0,71
INCREMENT FOR ADDRESS FIELC
003806 0014 9000 428F 1 04 TRT 0(21.9).TABSCAN
♦ SCAN FOR ADDRESS OELIMITER
105 BZ ••• * NOT FOUND. ERROR
0C3B0C 1B19 106 SR 1.9
003BDE 0610 107 CALCULATE LENGTH OF ADDRESS
BCTR 1.0
OO30EO 4410 43E8 DECREMENT LENGTH BY 1
108 EX I .M6CM0VE
♦ EXECUTE M60 MOVE INSTRUCTION
1 C9 •
110 ♦ •

112 * SUBJECT INSTRUCTIONS 1

003BE4 0200 4053 9000 113 M50MOVE MVC PR I NT F 20(0).0(9
003BEA 0200 4071 9000 1 1 4 M60M0VE MOVE NAME TO PRINT
M VC PRINT450(0».0(9,
MOVE ADDRESS TO PRINT

FIGURE 11-12 Moving variable name and address fields using TRT
255 Problems

BINARY OPERATIONS—SUMMARY

Most arithmetic can be performed adequately with packed data and decimal arith¬
metic. Since input data on cards is normally in character format, an additional step is
required to translate into packed format. To convert the packed data to binary re¬
quires yet another step. However, the following reasons often determine the need for
binary format:

— Explicit use of base registers for address modification.

— Faster processing if there are many repetitive arithmetic operations.
— Certain operations can only be accomplished with binary operations.
— Data may be stored efficiently in binary format on disk and tape, and read into
storage in this format.

PROBLEMS
11-1. Figure 11-2 "packs" four fields into one binary fullword. Assume that the
fullword has been read from tape into a storage field called FULLWORD DS
FL4. Write the coding to "unpack" the fullword into four individual charac¬
ter fields called DIST, ACCOUNT, RATE, SERVICE.
11-2. STC stores the rightmost 8 bits of a register into a field called BYTE. Use
Boolean operations to (a) force the leftmost 4 bits of BYTE to be zeros; (b)
force the leftmost 4 bits of BYTE to be ones; (c) reverse all 8 bits, zeros to ones
and vice versa.
11-3. Figure 11-5 shows how to test bit values. Code the instruction to test if the
customer has both gas and industrial account.
11-4. Figure 11-6 illustrates variable length name and address. Change
NAMADDR to 63 bytes, allowing for a third variable field, city. Revise the
coding to move this field to P+80. Also, recode the routine as a loop so that
there is one set of instructions executed three times, one for each field. HINT:
Change operand-1 of the MVC to explicit register format. Expand the code to
include a read and print, then test the program.
11 -5. Recode Figure 11 -8 using one EX for the same changes required in Problem
11-4.
11 -6. Design a table for TR to translate upper case letters (A-Z) to lower case (a-z).
Leave unchanged characters 0-9, comma, and period. Convert all other
characters to X'40'.
11-7. ASCII code is given in IBM S/370 Reference Summary card. Design two
tables of functions to translate (a)ASCI I to EBCDIC and (b)EBCDIC to ASCII.
11-8. In Figure 11-10 TR translated invalid bytes on a card to character zero.
Change the example so that the program prints the card column where the
invalid code occurred. A card may contain more than one invalid column.
256 LOGICAL OPERATIONS AND BIT MANIPULATION

11-9. Translate hex into character format. Each four bits (hex digit) of register-9 is to
print as a single character (as is done by dumping the contents of storage).
Hex zero should print as character zero, X'9' as character 9, X'A' as character
A, etc. Since register-9 contains 32 bits, eight characters are required, print¬
ing from P+11 to P+18. Suggestion: Shift the four leftmost bits of register-9
into register-8. Store these in a one-byte field and use TR to translate from hex
to character. Repeat the loop eight times. The table can be defined as quite
short.
11-10. Recode Figure 11-12 using one TRT for the same changes required in Prob¬
lem 11 -4.
 PART IV

EXTERNAL STORAGE
 CHAPTER 1 2

MAGNETIC TAPE

Up to this chapter, the only input/output devices have been the card reader and the
printer. This chapter and the next cover two other common devices that store
data—magnetic tape and disk storage. Tape, like punched cards, stores data as
records. It may help to think of a reel of tape records as a series of "punched card"
records. The reel is "loaded" onto a tape drive in much the same manner as a
conventional tape recorder. The data records are then read into the computer's main
storage as a card file would be.
We write data on tape and disk over the old data, much as a tape recorder
records a new sound over the previous. The data may be reread and rewritten, almost
indefinitely. Tape and disks are used for both input and output. Normally a tape reel
designated as input to a program is only read, and not written on until its contents are
obsolete, and a reel designated as output is written on, to be read later. The data on
the reel is saved for a predetermined time as an "audit trail" or "backup" if jobs must
be rerun. Recent developments in disk storage devices have permitted storing large
files on disks. Disk storage gives the advantage of processing records both sequen¬
tially and directly. Most installations now use disk to store large files.

259
260 MAGNETIC TAPE

USES OF MAGNETIC TAPE

Magnetic tape is not only a means of rapid input/output. It also acts as a medium to
store large quantities of condensed, easily filed data. Like cards, tape is used to store
master and transaction files. It also acts as intermediary storage, for example as
output from a program, storing data to be used in a subsequent program. Many
department store chains and utility companies maintain customer records on mag¬
netic tape. Their records are many in number, long in length, and are stored sequen¬
tially. Among the advantages of magnetic tape over punched cards are:

— Tape input/output is considerably faster.

— Tape files require much less storage space.
Tape records when sorted (by an IBM tape library program) are virtually assured
of being in the correct sequence. (Physical handling makes punched card se¬
quence unreliable.)
Tape stores data not only in character format but also in packed and binary,
permitting more condensed records.
— Tape may be reused almost indefinitely.
— Tape permits records of virtually any length.
— Tape is an inexpensive, convenient way to mail large volumes of data.

Among the disadvantages are:

Magnetic tape devices are relatively expensive.

— Usually the system requires at least three or four drives to operate (where there
are no disk drives available).
— The complex input/output operations require more program storage, although a
trivial consideration in these days of low-cost main storage.

MAGNETIC TAPE CHARACTERISTICS

This chapter limits discussion to IBM magnetic tape units, although tape units of
other manufacturers have similar features. The tape consists of a thin ferromagnetic
coating on flexible plastic, %-inch wide. A full reel is 2400 feet long with shorter
lengths available such as 1200 and 600 feet. 8

Ifnn hENAT9;ooTrPe Y iS expressed in bytes-per-inch (bpi), such as 800 and

00 bpi A 24b°-foot reel (28,800") contains a maximum storage of about 23
million bytes with 800 bpi, and 46 million bytes with 1600 bpi tape.

TAPE SPEED. Tape read/write speed varies considerably by tape drive model At
5 inches per second dps), a tape drive could read a 2400-foot reel, with very little
261 Magnetic Tape Characteristics

time for processing, in about 230 seconds. For example, IBM 3420 Magnetic Tape
units are available in the following models, with tape densities of 800, 1600, and
6250 bpi. (Another density, 556 bpi, provides compatibility with second generation
equipment.)

IBM 3420 MODEL 3 MODEL 4 MODEL 5 MODEL 6 MODEL 7 MODEL 8

Tape speed (ips) 75 75 125 125 200 200
Data rate (KB/sec):
At 800 bpi 60 100 160
At 1600 bpi 120 120 200 200 320 320
At 6250 bpi 470 780 1250

CODE STRUCTURE. Tape records data using a 9-bit code similar to the byte in
storage: eight bits for data and one bit for odd parity, arranged vertically on the tape.
(A 7-bit code is also accepted to provide compatibility with earlier tape models.)

TAPE MARKERS. Near both ends of the reel is an aluminum strip called a tape
marker that is sensed by a photoelectric device on the tape drive:

— The load point marker is a strip about ten feet from the start of the reel to provide
space for the initial threading of the tape. Reading or writing begins after this point.

— The end-of-tape marker is a strip about 14 feet from the end of the reel. When
tape is being written, the marker warns the system that the end of the tape is near.
Four feet provides space to finish writing data after the marker, and ten feet
permits threading of the tape.

TAPE READ/WRITE. The operator loads the reel to be processed onto the tape drive
and initializes the tape at the load point marker. The drive contains an empty reel to
take up the processed tape. The tape passes a read/write head. For input each byte is
read, then reread, to ensure the read was performed correctly. For output an erase
operation prior to the write clears old data from the tape. The write operation mag¬
netizes small areas within the tracks. A byte written is reread to check its validity.
These validity checks are entirely automatic. When the tape has been completely
processed, there are two alternatives:

1. Most often the tape is rewound onto the original reel. The operator may then
unload it from the tape drive or leave it for further processing.
2. The tape may be reprocessed by reading it backwards. Although the tape runs
backwards, data from each record reads into storage in the normal sequence. IBM
library tape sort programs and occasionally programmers use this feature.
262 MAGNETIC TAPE

TAPE FORMATS. A block of data written on tape consists of one or more records.
The minimum block length is about 18 bytes. The maximum is subject to available
storage in programs using the tape file and the operating system used. IOCS reads a
tape block into, and writes from, an input/output area (or buffer) in storage. Blocks
consisting of one record only are unblocked. Blocks having more than one record
are blocked. The blocking factor specifies the number of records in a block. The
program that initially writes (or creates) the tape file defines the record length and
block length. All other programs that read the file must designate the same record
and block lengths. After each block, the tape drive automatically generates a space of
about 0.6 inch. On tape with density of 6250 bytes per inch, the IBG is about 0.3
inch. This space, called an interblock gap (IBG), has two functions:

1. The IBG clearly defines the beginning and end of a block of data. A tape read
starts with the first byte of data in a block. The IBG terminates the read operation.
2. The IBG allows space for the tape drive to slow down after a read or write, and to
restart with the next read/write (stop/start time).

FIXED AND VARIABLE LENGTHS. Records and blocks may be fixed in length
(each has the same length throughout the entire file), or variable (the length of each
record and the blocking factor are not predetermined). There are five distinct tape
formats:

1. Fixed, unblocked—one record of fixed length per block.

2. Fixed, blocked—more than one fixed length record per block.
3. Variable, unblocked—one variable length record per block.
4. Variable, blocked—more than one variable length record per block.
5. Undefined—not all operating systems support this format; see the IBM Supervisor
manuals for details.

Figure 12-1 depicts the first two formats. A later section describes variable
length records.

Problems 12-1, 12-2, and 12-3 should now be done.

DOS TAPE PROGRAMMING EXAMPLE—CREATING A TAPE

FILE

The DOS file definition macro that defines a magnetic tape file is DTFMT (OS uses
DCB). We specify one DTFMT entry with a unique name for each tape input or
output file that the program processes. The entries are similar to the DTFCD DTFPR

ri nSTa ?rDETma<Z
m a?d
!vOVfredexplained
e,arlier' We use ,he same imperative macros': OPEn)
later, IOCS handles all label processing, block-
ing and deblocking. 5/
263 DOS Tape Programming Example

Fixed unblocked
—

m m m. m
jIBG: Rec-1 ]ibg; Rec-2 IBG; Rec-3 me: Rec-4 Iibg;
Wa 'm ii m m
One record = one block

Fixed blocked

m
:IBG; Rec-1
i
1 Rec-2
i-
^ Rec-3
yv/y/, -1
IIBG: Rec-4 ' Rec-5
i- m.
Rec-6 jlBG:
m m 1
i_1
1
m
Three records = one block

FIGURE 12-1 Tape formats for fixed unblocked and blocked.

Figure 12-2 illustrates reading cards and writing them on tape. The cards are
read into CARDIN. Required fields are transferred to the tape workarea called
TAPEWORK. This workarea is then "PUT" to the tape output file called FILEOTP.
IOCS blocks four records before physically writing the block onto tape. Therefore, for
every four cards read, IOCS writes one tape block onto tape. The DTFMT entries are
described next:

BLKSIZE = 360 means that each block to be written from the lOAREA is 360 bytes
long (4 records x 90 bytes).
DEVADDR=SYS025 denotes the logical address of the tape device that will write the
file. The operator assigns one of the system's tape drives with this (or some other)
logical device name, as required by the installation.
FILABL=STD indicates that the tape file contains "standard labels", as discussed in a
later section.
IOAREA1 and IOAREA2 are the two IOCS buffers, similar to those for card and
printer files. We define the two lOAREAs as the same length as BLKSIZE, 360
bytes. Some programmers omit defining a second buffer in order to reduce
program size, especially if the blocked record area is large.
RECFORM = FIXBLK specifies that output records are to be fixed in length, and
blocked (tape records may also be variable length or unblocked).
RECSIZE = 90 means that each fixed-length record is 90 bytes in length, the same as
the workarea.
TYPEFLE=OUTPUT stipulates that the type of file is output: the file is for writing tape,
not reading.
WORKA=YES means that we are to process output records in a workarea. In this
program, TAPEWORK is the workarea, and is the same length as RECSIZE, 90
bytes. (Alternatively, we may code IOREG, just as for card and printer files, and
use the macro PUT FILEOTP with no workarea coded.)

Magnetic tape input requires a DTFMT entry EOFADDR=address to denote the

 7 PROG 12A START X* 3850 * X'3800* + X•5 0• FOR LBLTYP TAPE
8 e ALR 3.0 INITIALIZE base register
9 USING *. 3
10 OPEN FILEICD.FILEOTP ACTIVATE FILES

20 MAIN PRCC S S I N G

22 A1GREAD GET FILEICC.CARDIN READ RECORD

28 MVC ACCTTPO.ACCTIN MOVE CARD FIELDS TO TAPE
29 MVC NAMETPO.NAMEIN) * WORK AREA
30 MVC ADCRTPC.ADORIN *
3 1 PACK BALNTPO.BALNIN *
32 MVC DATETPO.CATEIN »
33 PUT FILEOTP.TAPEWCRK WRITE WORK AREA ONTO TAPE
39 0 A 10 RE AD

41 * ENC-OF-F ILE

43 X1CEOFCD CLOSE FILE ICO.FILEOTP 0 E-ACT I VATE FILES

52 EOJ NORMAL ENO-OF-JOB

56 * DECLARATIVES

58 CARDIN DS 0CL80 CARD INPUT AREA:

59 CODE IN DS CL2 0 1-02 CARD CODE
60 ACCTIN DS CL6 03-08 ACCOUNT NO.
6 1 NAME IN DS CL 20 09-28 NAME
62 ADDRIN DS CL40 29-68 ADORESS
63 BALNIN DS ZL6•0000.00* 69-74 BALANCE
64 DATE IN DS CL6•CDMMYY• 75-80 DATE

67 TAPEWCRK DS 0CL90 TAPE WORK area:

68 ACCTTPO DS CL6 0 1-06 ACCOUNT NO.
69 NAMETPO DS CL 20 07-26 NAME
70 ADCRTFO CS CL40 27-66 ADORESS
71 BALNTPO DS PL4 67-70 BALANCE
72 □ATETPO DS CLC 7 1-76 DATE
73 cc CL 14* • 77-90 RESERVED FOR EXPANSION

75 FILEICD DTFCD OEVADDR=SYSIPT. C ARD INPUT FILE OECLARATION

I0AREA1=I0ARC0I1,
IOAREA2=IOARCCI2.
BLKSIZE=60.
OEV ICE = 250I,
EOFACDR=X10EOFCD.
TYPEFLE=INPUT ,
WORKA=YES

117 IOARCD11 DS CL 8 0
ICCS CARD BUFFER-1
118 I0ARC0I2 DS CL80
IOCS CARD BUFFER-2

120 FILEOTP DTFMT BLKSIZE=360.

TAPE OUTPUT FILE DECLARATION +
DEVA0DR=SYS02S.
■F
FILABL=STD,
♦
I0AREA1—I0ARTP01
♦
I0AR£A2=I0ARTP02
-F
RECFORM=FIXBLK.
+
RECSIZE=90,
4
TYPEFLE=OUTPUT.
•F
WORKA=YES

157 IOARTPO l DS CL360

IOCS TAPE BUFFER-1
158 I0ARTF02 DS CL360
IOCS TAPE BUFFER-2

160 END PRCG12A

FIGURE 12-2 Writing a tape file under DOS.

265 Tape File Organization

name of our routine where IOCS branches when it reaches the end of the tape file.
The next chapter illustrates tape input. Further information on DTFMT is in the IBM
Supervisor manuals.

OS CODING FOR MAGNETIC TAPE

For OS, there are several additional entries that the DCB requires for magnetic tape.
The entry DEN specifies tape density: DEN = 2 is for 800 bytes per inch and DEN = 3
is 1600, and must agree with the actual tape drive setting. LRECL (logical record
length) designates the length of each record, if fixed-length. RECFM indicates the
"record format": F (Fixed), FB (Fixed Blocked), V (Variable), and VB (Variable
Blocked).
The program in Figure 12-3 is a revision of the preceding DOS example that
reads records and writes them on tape. The DD (Data Definition) job cards appear
first. Note that the example illustrates a common practice: BLKSIZE, RECFM, and
DEN are coded in the tape DD entry instead of the DCB, enabling a user to change
the entries without reassembling the program.
Tape and disk records may be processed directly in the buffers, using Locate
Mode. The DCB requires MACRF = (GL) for input and (PL) for output.
Another DCB entry, EROPT, provides for specifying the action if an input
operation encounters problems. The options are:

=ACC Accept the possibly erroneous data block.

= SKP Skip the data block entirely and continue with the next one.
=ABE Abend—abnormal end of program execution, the normal default if the entry
is omitted.

ACC and SKP can use a SYNAD entry for printing an error message and continue
processing. If the error routine is called R20ERROR, the DCB coding could be:

EROPT=SKP,
SYNAD = R20ERROR

Use of ACC and SKP may cause invalid results, so it may be preferable to use
ABE (or allow it to default) for important production jobs. Be sure to examine the OS
Supervisor manuals for other DCB options.

TAPE FILE ORGANIZATION

Tape files are typically stored in ascending sequence by control field, such as Cus¬
tomer number. Files ("data sets" under OS) may be organized according to how
much tape space they require. For compatibility with disks, a reel of tape is called a
volume. The simplest case is a one-volume file, in which one file is entirely and
exclusively stored on one reel (volume). This storage is common where the file is
medium-sized.
 //GO.TAPEOT DD DSNAME-TRFILE,DISP=(NEW,PASS),UNIT-3420, \DD for tape data
DCB=(BLKSIZE-360,RECFM—FB,DEN-3) f set output

//GO. CARD DD * DD for input

♦ INITIALIZATI 0 N

PR0G12B START
SAVE (14,12)
e alr 3,0
USING *,3
ST 1 3. SA VE ARE AT- 4
LA 13.SAVEAREA
OPEN (FILE IN. ( INPUT),F ILEOTP, (OUTPUT))

♦ ** MA/N PROCESSI N G

A 1 ORE A D GET FILEIN.RECRDIN

M VC ACCTTPO,ACCTIN MOVE CARD FIELDS TO TAPE
M VC NAMETPO.NAMEIN * WORK AREA
M VC ADDRTPO.ADDRIN ♦
PACK BALNTPO,BALNIN *
M VC CATETPO,DATE IN
PUT FILECTP.TAPEWCRK WRITE WORK AREA ONTO TAPE
B A 1 OREAD

* END-OF-F ILE

X1OEOF CLOSE (FILEIN,.FILEGTP)

L 13,SAVEAREA*4
RETURN (14,12)

* OECLARAT I VES

RECRDIN DS OCLBO CARO INPUT area:

CODE IN DS CL 2 01-02 CARD CODE
ACCTIN OS CL6 03-08 ACCOUNT NO.
NAME IN DS CL 20 09-28 NAME
AODR I N DS CL4 0 29-68 ADDRESS
BALNIN DS ZL6*0000.00• 69-74 BALANCE
OATEIN DS CLe'DDMMYY* 75-80 DATE

TAPE WORK DS 0CL90 TAPE WORK area:

ACCTTPO OS CL6 01-06 ACCOUNT NO.
NAMETPO DS CL20 07-26 NAME
ADDRTPG DS CL4 0 27-66 ACDRESS
B ALNTPG DS PL 4 67-70 EALANCE
C ATETPO DS CL6 71-76 DATE
DC CL 14*
77-90 RESERVED FOR EXPANSION

FILEIN DCS DDNAME=CARD, DCB FOR INPUT OATA SET ♦

OEVD=DA,
DSORG=PS,
EOOAD=X10E0F,
MACRF=(GM)

F ILEOTP DC B DONAME-TAPEOT, CCS FOR TAPE DATA SET ♦

DSORG=PS,
LRECL-90.
MACRF=(PM)

SAVEAHEA DS 18F
REGISTER SAVE AREA
L T Q KG *
END PR0G12B

FIGURE 12-3 Writing a tape file under OS.

266
267 Tape File Organization

An extremely large file (such as department store accounts receivable) uses a

multivolume file which requires more than one volume for the file. Many small files
can be stored in a multifile volume, one after the other on one volume.
IOCS and job control handle the complexities of such file organization, requir¬
ing no special programming effort.

STANDARD LABELS. Under the various operating systems, tapes require unique
identification. Each reel and each file on a reel contains certain descriptive standard
labels supported by IOCS for the following reasons:

— To uniquely identify the reel and the file for each program.
— To provide compatibility with disk storage devices (to facilitate device indepen¬
dence).
— To provide compatibility with other IBM systems and those of other manufacturers.

Most installations use standard labels. Nonstandard labels and unlabeled tapes
are permitted but are not covered in this text. There are two kinds of standard labels:
volume and file labels. Figure 12-4 illustrates standard tape labels for the cases: one

I. A one-volume file

End-of-file label(s)

III. A multi-file volume

First file Second file

FIGURE 12-4 Magnetic tape standard labels.

268 MAGNETIC TAPE

file on a volume, a multivolume file, and a multifile volume. IBG's are denoted by
striped lines. TM, meaning tape mark, is discussed in a later section, IOCS.

VOLUME LABELS. The volume label is the first record after the load point marker.
The label describes the volume (reel). The first three bytes contain the identification
VOL. Although some systems support more than one volume label, this text describes
only the common situation of one label.
On receipt of a new tape reel, we use an IBM utility program to write the
volume label and a temporary file label ("header”). In all programs that process the
reel, IOCS expects the volume label to be the first record. It checks the tape serial
number against the number supplied by the special tape job control card TLBL or
under OS, DD (Data Definition). The following describes each field of the 80-byte
standard volume label:

POSITIONS NAME DESCRIPTION

01 -03 Label Contains VOL to identify the label.
Identifier
04-04 Volume Some systems permit more than one volume label; this
Label field contains the numeric sequence of the volume
Number label.
05-10 Volume The permanent unique number usually assigned when
Serial the reel is received. (The number also becomes the
Number File Serial number in the Header label.)
11-11 Volume A special security code, supported by OS.
Security
12-41 Not used, reserved.
42-51 Owner Name May be used under OS to identify the owner of the
and Address reel.
Code
52-80 Reserved for future expansion.

STANDARD FILE LABELS. A tape volume contains a file of data, part of a file or
more than one file. Each file is uniquely identified to ensure, for example that the
correct file ,s being processed and that the tape we are using to write on is obsolete
To provide such identification there are two file labels for each file for each reel ■ the
header label and the trailer label.

1. HEADER LABEL. There is a header label at the start of the file. If the file reouires
more than one volume (multivolume file) then there is one header for each of the
volumes, each numbered consecutively from one. If there is more than on!SL„
a volume (multifile volume) then a header label begins each file ' ^

(suchl thAe by,es-the fi,e identification

269 Tape File Organization

volume label. IOCS checks the file identification, date, etc., against information
supplied by the tape job control card, TLBL or DD.
OS supports two header labels, HDR1 and HDR2, plus two trailer labels.
The second label is also 80 bytes and immediately follows the first. It contains
such data as record format (fixed, variable, or undefined), the block length, record
length, and density in which the tape is written.
2. TRAILER LABEL. There is a trailer label at the end of each file (EOF). For a
multivolume file, there is also a trailer at the end of each volume (EOV). (OS
requires a second trailer label.) If the trailer label is the end of the file (the file may
require more than one volume), then the first three bytes of the label contain EOF.
If the file requires more than one volume, then the first three bytes of the trailer
label at the end of each volume contain EOV. The trailer label is otherwise
identical to the header label with one exception: a block count field. IOCS counts
the blocks as they are written and writes the total in the trailer label. Remember
that IOCS fully performs label processing for standard labels.
The following describes each field of the 80-byte standard file label, for both
the header and the trailer.

POSITIONS NAME DESCRIPTION

01 -03 Label Contains HDR if Header label, EOF if end of a data

Identifier file, or EOV if end of volume (reel).
04 -04 File Label Some systems permit more than one file label; this
Number field specifies the sequence of the file label. OS sup¬
ports two labels each for HDR, EOF and EOV.
05-21 File Unique name to describe the file, such as INVENTORY
Identifier MASTER.
22-27 File Serial Same as the volume serial number of the first or only
Number volume of the file. For a multivolume file, all file serial
numbers are the same as the first one.
28-31 Volume For multivolume files, this gives the sequence of
Sequence volume numbers. The first or only volume contains
Number 0001, the second 0002, etc.
32-35 File For a multifile volume, this gives the sequence of the
Sequence file. The first file on a volume contains 0001, the
Number second 0002, etc.
36-39 Generation Each time the file is rewritten, IOCS increments the
Number generation number by 1 to identify the edition of the
file.
40-41 Version Specifies the version of the generation of the file.
Number of
Generation
42-47 Creation Provides the year and the day when the fi le was written.
Date For example, January 17, 1984 is stored as b84017.
POSITION
1 Not used
2-3 Year
4-6 Day of year
270 MAGNETIC TAPE

POSITIONS NAME DESCRIPTION

48-53 Expiration The year and day when the file may be erased and re¬
Date written. Same format as creation date.
54-54 File A special security code used by OS.
Security
55-60 Block Count Used in trailer labels to store the number of blocks
since the previous header label.
61 -73 System Code Identifies the programming system.
74-80 Reserved.

IOCS FOR MAGNETIC TAPE

Assuming standard labels, IOCS (Data Management) performs the following

functions for output and for input.

OUTPUT. If the file is being written, processing is as follows:

1. Processing the Volume Label. Through the OPEN macro, IOCS checks that the
first record is a volume label (VOL). It compares the volume serial number against
the serial number (if any) on the tape job control card (TLBL or DD).
2. Processing the Header Label. After the volume label, IOCS reads the header label.
It checks the expiration date against the date in the communications region. If the
expiry date has passed, IOCS backspaces the tape and writes a new header
(HDR1) over the old header, using data from the tape job card. (Under OS, a
second header (HDR2) is written next.) Then IOCS writes a tape mark, a special
block that it recognizes.
3. Writing Records. The PUT macro uses either a workarea or an IOREG. If the
records are unblocked (one record per block), processing is similar to printing. If
records are to be blocked, however, IOCS performs the required blocking. For
example, assume two lOAREAs (buffers), three records per block, and a workarea.
We format the record to be pripted in the workarea. The first PUT executed writes
the workarea record into the first record of IOAREA1:

IOAREA1 IOAREA2

There is no physical writing of tape at this time. The second PUT writes the
workarea record in the second record of IOAREA1, and the third PUT writes in the
third record:
271 IOCS for Magnetic Tape

I0AREA1

At this time, IOCS physically writes the contents of IOAREA1 onto tape, and while
this is happening, internal processing continues. The fourth PUT writes the work-
area in the first record of IOAREA2, the fifth in the second record of IOAREA2,
and the sixth in the third record. At this time, IOCS physically writes IOAREA2
onto tape. The seventh PUT resumes writing the workarea in the first record of
IOAREA1. Records blocked in three require three PUT commands before a block
is physically written.
4. End-of-Volume. If the system detects the reflective marker near the end of the reel,
IOCS writes an EOV trailer label similar to the header label. The EOV label
includes a block count of all blocks written. Next, IOCS writes a tape mark. If an
alternate tape drive is assigned, IOCS OPENs the alternate volume, processes its
labels, and resumes writing of the file. It rewinds the old reel if required.
5. End-of-File. When all data is processed, we CLOSE the tape file. IOCS writes the
last block of data (if any). The last block may contain fewer records than the
blocking factor specifies. IOCS then writes a tape mark and an EOF trailer label
with a block count. Finally, IOCS writes two tape marks and deactivates the file
from further processing.

INPUT. This section briefly outlines the IOCS functions for tape input. When an
input file is opened, IOCS checks the header and volume labels. The file identifica¬
tion in the header must agree with that on the TLBL job control card to ensure that the
correct file is being read. For input, IOCS does not check the expiration date or write
a new header. The GET macro reads records, specifying either a workarea or IOREG.
If the tape records are unblocked, processing is similar to reading cards. If records are
blocked, IOCS performs the required "deblocking.”
Assume again two lOAREAs, three records per block, and a workarea. The first
GET executed reads a tape block containing records 1, 2, and 3, into IOAREA1,
filling it with three records. IOCS then transfers the first record to the workarea, and
reads the second tape block, containing records 4, 5, and 6, into IOAREA2:

IOAREA1 IOAREA2 Rec-4 Rec-5 Rec-6

If IOCS encounters the end-of-volume label before the end of file (meaning that
the file is continued on another reel), IOCS checks that the block count is correct.
272 MAGNETIC TAPE

The reel is rewound, an alternate tape drive is opened, labels are checked, and
reading of the next reel resumes.

END-OF-FILE. Each GET operation causes IOCS to transfer a record to our work-
area. Once every record has been transferred, and we attempt to read the end-of-file
label into the workarea, this means there are no more records to be read. They have
all been processed. IOCS then checks the block count and rewinds the reel. Control
is transferred to our end-of-file address designated in the DTFMT or DCB macros. We
should now CLOSE the file and attempt no further reading of it.

Problems 12-4 through 12-7 should now be done.

VARIABLE LENGTH RECORDS

Tape and disk files provide for variable length records, both unblocked and blocked.
The use of variable length reduces the amount of unused tape or disk storage, but a
disadvantage is in additional programming steps. A record may be variable length
because it contains one or more variable length fields or a variable number of fixed
length fields:

1. Variable Length Fields. Some fields, such as name and address, may vary consid¬
erably in length. In the normal fixed-length format, we define the length as that of
the longest possible content. It is possible to store only the significant characters
of the field. For example, an address such as 123 W. 35TH ST. requires only 15
characters, whereas an address such as 1234 SOUTH HOLLINGSWORTH DRIVE
requires 30 characters.
2. Variable Number of Fields. Certain applications require some data fields for one
customer and not for another. For example, a utility company sells both electricity
and gas, and customers may adopt paying by budget. For any given customer the
basic subrecord could be customer number, name, address, and balance owing
Optionally, the customer may have an electric subrecord (containing rate and
history of consumptions), a gas subrecord (containing rate and history of con¬
sumptions), and a budget subrecord (containing payment record). Customers mav
have any combination of these subrecords, but their record need not provide
space for all possibilities. If the customer buys only electricity and does not pay by
budget, then only the basic subrecord and electric subrecord are stored.

VARIATE UNBLOCKED AND BLOCKED RECORDS. IOCS processes variable

ength records similar to its processing of fixed length records. However both IOCS
and the programmer must know the length of each record that is being read or
written Therefore, immediately preceding each record we define a 4-byte record
contro word containing the length of the record. For example, if the record is 310
bytes long, then the record control word contains 314 (310 plus 4 bytes required bv
the record control word itself). Further, IOCS must know the length of each block.
273 Variable Length Records

Therefore, immediately preceding each block is a 4-byte block control word contain¬
ing the length of the block. We calculate and store the record length; IOCS calculates
and stores the block length.
Figure 12-5 illustrates both variable unblocked and blocked records. For vari¬
able unblocked note the following: (1) The first record (Rec-1) is 310 bytes long and
the record control word contains '314'. The block control word contains '318',
which is the length of the entire block. (IOCS generates a block control word even for
unblocked records.) (2) The second record (Rec-2) is 260 bytes long. The record
control word contains '264', and the block control word contains '268'.

Variable unblocked

For variable blocked the example shows three records stored in the first block.
A record control word precedes each record, and a block control word (containing
'866') precedes the block. IOCS calculates the length in the block control word as:

Length of record-1: 310 + 4 =314 bytes

Length of record-2: 260 + 4 = 264
Length of record-3: 280 + 4 = 284
862 bytes
Add length of block control word: _4
Total length of block: 866 bytes

We designate a maximum block length in the DTF entry BLKSIZE, and IOCS fits as
many records into this block as possible. For example, the block length may have
been defined as (maximum) 900. If it had been defined as 800, only the first two
274 MAGNETIC TAPE

records would have fit in this block and IOCS would begin the next block with the
third record. Although records are blocked, the block length and the number of
records per block will vary depending on the lengths of the records.

VARIABLE TAPE PROGRAMMING. Although IOCS performs most of the process¬

ing required for variable length records, we must provide the record length. The
additional programming steps are concerned with record and block length:

1. Record Length. As with fixed-length records, the program may process variable
records in a workarea or in the I/O areas (buffers). We define the workarea as the
length of the largest possible record, including the 4-byte record control word.
When creating the record, we calculate and store the record length in the record
control word field. This field must be four bytes in binary format, aligned on a
halfword boundary (DOS uses only the first two bytes).
2. Block Length. We define the I/O area as the length of the largest desired block,
including the 4-byte block control word. On output, IOCS stores as many com¬
plete records in the block as will fit. IOCS performs all blocking and calculating of
the block length. On input, IOCS deblocks the records similar to its deblocking of
fixed-length records.

EXAMPLE: READ AND PRINT VARIABLE LENGTH RECORDS. Assume a file of

tape records that contains variable length name and address, with fields defined as:

1 -4 Record length 5-9 Account number 10-82 Variable name and address

The name is immediately followed by a "delimiter", in this case a ' + ' (12-8-6 punch,
or X 4E'), to denote the end of the name. A ' + ' delimiter also terminates the next
field, the house address, and another terminates the city:

JP PROGRAMMER + 1327 NORTH 37TH STREET+KINGSTOWN +

Figure 12-6 illustrates a simple program that reads and prints the variable length
records. Devise several records and trace the logic of this routine carefully, step by
step. Note that DTFMT specifies RECFORM = VARBLK (record form = variable
blocked). The program reads each record and uses TRT and a loop to scan each of
the three variable length fields for the record delimiter. The length of the field is
calculated, and EX moves each field to the print area. The program also checks for
the absence of a delimiter.

Note: RECSIZE is omitted, because IOCS needs to know only the

maximum block length. For OS, the DCB entry for variable, blocked
record format is RECFM=VB.
 5 4
I N I T I a L I Z A T I 0 N
6 PROG12C START X« 3850•
7 6 ALR
X'saoo* * * X • 50* FOR LBLTYP TAPE
3.0
8 INITIALIZE BASE REGISTER
US ING ♦•3
9 OPEN FILEITP.FILEOPR ACTIVATE FILES

l9 4*4
20
main p R 0 C ess I N G
A1CGET 6ET FILE 1TP.TAPEWORM READ TAPE RECORO
26 LA 6. IDENTPIN
27 ESTAB. AOORESS OF INPUT IDENT
LR 7.6
ESTABLISH ADDRESS OF
28 AH 7.RECLEN
ENO OF RECORO
29 SH 7 » =H•9•
30 M VC PA 10 IS).ACCTTP IN
MOVE ACCOUNT NO. TO PRINT

32 4 20 SCAN TRT 0< 73.6).SCANTAB SCAN FOR DEL I Ml TER

33 BZ A30
34 * NO DELIMITER FOUND
LR 4 , |
SAVE AOORESS OF DELIMITER
35 SR 1.6
CALC. LENGTH OF FIELD
36 BCTR 1.0
DECREMENT LENGTH BY 1
37 EX 1•MlOMOVE
MOVE VARIABLE LENGTH FIELD
3e MV I CTLCHAR.MSP 1
39 PUT FILECPR.PR I NT PRINT. SPACE 1
45 xc PRINT.PRINT CLEAR PRINT AREA
46 LA 6. 1 < 0.4 ) INCREMENT FOR NEXT FIELD
4 7 CR 6.7
PAST ENO OF RECORD?
48 BL A20SCAN
* NO SCAN NEXT FIELD
49 A30 MV I CTLCHAR,WSP2 * YES - END
50 PUT FILEOPR.PR I NT PRINT, SPACE 2
56 B A 1OGET

58 M I OMOVE M VC P*20(0 ) .0(6 ) MOVE VARIABLE FIELD TO PRINT

60 ♦ enc-of-f:I L E
61 * l OEOF CLOSE FILE ITP.FILEOPR OE-ACTIVATE FILES
70 EO J NCRMAL END-OF-JOB
74 4
DECLARAT!IVES
75 SCANTA6 DC 78X* 00• TRT TABLF:
76 OC X* 4E •
» DELIMITER POSITION
77 DC 1 77X *00 • ♦ REST OF TABLE
78 4
TAPE RECORD MORKAHEaI
79 DS CH
* ALIGN ON EVEN BOUNDARY
80 TAPEiCR K DS 0CL82
« TOTAL MAX. RECORO * LENGTH
8 1 RECLEN DS H
* 2-BYTE RECORO LENGTH
82 OC H' 0 •
* 2 BYTES UNUSED IN DCS
83 ACC7 TP IN OS CL5 * ACCOUNT NUMBER
84 IOENTPIN DS CL 7 3
* AREA FOR VAR. NAME|ADDRESS

86 FILEITP DTFMT BLKSIZE=300.

TAPE INPUT FILE DECLARATION
DE V AC DR= S V SO 2E .
EOFAOOR=X1OEOF,
FILABL=STO.
I0AREA1 = I0ARTFI I ,
10 ARE A2=I0ARTPI2.
RECFCRMsVAReLK.
TYPEFLE=INPUT .
WORK A= YES
126 DS OH ALIGN ON EVEN BOUNDARY
127 IOARTPI l OS CL 30 0 BUFFER-1 TAPE FILE
1 28 10ARTPI2 OS CL 30 0 BUFFER-2 TAPE FILE

130 *SP1 EOU X*09* CTL char: PRINT, SPACE 1

1 2 1 #SP2 EQU X* 1 3 • 4 PRINT, SPACE 2

133 PR INT DS OCL 12 i PRINT AREA

134 C TLC HAR DS OC L 1 4
135 P OS OCL 1 4
1 36 OC CL 12 1 • • 4

138 FILEOPR DTFPR BLKS IZE=121 . PRINTER FILE DECLARATION

CTLCHR=YES.
DEVACOR=SYSLST.
DEVICE=1403,
I0AREA1=I0ARPRQ1 ,
I0AREA2=I0ARPR02.
»ORKAJ=VES
159 ICARPR01 OS CL 12 1 BUFFER-I PRINT FILE
160 I0ARPRC2 DS CLI2 I BUFFER-2 PRINT FILE
162 END PROG12C

FIGURE 12-6 Printing variable length records.

275
276 MAGNETIC TAPE

PROBLEMS

12-1. Name seven advantages that magnetic tape has over punched cards. What
are some disadvantages?
12-2. Explain the following: (a) tape density; (b) tape markers; (c) IBG; (d) blocking
factor; (e) fixed and variable length.
12-3. Give an advantage and a disadvantage of increasing the blocking factor.
12-4. What is the purpose of (a) volume label; (b) header label; (c) trailer label?
12-5. Distinguish between (a) EOV and EOF on the trailer label; (b) a multifile
volume and a multivolume file; (c) volume sequence number and file se¬
quence number.
12-6. Revise the program in Figure 12-2 or 12-3 for the following: 6 records per
block, locate mode. Change file identification to your own name. Assemble
and test the program.
12-7. Revise any previous card program so that the input data is on magnetic tape.
Provide for fixed, blocked records.
12-8. Assume a variable tape file, with six records whose lengths respectively are
326, 414, 502, 384, 293, and 504. Maximum block length is 1200 bytes.
Depict the records showing all block and record lengths.
12-9. Write a program that creates a Supplier Master File.
— Input fields are: Supplier number (7 bytes); Amount payable (7 digits to
be stored in packed format); Name (20 bytes); Street (24 bytes); City (24
bytes); Date of last purchase (ddmmyy).
— Name, street, and city are to be stored as variable length fields, with hex
'FF' as a delimiter after each field.
— Next, write a program that updates the file with two tape files: (1) pur¬
chase entries (supplier number, amount, date); and (2) miscellaneous
changes to name and address records.
 CHAPTER 1 3

DIRECT ACCESS STORAGE

Every installation has its own unique file organization and processing requirements.
Also, its budget constraint limits the size of main storage and the type and number of
devices. For one installation, the optimum configuration is a simple small diskette
system, whereas for another it is a combination of magnetic tapes, direct access
storage devices, and teleprocessing terminals. Direct Access Storage devices (DASD)
have a significant advantage not provided by other devices: DASD permits the
organization and processing of files not only in sequence (as for cards and tape), but
also directly (randomly). On tape, to access a particular record, we must process
every preceding record; under DASD, however, we may directly access any record
on the file.
This capability of direct accessing is particularly useful for "on-line" process¬
ing. For example, a department store keeps its accounts receivable on a DASD.
When customers present their credit cards for a purchase, the cashier submits the
customer credit number through a terminal to the computer center. A computer
program uses this credit number to directly access the customer number in the file,
determines the customer's credit rating, and signals the rating to the cashier. The
cashier is informed almost immediately whether the customer can have more credit,
or has exceeded the limit, or possibly that the card was reported lost.

277
278 DIRECT ACCESS STORAGE

DASD's are also commonly used for storing on-line the installation's operating
system, the various support programs, and catalogued macros and subroutines. The
DASD then, like tape, acts as both an input/output device and external storage.
There are many types of direct access storage devices, of which the more common
ones include:

— Drives with removable disk packs: 231 1, 2314, 3330, and 3340.
— Drives with nonremovable storage: 2305, 3344, and 3350.

Each type of device has unique physical differences. However, the program¬
ming for each device is similar. Each record stored on a device has a specific location
with a unique address and has a control field (“key'') for identification.

DASD CHARACTERISTICS

Certain of the DASD's, such as the 231 1, 3344, and 3330, have disks for recording
data. These disks, made of metal coated with magnetic oxide, are similar to phono¬
graph record surfaces. But a record has tracks that spiral inward, whereas the DASD
tracks are concentric—each track makes a unique circle, as shown in Figure 13-1.
The track contains the data, generally recorded bit-by-bit, with records and
blocks stored just as on magnetic tape. Similarly, data may be written and rewritten
on the same track for permanent or temporary records. Although innermost tracks are
shorter in circumference, all tracks contain the same number of bytes. On a 2311, for
example, the disk surface has 200 primary tracks plus 3 alternate tracks used if any of
the primary tracks become defective. The number of tracks on a disk surface and
their capacity varies by device.

A disk pack consists of a number of rotating disks on a vertical shaft. Except for
the top and bottom disk, the surfaces are recorded on both sides. Figure 1 3-2 shows
the access arms that move horizontally to position at any track. Each arm has two
read/write heads—one for the upper surface and one for the lower. Only one head at
a time reads and writes. To read a record, for example, on the outermost track, all the
access arms position there. The record to be read is on one of the surfaces—only the
279 DASD Characteristics

FIGURE 13-2 Disk storage device mechanism.

head for that surface is activated to read the record. As the disk rotates, the read occurs
when the data record reaches the head. Figure 1 3-3 lists the number of tracks and
their capacity. The 3330, for example, has 19 surfaces, giving a total of 100 million
bytes of storage (certain of this space is required for nondata records and gaps).

TIMING. There is some delay from the time a read/write instruction is executed
until the data is actually received. As shown in Figure 1 3-3, the time varies consider¬
ably by device, but includes:

Access Motion. The more often and further that the access arm moves, the more time
is taken. The section Cylinder Concept explains how data is organized to
minimize this seek time.

Capacity Speed
Bytes Tracks Number Total Ave. Ave. Data
Device per per of bytes seek rot’l rate
track cylinder cylinders time delay KB/
(ms) (ms) sec.
2311 3625 10 200 7,250,000 75 12.5 156

3340-1 8368 12 348 35,000,000 1

12 696 70,000,000 10.1 885
Jr 25
3340-2 8368
3344 8368 12 4 x 696 280,000,000

3330-1 13030 19 404 100,000,000

]■ 30 8.4 806
3330-11 13030 19 808 200,000,000
3350 19069 30 555 317,000,000 25 8.4 1200

FIGURE 13-3 IBM direct access devices.

280 DIRECT ACCESS STORAGE

Rotational Delay. As the disk rotates, time is required for the data to reach the
read/write head. The average rotational delay ("latency”) is half a rotation.
Data Transfer Rate. The device's rotation speed and density of data affect the time to
transfer data between the device and main storage.

CYLINDER CONCEPT. Data is organized to minimize arm movement. The DASD

does not store data on a surface starting with the outermost track through to the inner
tracks of the same surface. Such a storage method would require considerable access
arm movement back and forth across surfaces. Rather, the DASD stores data down¬
wards beginning with the outermost track of the top surface through to the outermost
track of the bottom surface. This series of vertical tracks is called a cylinder, and the
outermost one is cylinder-0.
The tracks for a cylinder are numbered beginning with 0, so that cylinder-0,
track-0 is the outermost track of the top surface, and cylinder-0, track-1 is the next
one below it. When all cylinder-0 is filled with data, the DASD stores next on
cylinder-1 (the next inner series of tracks), beginning at cylinder-1, track-0. (The
cylinder concept may be clearer if you imagine a series of different size tin cans, with
no top or bottom lids, one inside the other. Each can is a "cylinder," with data stored
in grooves around the sides.)
When the DASD reads sequentially, it positions the heads at cylinder-0.
Head-0 begins reading from cylinder-0, track-0. When all track-0 records are read,
the device selects head-1 to read from track-1—no access motion is required. The
device then continues reading down through to the last track on cylinder-0. Next, the
access arm moves (for the first time) to cylinder-1, where it processes successively
from track-0 through to the last track of cylinder-1.

TRACK FORMAT. Every track contains certain information about its address and
condition. Between the different records on the track are gaps; these vary by device
and their location on the track. The basic format for a track is:

© ® ©
Index Home Track Descriptor Data Data
Point Address Record (R0) Record (R1) Record (R2) etc.

(a) The Index Point tells the read/write device that this point is the physical begin¬
ning of the track—data is recorded following the Index Point.
® The Home Address tells the system the address of the track (the cylinder and
head, or surface, number) and whether the track is a primary or alternate track or
defective. '
© The Track Descriptor Record (R0) immediately follows the Home Address The
system stores information about the track in this record. There are two separate
ie ds. a Count Area and a Data Area. The Count Area contains '0' for record
281 DASD Characteristics

number and '8' for data length. It is otherwise similar to the Count Area described
next for Data Record under item (d). The Data Area contains eight bytes of
information used by the system. The Track Descriptor Record is not normally
accessible to the programmer.
(d) Data Record Formats (R1 through Rn). Following the Track Descriptor (RO)
record is one or more of our data records, each consisting of the following:

A Count Key Data

M Area Area Area

address marker optional

Address Marker. The I/O control unit stores a two-byte Address Marker prior to
each block of data. When reading records, the control unit uses the Address
Marker to locate the beginning of data.
Count Area. This is a field that the system also stores and uses. Included are:
An Identifier field gives the cylinder/head number (similarto that inthe Home
Address), and the sequential record number (0-255) in binary, represen¬
ting RO through R255. (The Track Descriptor Record, RO, contains zero
for record number.)
The Key Length field is explained in the next section, Key area.
The Data Length is a binary value 0 through 65,535 that specifies the number
of bytes in the Data Area field (the length of our block of data). For
the end-of-file, the system generates a last (“dummy") record containing
a length of zero in this field. When the system reads the file, this zero
length indicates that there are no more records.
Key Area. Under DASD, the key is the control field for the records in the file, such
as customer or inventory number. The key, if stored in this separate Key Area,
can facilitate locating of records. The key area is optional. If omitted, then
the fi le is cal led formatted without keys (Count-Data-Format). The key length
in the Count Area contains zero. If the file is formatted with keys (Count-
Key-Data-Format), then the Key Length contains the length of the Key area.
Data Area. We store our data blocks in this area in any format—unblocked or
blocked, fixed length or variable, just as on magnetic tape.

Under normal circumstances, the programmer is not concerned with the Home
Address and Track Descriptor record, nor with the Address Marker, Count Area, and
Key Area portions of the Data Record field. The system completely handles the
processing of these fields. As shown in the following example programs, it is simply
necessary to specify appropriate entries in the DTF or DCB and job control state¬
ments. We can then read and write sequential disk records much like cards and tape.
The system stores as many records on the track as possible. Usually, records are
stored completely (intact) on a track. A record overflow feature permits records to
overlap from one track to the next.
282 DIRECT ACCESS STORAGE

FILE ORGANIZATION

There are several ways to organize a DASD file. The choice of method is a systems,
not a programming, problem, and therefore this text gives a limited description of
organization methods. The four main methods of DASD file organization are:

1. Sequential Organization. In this method, also used by cards and magnetic tape,
each record follows another successively according to a predetermined key (con¬
trol field). We would adopt sequential if we do not require on-line processing,
and if most records are processed when the file is read. The DOS organization
method is Sequential Access Method (SAM), and we use the macro DTFSD (De¬
fine The File Sequential Disk). Advantage: sequential provides simplest design
and programming, and minimizes DASD storage space. Disadvantage: it is dif¬
ficult to locate a unique record and to insert a new record without rewriting the
file.
2. Direct (Random) Organization. This method stores records based on a relation¬
ship between the key (control field) and the track address where the DASD record
is stored. Our program performs a calculation on the key number to locate the
address of the record. The DOS method is Direct Access Method (DAM), and we
use DTFDA (Direct Access). Advantage: Direct Access provides fast and efficient
use of DASD storage for directly accessing any record. Disadvantages: (1) The file
keys must lend themselves to such a calculation. (2) A calculation for more than
one key may generate the same track address ("synonyms”). (3) The file may be
arranged in a sequence other than sequential, and require special programming to
produce sequential reports. (4) We must provide special programming to locate
the record.
3. Indexed Sequential Organization. Records are stored sequentially, permitting
normal sequential processing. In addition, this method has indexes related to the
file; we may use these indexes to locate records directly. The DOS method is
Indexed Sequential Access Method (ISAM), and we use DTFIS (Indexed Sequen¬
tial). Advantage: Indexed Sequential permits both sequential and direct process¬
ing of files with little special programming effort. Disadvantage: IS may use more
DASD storage and process more slowly.
4. Virtual Storage Access Method. VSAM is a more recent development for the 370
systems, and permits both sequential and direct processing.

This text covers programming for Sequential and Indexed Sequential organization.

Problems 13-1 through 13-5 should now be attempted

DOS PROGRAMMING EXAMPLE—CREATING A SEQUENTIAL

DISK FILE

Programming for sequential disk is similar to that for magnetic tape. The program in
Figure 13-4 creates a sequential disk file. The input is the tape file created in Chapter
12, Figure 12-2. A later section describes the disk job control entries, DLBL and
 6 INITIALIZATI 0 N
7 PROG 13A START X*3850'
X•380 0• + X•5 O' FOR LBLTVP TAPE
8 BALR 3,0
INITIALIZE BASE REGISTER
9 USING *,3
10 OPEN T APE * SO ISK ACTIVATE FILES

20 * MAIN PROCESSING
2 1 A10GET GET TAPE READ I TAPE RECORO
26 MVC TAPEIN.0<5) MOVE FROM TAPE BUFFER
27 MVC ACCTCKO,ACCTIN MOVE TAPE FIELDS TO DISK
28 M VC NANEOKO.NAMEIN * AO RK AREA
29 M VC AOOROKO.AOORIN *
30 ZAP BALNDKO.BALNIN *
3 I MVC OATEDKO.DATEIN *
32 PUT SDISK.DISKWORK WRITE WORK AREA ONTO DISK
38 B A 1 OGET

40 * end-of-file
4 1 P10END CLOSE TAPE.SOISK DE-ACTIVATE FILES
50 EO J NORMAL END-OF-JOB

54 • DECLARATIVES
55 TAPEIN DS OCL90 TAPE INPUT AREA
56 ACCTIN DS CL6 * ACCOUNT NO.
57 NAME IN DS CL20 * NAME
58 AOCRIN DS CL40 * ADDRESS
59 BALNIN OS PL4 * BALANCE
60 DATE IN DS CL6 ' DOMMVY• * DATE
61 OS CL 14 * UNUSED

63 DISKWORK DS 0CL90 DISK WORK AREA

64 ACCTOKC DS CL 6 * ACCOUNT NO.
65 NAMEOKC DS CL 20 * NAME
66 AODROKO OS CL40 4 ADORESS
67 8ALNDK0 OS PL4 * BALANCE
68 OATEDKC OS CL6 * CATE
69 oc CL 14* • * RESERVED FOR EXPANSION

?1 TAPE DTFMT BLKSIZE=360. TAPE INPUT FILE DECLARATION 4

DEVA0DR=SYS025 . ♦
EOFAODR=P1OENO. 4
ERROPT=IGNORE. 4
FILA8L=STD. 4

♦
I0AREA1=I0ARTPI1. 4
I0REG=<5>.
RECF0RM=FlX8LK , 4

RECS IZE = 090. 4

TYPEFLE=INPUT
109 IOARTPI1 DS CL36C IOCS INPUT TAPE BUFF ER — I

111 SO ISK OTFSD 8LKSIZE=368. DISK OUTPUT FILE DECLARATION ♦

DEVA0DR=SYS01S, 4
DEVICE=3340 , 4
IOAREA1=I0ARDK01, 4
RECFORM=FIXBLK , 4

RECSIZE=90, 4

TYPEFLE=OUTPUT , 4

VERIFY=YE S • 4

•ORKA=YES
162 I0AR0KC1 DS CL368 IOCS OISK BUFFER-1

164 END PROG 13A

// LBLTYP TAPE
// EXEC LNKEDT
// TLBC T APE•* CU ST REC TP•.0. 10 0236
// ASSGN SYS015.XM62'
// OLBL SDISK,'CUSTOMER RECORDS SO' .0
// EXTENT SYSO15.222222,1 .0.0700, 10

FIGURE 13-4 Sequential disk processing under DOS.

283
284 DIRECT ACCESS STORAGE

EXTENT (bottom of the figure). Entries for the DTFSD macro are similar to those for
DTFMT.
Note that there is no FILABL entry because DASD labels must be standard.

BLKSIZE = 368 means that the blocksize for output is 360 bytes (4 x 90) plus 8 bytes
for IOCS to construct a count field. The lOAREAs are also 368 bytes. We provide
for these extra 8 bytes only for output; for input the entry is 360.
DEVICE = 3340 means that for this program, records are written on a 3340 DASD.
VERIFY = YES tells the system to reread each output record to check its validity.

This example creates a sequential disk file. In a later section, this file becomes input
to create ("load") an indexed sequential file. It is also possible to update an SD file
directly (rewrite a record over the previous one); this chapter does not cover this
practice.

Note: DEVADDR may be omitted (the system uses the SYSnnn from the
job control entry).

OS PROGRAM EXAMPLE

The example OS coding in Figure 13-5 is a revision of the previous DOS example
that reads tape records and copies them onto disk. The DD job control cards contain
some of the DCB entries: for tape input, BLKSIZE, RECFM, and DEN, and for disk
output, BLKSIZE, and RECFM.
For a disk DCB, an entry MACRF-(GM,PM) means the program can both read
and write the same file.

DISK LABELS

Disks, like magnetic tape, use labels to identify the volume and the file. This text
describes the IBM standard labels as supported by IOCS. Cylinder-0, track-0 is re¬
served for labels, as depicted in Figure 13-6:

Record-0—the Track Descriptor, R(0).

Record-1 and 2 Certain devices, if the disk is SYSRES (containing the operating
system), reserve R(1) and R(2) for the IPL (Initial Program Load) routine For all
other cases, R(1) and R(2) contain zeros.
Record-3—the VOL1 label. (There may actually be more than one volume label
from R(3) through R(10), not supported by DOS.)
Record-4 through the end of the track—This is the standard location for the Volume
Table Of Contents (VTOC). The VTOC contains the file label(s) for the files on
the DASD.
 //GO.TAPEIN DD DSNAME=TRFILE,DISP=(OLD,PASS) ,UNIT=3420, X
DCB= (BLKSIZE=360,RECFM=FB,DEN=3)

//GO.DISKOT DD DSNAME=&TEMPDSK,DISP= (NEW,PASS) ,UNIT=*3340 ,SPACE= (TRK,10), X

DCB=(BLKSIZE—3 6 0,RECFM=FB)

INITIALIZATION

PROG I3B START 0

SAVE <14.12)
BALR 3.0
USING *.3
ST 13.SAVEAREA+4
LA 13.SAVEAREA
OPEN (T APE,(INPUT).St

*** MAIN PRO!C E S S I N G

A10GET GET TAPE READ 1 TAPE RECORD
M VC TAPEIN,0< 1 ) MOVE FROM TAPE BUFFER

M VC ACCTDKO,ACCTIN MOVE TAPE FIELDS TO DISK

M VC NAMEDKO,NAMEIN * WORK AREA
MVC ADDRDKO,ADDRIN A

ZAP 8ALNDKQ.BALK IN *

MVC DATEOKO.DATE IN *

PUT SDISK.OISKWORK WRITE WORK AREA ONTO 01SK

B A10GET

*»* END-OF-F I L E

P10END CLOSE (TAPE..SDISK)

L 13.SAVEAREA+4
RETURN (14.12)

* ** DECLARAT

GCL90 TAPE INPUT AREA

TAPEIN DS
CLt * ACCOUNT NO.
ACCTIN OS
CL 20 * NAME
NAME IN DS
CL40 * ADDRESS
ADDRIN CS
PL 4 * BALANCE
EALNIN DS
CL6•DDMMYY• * DATE
CATE IN DS
CL 1 4 * UNUSED
DS

0CL90 DISK WORK AREA

DISKiORK OS
CL 6 * ACCOUNT NO.
ACCTDKO DS
CL 2 0 * NAME
NAMEDKO DS
CL40 * ADDRESS
ADORDKO DS
PL 4 * BALANCE
E ALNDKO DS
CL6 * DATE
CATEOKO DS
* RESERVEO FOR EXPANSION
DC CL 14* 1

OONAME=TAPEIN. TAPE INPUT DATA SET

TAPE CCB
CSCRG=PS.
EODAD=P1OEND.
LRECL=90.
MAC R F = (GL)

CCB DONAME=0ISKOT. DISK OUTPUT DATA SET

SD ISK
CSORG=PS.
LHECL=90.
MACRF=(FM)

REGISTER SAVE AREA

SAVEAREA OS 10F
LTORG .
END PROG13B

FIGURE 13-5 Sequential disk processing under OS.

285
286 DIRECT ACCESS STORAGE

Cylinder-O, Track-0

Track Format-4 Format-5 Format-1 #4

zeros zeros VOL1 #2 #3
Descrip’r Label Label Label #1

Record 0 i 2
3\ v_

Volume label
4 5 6
Y

VTOC File labels

7 8 9

FIGURE 13-6 Disk volume layout.

VOLUME LABELS. The standard Volume label uniquely identifies the DASD vol¬
ume. A 4-byte key area immediately precedes the 80-byte volume data area. The
Volume label is the fourth record (R3) on cylinder-O. The 80 bytes are arranged
similarly to a tape volume label with one exception: positions 12-21 are the "Data
File Directory", containing the starting address of the VTOC.

FILE LABELS. File labels identify and describe a file (data set) on a volume. The file
label is 140 bytes long, consisting of a 44-byte key area and a 96-byte file data area.
Each file on a volume requires a file label for identification. In Figure 13-6 all file
labels for the volume are stored together in the Volume Table Of Contents (VTOC).
Although we may place the VTOC in any cylinder, its standard location is cylinder-O,
track-0. There are four types of file labels:

1. The Format-1 label is equivalent to the magnetic tape file label. The Format-1
label differs, however, in that it defines the actual cylinder-track addresses of the
start and end of the file—the "extent". Further, a file may be stored intact in an
extent or in several extents on the same volume. Format-1 permits up to three
extents on a volume. (Format-3 is used if the file is scattered over more than three
extents.)
2. The Format-2 label is used for indexed sequential files.
3. The Format-3 label is stored if the file occupies more than three extents.
4. The Format-4 label is the first record in the VTOC, and defines the VTOC for the
system.

The Format-1 File Label contains the following:

POSITIONS NAME DESCRIPTION

01 -44 File Identification An unique identification consisting of File-ID.
Generation number.Version Number (we may
use simply File-ID).
45-45 Format Identifier ‘V for Format-1.
46-51 File Serial Number The Volume Serial numberfrom the volume label.
52-53 Volume Sequence The file may require more than one volume_
Number this is the sequence number,
54-56 Creation Date ) ydd (Binary) y = year (0-99),
57-59 Expiration Date ’ dd = day (1-366)
287 Indexed Sequential File Organization

POSITIONS NAME DESCRIPTION

60-60 Extent Count No. Number of extents for this file on this volume.
61 -61 Bytes Used in Last Used by OS only.
Block of Directory
62-62 Reserved.
63-75 System Code Contains the name of the operating system.
76-82 Reserved.
83-84 File Type Contains a code to identify if SD, DA, or IS type
of organization.
85-85 Record Format Used by OS only.
86-86 Option Codes IS only—to indicate if file contains Master index
and type of overflow areas.
87-88 Block Length IS only—the length of each block.
89-90 Record Length IS only—the length of each record.
91 -91 Key Length IS only—the length of the key area for data
records.
92-93 Key Location IS only—the leftmost position of the key field
within the record.
94-94 Data Set Indicators SD only—indicates if this is the last volume.
95-98 OS only.
99-103 Last Record Pointer OS only.
104-105 Reserved.
106-106 Extent Type s|
107-107 Extent Sequence No.!> Descriptors for the first or only extent for the file.
108-111 Extent Lower Limit 1
112-115 Extent Upper Limit • 1
116-125 Descriptors for the second extent, if any.
1 26-1 35 Descriptors for the third extent, if any.
136-140 Pointer Address of the next label. For IS, the format-2
label; for SD and DA, the format-3 label if any.

Note: In the above example, IS means Indexed Sequential and OS

means Operating System.

Problems 13-6 through 13-9 should now be attempted.

INDEXED SEQUENTIAL FILE ORGANIZATION

This chapter covers mainly the concepts and the more important features of Indexed
Sequential File Organization; more details are available in the Supervisor manuals.
DOS sequential files for card, tape, and disk use the Sequential Access Method
(SAM). DOS Indexed sequential files use Indexed Sequential Access Method (ISAM).
ISAM provides the facilities to process disks both sequentially and directly. Before
examining the programming requirements, we should first see how an indexed se-
quential lie is organized. In addition to our data records in a prime data area,
there are indexes that assist ISAM to locate our record.
 288 DIRECT ACCESS STORAGE

THE PRIME DATA AREA. ISAM writes ("loads") our records on tracks in the
"prime data area." These records are written with keys, in key sequence, and may be
unblocked or blocked. Preceding our data records in the track is the Home Address
(HA). See Figure 1 3-7: Under the Prime Data Area, for cylinder-O/track-1, the first key
is 0001 and the highest is 0021. The last record on the ISAM file is on track-n (the
number of surfaces varies by device) and contains the highest key on the cylinder,
0825.

THE TRACK INDEX. When creating the file, ISAM establishes a "track index" in
track-0 of each cylinder used. The track index contains an entry for the highest key
for each track on the cylinder. See Figure 1 3-7: For the track index for cylinder-0, the
first entry is the Home Address. Next is the "Cylinder Overflow Control Record"
(COCR), covered later. Next is an entry "key 0021, cylinder-0/track-1," which
means that the highest key on cylinder-0/track-1 is 0021. The last entry is key 0825
on cylinder-0/track-n. This entry is followed by a "dummy entry" to indicate the end
of the index. The dummy entry contains the highest possible value in the key, X'F's.

PRIME DA TA A REA—Records on Cylinder-0

Cylinder-0 Cyl/Track

Last record on each track

T rack-1 0001 0001 0004 0007 0021

HA Data records on track-1

Track-2: 0002 0022 0024 0032 0056

HA Data records on track-2

Track-n: OOnn 0802 0804 0805 0825

HA Data records on track-n
V
Last record, highest key on cyl-0

High Cyl High Cyl Dummy End

key 0 key 1

FIGURE 13-7 Index sequential organization.

289 Indexed Sequential File Organization

Therefore, we should never use X'F's as our own key. (Figure 13-7 is intentionally
simplified. There are actually two entries for each track: a normal entry (shown) and
an "overflow entry" (not shown).)

THE CYLINDER INDEX. ISAM creates a "cylinder index" for the file on a separate
cylinder (or on a separate volume). The cylinder index contains an entry for the
highest key for each cylinder—the home address. In Figure 13-7, the first entry is
"key 0825, cylinder-0," meaning that the highest key on cylinder-0 is 0825. The
cylinder index is also terminated by a dummy record containing X'F's in the key. We
tell ISAM where to store the cylinder index. At execute-time, ISAM can load the
cylinder index into main storage for faster reference during the run, thereby reducing
disk access and processing time.
The program may access an ISAM file either sequentially or directly. Sequential
processing involves the use of the GET and PUT macros, as GET filename,workarea.
Direct processing uses READ and WRITE; to access a record directly, we code READ
filename, key and ISAM uses our key to locate the disk record. Assume that the key is
0024 and the program is accessing directly:

— ISAM searches the cylinder index to locate the cylinder where the required
record is stored. The first entry in the index is high key 0825, cylinder-0. Since
our key 0024 is lower than 0825, our record must be on cylinder-0.
— Having located the cylinder, ISAM accesses cylinder-0/track-0 for the track index
to locate the track where the record is stored. The first index entry is high key
0021, track-1. Our key is greater, so the record is not on track-1. The second
entry is key 0056, track-2; record 0024 is on cylinder-0/track-2.
— ISAM has now located the correct cylinder/track, so it accesses track-2, reads
record 0024, and transfers it to the program's input area.

THE MASTER INDEX. If the cylinder index occupies more than four tracks, it may
be more efficient to have an optional higher level of index, a "master index." The
master index immediately precedes the cylinder index and contains one entry for
each track of the cylinder index—the highest key and the track. The system can first
search the master index to locate the track where the required cylinder index is
stored.

OVERFLOW AREAS. When we update a file we often have to insert new records,
such as new employees and customers. Under sequential processing we rewrite the
file, inserting the new records. But ISAM permits us to insert new records without
rewriting the entire file. ISAM writes the new records as unblocked in an overflow
area, and stores an overflow entry in the track index to point to the overflow record.
There are two types of overflow areas; either or both may be used:

1. Cylinder Overflow Area. The EXTENT card defines the number of tracks in each
cylinder for ISAM to insert added records. The cylinder overflow area is in the
290 DIRECT ACCESS STORAGE

prime area and stores all overflow records for that cylinder. The Cylinder Over¬
flow Control Record (COCR) in Figure 1 3-7 stores the address of the last overflow
record in the track and the number of unused bytes in the overflow area.
2. Independent Overflow Area. We may define the number and location of cylin¬
ders used exclusively for new added records. Our job control extent statement at
execute-time tells ISAM where to store records in the independent overflow area.
3. Use of Both Areas. If we specify both types of overflow areas, ISAM places all new
records first in the cylinder overflow area. When any cylinder is full, ISAM places
excess overflow records for that cylinder in the independent overflow area.

ISAM handles all overflow records and the linkage from the prime area to the
overflow area. As the overflow areas become full, more processing time is required to
access records. We may periodically use a special utility program to “reorganize”
the file. The program rewrites the file, and merges the overflow records in with the
prime area records.
There are four approaches to programming ISAM:

1. load or Extend an ISAM File. The initial creation of an ISAM file is called "load¬
ing. Once the file is loaded, it is possible to include higher-key records at the end
of the file—"extending".
2. Adding Records to an ISAM File. New records have keys that do not exist on the
file. Special programming is required to insert or "add" these records within the
file.
3. Random Retrieval of an ISAM File. New data requires that the file be updated at
regular intervals. We can read the new data (such as sales records), use the key to
randomly locate the ISAM master record, and rewrite the updated ISAM master.
4. Sequential Processing of an ISAM File. If there are many records to update and the
new detail records are in sequence, then we can sequentially read and rewrite the
ISAM master.

PROCESSING DOS INDEXED SEQUENTIAL FILES

The following illustrates required imperative macros and the DTFIS file definition
macro for indexed sequential under DOS. The DOS Supervisor and I/O Macros
manual supplies additional useful information.

LOAD OR EXTEND AN ISAM FILE UNDER DOS. Figure 1 3-8 creates an ISAM file
The input is sequential disk (SD) records created in Figure 13-4. This program writes
these records onto an indexed sequential (IS) file called DISKIS. The new instructions

isirm TheDLLB|WRI
\SAM ( ) The DLBL card rT"
7'entry ^ DTF'S'
for codes' TheISC,
contains J°b meaning
COntro1 Indexed
also “
Sequential
reate (Load), and (2) there is an EXTENT card for both the cylinder index and for the
data area. In addition, ISAM requires that we check the status condition caused by
each macro (covered later). y
 6 •
initializat 0 N
7 PROG 13C START X* 3050* X•3800* ♦ X•50' FOR LBLTVP NSD
8 e ALR 3.0 INITIALIZE BASE REGISTER
9 USING *.3
10 OPEN OISKSO.OISKIS ACTIVATE FILES
19 SETFL DISKIS SET ISAM LIMITS
25 tm DISK ISC.0*10011000* ANT SETFL ERRORS?
26 BO R10ERR YES - ERROR ROUTINE

28 • MAIN PROCESS I N G
29 A1CGET GET OISKSO.SOISKIN GET SEQUENTIAL DISK RECORD
35 M VC KEVNO.ACCTIN SET UP KEY NUMBER
36 M VC RECORD.SOISKIN SET UP ISAM DISK RECORD
37 WRITE DISKIS.NEWKEY WRITE ISAM RECORD
42 TM OISK1SC.0*1 1111110* ANY WRITE ERRORS?
43 BO R10ERR YES - ERROR ROUTINE
44 B A10GET NO - CONTINUE

46 • ENO-OF-FILE
47 P1OEND ENOFL DISKIS END ISAM FILE LIMITS
59 TM DISKISC.B*11000001• ANT ENOFL ERRORS?
60 BO RIOEfiR YES - ERROR ROUTINE
61 P20 CLOSE OISKSO.OISKIS DE-ACTIVATE FILES
70 EOJ NORMAL END-OF-JO0

74 • D A S 0 ERROR R O U T I N E S
75 R1OERR Equ • DASD ERROR
76 * • RECOVERY ROUTINES
77 B P20

79 4 DECLARATIVES
8C SDISK IN DS 0CL90 SEQ*L DISK INPUT AREA
81 ACCTIN DS CL6 * KEY
82 DS CL 8 4 • REST OF RECORD

84 OISKSD DTFSD BLKSIZE=360. SEQUENTIAL DISK INPUT ♦

DEVACDR=SYS015. ♦
EOFADDR=P1OEND. +
DEVICE=3340. ♦
IOAREA1=IOARSD1. ♦
RECFORM=FIXBLK, ♦
RECSIZE=90. +
TYPEFLE=INPUT. ♦
MORKA=YES
130 IOARSD1 DS CL360 SEQ *L DISK BUFFER-1

132 OISKIS DTF I S CYLOFL=l, INOEXED SEQUENTIAL DISK LOAO -f

DEVICE=3340. ■f

0SKXTNT=2. ♦
I0AREAL—IOARISAM.
IOROUT=LOAD, ♦
KEYL EN=6. ♦
NRECDS=1. ♦
RECFORM=FIXUN6. ♦
RECSIZE=90. ♦
VERIFY=YES. ♦
WORKL=ISAMOUT
182 IQARISAM DS CL 10 4 ISAM OUTPUT AREA

184 ISAMOUT DS 0CL96 ISAM WORKAREA

1 85 KEYNC DS CL 6 * KEY LOCATION
186 RECORD DS CL90 * DATA AREA

188 END PR0G13C

FIGURE 13-8 Creating (loading) a DOS ISAM file.

291
292 DIRECT ACCESS STORAGE

ISAM MACROS FOR LOAD AND EXTEND. We code the usual OPEN and CLOSE
to activate and deactivate the files. The new macros are:

SETFL filename
WRITE filename, NEWKEY
ENDFL filename

SETFL (Set File Load Mode). When we load or extend a file, SETFL initializes the
ISAM file by preformatting the last track of each track index. The operand
references the DTFIS name of the ISAM file to be loaded.
WRITE. The macro WRITE loads a record onto the ISAM file. The filename is our
DTFIS name. Operand-2 is the word NEWKEY. We store the key and data area
in a workarea (called ISAMOUT in Figure 1 3-8). DTFIS knows this area through
the entry WORKL=ISAMOUT. For the WRITE statement, ISAM checks that the
new key is in ascending sequence. Then ISAM transfers the key and data area to
an I/O area (this is IOARISAM in the program, known to DTFIS by
IOAREAL=IOARISAM). FHere ISAM constructs the count area:

WORKL= ISAMOUT:
IOAREAL= IOARISAM:

ENDFL (End File Load Mode). After all records are written, ENDFL performs the
following: (1) writes the last block of data (if any); (2) writes an end-of-file
record; and (3) writes any required index entries.

THE DTFIS MACRO. The maximum length for an ISAM filename is seven. In Figure
13-8, the DTFIS entries for the file to be loaded are:

CYLOFL— 1 gives the number of tracks on each cylinder to be reserved for each
cylinder overflow area (if any). The maximum depends on the device.
DEV1?7.?340 'S the DASD unit containin§ the prime data area or overflow area for
the file.
DSKXTNT—2 designates the number of extents that the file uses. The number consists
ot one for each data extent and one for each index area and independent
overflow area extent. This program has one extent for the prime data area and
one for the cylinder index.
IOAREAL=IOARISAM provides the name, IOARISAM, of the ISAM load I/O area
0uSTa°IC n^me IOARISAM references our DS output area. For loading
unblocked records, the IOAREAL field length is calculated as: 8

Count Area (8) + Key Length (6) + Record Length (90)

293 Processing DOS Indexed Sequential Files

IOROUT=LOAD tells the Assembler that the program is to load an ISAM file.
KEYLEN-6 provides the length of our key area.
NRECDS=1 gives the number of records per block for this file (unblocked).
RECFORM=FIXUNB means that the records are to be fixed-length and unblocked.
RECSIZE = 90 is the length of each record's data area.
VERIFY=YES tells the system to check the parity of each record as it is written.
WORKL=ISAMOUT gives the name, ISAMOUT, of our load workarea (the DS for the
workarea is defined elsewhere in the program). For unblocked records, this
length is calculated as:

Key Fength (6) + Data Area (90)

STATUS CONDITION. ISAM macros may generate certain error conditions, and
the system allows us to test them. After each I/O macro operation, ISAM places the
"status" in a 1-byte field called filenameC. For example, if our DTFIS name is
DISKIS, then ISAM calls the status byte DISKISC. Following is a list of the eight bits in
filenameC that the system may set when a program loads an ISAM file:

BIT LOAD STATUS ERROR CONDITION

0 Any uncorrectable DASD error except wrong length record.

1 Wrong length record detected during output.
2 The prime data area is full.
3 The cylinder index is full, discovered by SETFF.
4 The master index is full, discovered by SETFF.
5 Duplicate record—the current key is the same as the one previously loaded.
6 Sequence check—the current key is lower than the one previously loaded.
The prime data area is full and there is no space for ENDFF to store the end-of-
file record.

In Figure 1 3-8, TM operations test DISKIS after the macros SETFF, WRITE, and
ENDFF. After SETFF, for example, the TM instruction tests if bits 0, 3, and 4 are on. If
any of the conditions exist, the program branches to an error routine (not coded).
There, special programming action may isolate the error, print an error message, and
possibly terminate the job.

RANDOM RETRIEVAL OF AN ISAM FILE. Figure 1 3-9 randomly retrieves an ISAM

file. The DLBL job card has one difference: the entry for 'codes' contains ISE, used to
indicate any load extension, add, or retrieve. The program reads detail cards in
random sequence, with changes to the ISAM master file. The ISAM master is the one
loaded in the previous example. For each card, the program uses the account
number (key) to locate the correct ISAM record. The program then rewrites the
updated record on the ISAM file.
294 DIRECT ACCESS STORAGE

6 * I M I T I A L I Z A ION
7 PROG 1 3D START X« 3850* X*3800* ♦ X • 50* FOR LBLTYP NSD
e 6 ALR 3.0 INITIALIZE 9 A SE REGISTER
s USING 4.3
10 OPEN CARO.DISKIS ACTIVATE FILES

20 * MAIN PRCCE I N G
21 A10GET GET CARC.CARDIN READ INPUT RECORD
27 M VC KEYNO,ACCTIN SET UP KEY NUMBER
28 READ DISKIS.KEY READ ISAM RANDOMLY
33 TM DISKISC.B*11010101* ANY READ ERROR?
34 BO R10ERR YES - ERROR ROUTINE
35 WAITF DISKIS COMPLETE RE AO OPERATION
40 M VC ACCTOKO,ACCTIN MOVE CARO FIELDS TO CISK
41 MVC NAMEDKO.NAMEIN * WORK AREA
42 M VC ADORCKO.ACCRIN *
43 PACK BALNDKO.BALNIN
44 MVC DATEDKO.OATEIN *
45 WRITE OISKIS.KEV WRITE NEW ISAM RECORD
50 TM DISKI SC.BMIOCOOGC* ANY WRITE ERROR?
51 80 RIOEfiR YES - ERROR ROUTINE
52 e A10GET NO - CONTINUE

54 ♦ END-OF-FIt
55 PiCEND CLOSE CARC,DISKIS OE-ACTIVATE FILES
64 EOJ NORMAL END-OF-JOB

68 ♦ DASO ERROR O U T I N E S
69 R10ERR EQU • DASD ERROR
70 ♦ • RECOVERY ROUTINES
71 e PIOENO

FIGURE 13-9 Random retrieval of a DOS ISAM file.

ISAM MACROS FOR RANDOM RETRIEVAL. TEie new macros are

READ filename,KEY
WAITF filename
WRITE filename,KEY

READ. The READ macro causes ISAM to access the required record from the file.
Operand-1 contains the DTFIS filename, and operand-2 contains the word KEY
We must store our key in the field referenced by the DTFIS entry KEYARG In this
program KEYARG=KEYNO. For each card read, the program transfers the ac¬
count key number to KEYNO.
WAITF The WAITF macro allows a READ or WRITE operation to be completed
before another is attempted. In a random retrieval we are reading and rewriting
the.sa??fA^ords' a"d wer must ensure that the operation is finished. We may
READ/WRITE anywhere f°"°Win§ a READ/WRITE, and preceding the nex^

WRITE. The WRITE macro rewrites the ISAM record. Operand-1 is the DTFIS
i ename, and operand-2 is the word KEY. KEY refers to our entry in KEYARG.

THE DTFIS MACRO. DTFIS differences for random retrieval include:

295 Processing DOS Indexed Sequential Files

73 * DECLARAT IVES
74 CARO DTFCD DEVACDR=SYSIPT. CARD INPUT FILE DECLARATION «■
ICAREAl=IOARC0I1, ♦
10AR E A2=IOARCCI2. ♦
BLKSIZE=80. 4-
DEV ICE —25 01 . ♦
E0FADDR=PI0END. 4-
TYPEFLE=INPUT. 4-
WORKA=YES
1 15 IOARCDI1 DS CL 8 0 IOCS CARD BUFFER 1
1 16 10ARCOI2 DS CL 80 IOCS CARD BUFFER 2

1 18 CARDIN DS 0CL80 CARD INPUT AREA

1 19 C00E IN DS CL2 * CARD CODE *01•
120 ACC T IN DS CL6 * ACCOUNT NO.
1 2 1 NAME IN DS CL 20 ♦ NAME
122 AOCR IN OS CL 4 0 * ADORESS
123 BALNIN OS ZL6 • 0000.00* * BALANCE
124 DATE IN DS CL6 * DOMMYY• * DATE

126 0ISKIS OTF I S CYLOF L =1. ISAM RANDOM RETRIEVAL ♦

0EVICE=3340. 4-

DSKXTNT=2. 4-
IOAREAR=IOARISAM, 4*
I0R0UT=RETRVE, 4*

KEYARG=KEYNC. 4-

KEYLEN=6, 4-

NRECDS=1. 4-

RECF0RM=FIXUNB• 4-

REC SIZ E = 90. 4-

TYPEFLE=RAN0CM, 4-

VERIFY=YES. 4-

WQRKR—ISAMOUT

209 ICAR ISAM OS CL 106 KEY LEN t 10 t REC LENGTH

2 1 1 ISAMOUT DS 0CL96 ISAM WORKAREA

2 12 KE VN0 DS CL 6 KEY AREA
2 13 RECORD DS 0CL90 DATA AREA
214 ACCTDKO OS CL 6 * ACCOUNT NO.
215 NAME0KC DS CL 20 ♦ NAME
2 16 A0CRDK0 DS CL4 0 * ADDRESS
2 17 BALNDKO DS PL 4 * BALANCE
2 1 8 0 ATE D KG DS CL6 * OATE
2 19 DC CL 14* • * RESERVED FOR EXPANSION

22 1 END PROG13D

FIGURE 13-9 (Continued)

IOAREAR= IOARISAM gives the name, IOARISAM, to the ISAM retrieve I/O area.
Our symbolic name IOARISAM references the DS area for retrieving unblocked
records. The IOAREAR field length is: Key length (6) + "Sequence Link field"
(10) + Record length (90.)
TYPEFLE = RAN DOM means that we are to retrieve records randomly, by key. Other
entries are SEQNTL for sequential processing, and RANSEQ for both random
and sequential.
WORKR=ISAMOUT is the name of our retrieval work area.

STATUS CONDITION. The status condition byte for Add and Retrieve is different
from Load. The following is a list of the bits:
 296 DIRECT ACCESS STORAGE

BIT ADD AND RETRIEVE CONDITION

0 Any uncorrectable DASD error except wrong length record.

1 Wrong length record detected during an I/O operation.
2 End-of-file during sequential retrieval (not an error!).
3 The record to be retrieved is not in the data file.
4 The ID specified to the SETL in SEQNTL is outside the prime data limits.
5 An attempt to add a record to the file for which the key already exists.
6 The cylinder overflow area is full.
A retrieval function is trying to process an overflow record.

Figure 1 3-9 tests for various conditions after the ISAM macros. Once again, the
program would normally isolate the error, print a message, and perhaps terminate the
job.

SEQUENTIAL READING OF AN ISAM FILE. Sequential reading of a DOS ISAM file

involves use of the macros SETL, GET, and ESETL. SETL (Set Low) establishes the
starting point for the first record to be processed. SETL options include:

SETL filename,BOF Set start at 1st record of the file.

SETL filename,KEY Set start at the record with the key in the field defined by
the DTFIS KEYARG entry.
SETL filename,GKEY Set start at 1st record within a required group. The
KEYARG field could contain, for example, "A340000"
to indicate all records with keys beginning with A34.

The ESETL macro terminates sequential mode, and is coded as ESETL,filename

DTFIS entries include:

IOROUT= RETRVE
TYPEFLE=SEQNTL or RANSEQ
KEYLOC=n (to indicate the 1 st byte of the key in the record, if process¬
ing begins with a specified key or group of keys, and rec¬
ords are blocked)

PROCESSING OS INDEXED SEQUENTIAL FILES

Processing ISAM files under OS is similar to, but not identical to, DOS processing

OS ) Unri Y'o fl/am1"8 for„VS?M haS 1X60 designed ,0 be compatible with

°on ams X FP ISAM Tf5 * C°de,he firsl bVte °f the record
contains X FF ISAM will automatically delete the record where required The fol¬
lowing provides some features of OS ISAM processing.
297 Processing OS Indexed Sequential Files

LOAD AN ISAM FILE UNDER OS. The OS imperative macros concerned with
creating an indexed sequential file are the conventional OPEN, PUT, and CLOSE.
DCB entries are:

DDNAME = name of the data set

DSORG = IS for indexed sequential
MACRF = (PM) or (PL)
BLKSIZE = length of each block
CYLOFL = number of overflow tracks per cylinder
KEYLEN = length of the key area
LRECL = length of each record
NTM = number of tracks for master index, if any
OPTCD = options required. For example, MYLRU:
M establishes a master index (or omit M)
Y & R control useof cylinder overflow and independent areas
L is delete code to cause bypassing records with X'FF' in first byte
U (for fixed length only) establishes track index in main storage
RECFM = record format for fixed/variable and unblocked/blocked:
F, FB, V, VB

SEQUENTIAL RETRIEVAL AND UPDATE. Under OS, sequential retrieval and up¬
date involves the OPEN, SETL, GET, PUTX, ESETL, and CLOSE macros. Once the
data set has been created with standard labels, many DCB entries are no longer
required. DDNAME and DSORG = IS are still used, and the following are applicable:

MACRF=(entry) (GM) or (GL) for input only. (PM) or (PL) for output only.
(GM,SK,PU) if read and rewrite in place: S — useof SETL, K
= Key or Key class used, PU = use of PUTX macro.
EODAD=eofaddress For input, if reading to end-of-file.
SYNAD = address Optional error checking.

THE SETL MACRO. SETL (Set Low address) establishes the first sequential record to
be processed, used because the programmer may want to start anywhere in the data
set.

SETL dcb-name,start-position,address

The "start-position'' operand has a number of options:

B = Begin with first record in the data set. (Omit operand-3 for B or BD.)
K = Begin with the record with the key in the operand-3 address.
KC = Begin with the 1 st record of the "Key class" in operand-3. If the first record is
"deleted," begin with the next nondeleted record. A Key class is any group of
keys beginning with a common value, such as all keys 287XXXX.
| = Begin with the record at the actual device address in operand-3.
 298 DIRECT ACCESS STORAGE

BD, KD, KDH, KCD, and ID cause retrieval of only the data portion of the record.
Following are some examples of SETL to set the first record in an ISAM file
called DISKIS, using a 6-character key:

SETL DISKIS,B Begin with the 1st record of the

data set
SETL DISKIS,K.KEYADD1 Begin with key 012644 in data set
SETL DISKIS,KC,KEYADD2 Begin with 1st record that begins
with key 012
KEYADD1 DC C’012644’ 6-character key
KEYADD2 DC C’012’,XL3’00’ 3-character key followed by 3
bytes of hex zeros

The ESETL macro, used as ESETL dcb-name, terminates sequential retrieval. If there is
more than one SETL, ESETL must precede each additional one.
In Figure 1 3-10, the program sequentially reads an ISAM file. The objective is to
insert a delete code (X'FF'j in any record that is more than five years old. The
standard date from the TIME macro is packed 00yyddd + , and the date in the records
in positions 26-28 is in the same format. The PUTX macro rewrites any such old
record, with the delete byte.
There are many other features and macros associated with OS. Check espe¬
cially the IBM OS Data Management Services Guide and Data Management Macro
Instructions manuals.

PROG13 START
SAVE <14.12)
EALR 3.0
USING *.3
ST 13 .SAVEAREA+4
LA 13.SAVE AREA
OPEN (ISFILE)
SETL ISFILE,B START 1ST RECORD OF DATA SET
TIME
ST 1.TODAY
SP TODAY, = P•5000 • C ACC DATE 3 TEARS AGO

A1O0ET GET ISF ILE

CP 26(3.1).TODAY 5 TEARS OR OLDER?
BNL A10GET
* NO BYPASS
MVI 0<l>,X»FF*
* TES - SET OELETE CODE
PUTX ISFILE
* RE-WRITE RECORD
8 A10GET

A90END ESETL ISFILE

CLOSE (ISFILE)
L 13.SAVEAREA+4
RETURN <14.12)

SAVEAREA CS 18F
TOCAT DS F
T OD AT•s date: OOYYDDD*
I 0ARE A CS CL 100
DISK 10 AREA
ISFILE OC0 CDNAME=INDEXDD.DSOR G=I S.EO0AD=A90EN0.NACRF=<GL.S.PU)
END PR0G13

FIGURE 13-10 Sequential retrieval of an OS ISAM file.

299 Problems

PROBLEMS

13-1. What is the advantage of DASDs compared with magnetic tape?

13-2. Based on Figure 1 3-3, how many bytes can be stored in a cylinder for each
device listed?
13-3. Why does a DASD store data by cylinder rather than by tracks across a
surface?
13-4. What is the purpose of (a) Home Address? (b) Track Descriptor Record? (c)
Key Area?
13-5. Distinguish the differences amongst Sequential, Direct, and Indexed Sequen¬
tial processing.
13-6. Revise the file definition macro entries and I/O areas in Figure 1 3-4 or 13-5
for the following. Input: 6 records per block, each 90 bytes long. Output: 3
records per block, to be run on a 3330 as SYS017. Assemble and test.
13-7. What is the purpose, location and contents of the VTOC?
13-8. What is the DASD equivalent to the magnetic tape header label—what is its
location and how does it differ?
13-9. Revise the job control for Figure 1 3-4 or 1 3-5 for the following: filename =
DISKOUT, file-ID = ACCTS RECEIVABLE, retain for 30 days, run on SYS01 7,
serial no. 1 23456, using a 2311 on cylinder-1 5 track-0 for 15 tracks.
13-10. For ISAM, what is the purpose of (a) Master index? (b) Cylinder index? (c)
Track index?
13-11. What are the different ways to process an ISAM file? What is the difference
between extending and adding records?
13-12. Revise Figure 13-7 for the input as revised in Problem 13-6, and for new
ISAM output: 3 records per block and both a cylinder and independent
overflow area. You will have to review the Supervisor manual for this. As¬
semble and test.
13-13. Revise, assemble, and test Figure 1 3-8 according to the changes in the previ¬
ous problem.
 PART V

ADVANCED TOPICS
 CHAPTER 14

MACRO WRITING

The Greek word makros means ''long.” In programming, macro means a "long”
instruction, one that causes the generation of several or many instructions. For each
macro, the Assembler generates one or more instructions. We generally suppress the
generated code, but in this chapter print it by means of PRINT GEN. There are two
sources of macros:

1. Manufacturer-supplied Macros. IBM macros facilitate the complex Supervisor

and input/output operations, and include OPEN, GET, EOF, DTF's, and DCB's.
These macros simplify much difficult but repetitious coding. They are catalogued
in the system library for assembling with source programs.
2. User-defined Macros. We may code as our own macro any routine commonly
used in a program or in other programs. We may then include it with the program
source deck at assembly-time or assemble and catalogue it in the system library.
Common examples include multiply, divide, program and base register initializa¬
tion, and table look-up.

MACROS AND SUBROUTINES. Subroutines covered earlier have a significantly

different use from macros. In a subroutine, the program branches out of the main
logic into a separately coded routine. This routine is performed identically each time

303
 304 MACRO WRITING

it is executed. A macro, however, generates Assembler instructions wherever it is

coded. Depending on how the macro is coded, the generated instructions each time
may be identical or different.
We must assess which technique is more efficient for any given situation.
Subroutines are more easily coded and use less storage. Macros, however, are more
versatile. High-level languages such as COBOL and PL/I use both subroutines and
macros in converting the Assembler language.

WRITING MACROS

There are three basic types of macros:

1. Positional Macros. For these, we code the entries or parameters in a predeter¬

mined sequence. An example is PUT PRTR,PRINT. Depending on the way the
macro has been defined, in some cases a parameter may be omitted, as PUT
PRTR. Figure 14-1 illustrates a positional macro.
2. Keyword Macros. For these we code the entries in any sequence. The Assembler
recognizes the presence of the parameter, followed by an equal sign (=)• A
familiar example is:

CARD DTFCD TYPEFLE= INPUT, +

WORKA=YES, + etc...

TYPEFLE and WORKA may be in any sequence, and are recognized as keywords
by the Assembler. In some cases we may omit keywords; the Assembler then
assumes default values. Figure 14-3 depicts a keyword macro.
3. Mixed. A macro definition may combine both positional and keyword. Positional
entries are specified first, in sequence. Figure 14-9 illustrates mixed types.

Certain rules govern writing and assembling macros. Figure 14-1 is a simple packed
divide positional macro, and shows the basic terminology for a macro definition:
®©© ®

symbolic parameters
Header 3 MACRO
Prototype 4 DIVIO 4QU0T.4DIVDEN0.4DIVISO
Model 5 ZAP 4QU0T.4DIVDEND MOVE DIVIDEND TO OUOT
Statements 6 DP 4QU0T,ADI VISOR
divide by divisor
Traj ler 7 MEND

FIGURE 14-1 Definition of positional divide macro DIVID.

The first statement of the macro definition is the header statement, containing the
operation MACRO. This instruction tells the Assembler that a macro is being
defined next. 8
The prototype statement informs the Assembler the name of the macro (in this
example DIVID), and how the macro-instruction will be coded. The operand
305 Writing Macros

contains three symbolic parameters (a name preceded by an ampersand &) for

quotient, dividend, and divisor.
(c) The model statements are instructions that the Assembler uses to generate As¬
sembler instructions. (There may also be comments and Conditional Assembly
instructions, covered later.)
(d) The trailer statement, MEND, terminates the macro definition.

In the partial program in Figure 14-2, DIVID is the macro-instruction coded

once for execution. DIVID was the only instruction coded; the ZAP and DP instruc¬
tions are generated code or the macro expansion. The Assembler inserts a plus sign
(+) beside the statement number in all the instructions that it generates. The Assem¬
bler generated these instructions based on (1) the macro definition, and (2) the
operands coded in the macro-instruction.

14 DIVIO MILEAGE.MILES.GALS MACRO—INS TRUC TI ON

1 5+ ZAP MILEAGE,MILES MOVE DIVIDEND TO QUOT
16 + DP MILEAGE,GALS DIVIDE BY DIVISOR
17 * •

10 * •

19 MILEAGE DS PL6 QUOTIENT - MILES/GAL

20 MILES DS PL3 DIVIDEND - MILES
21 GALS DS PL 3 DIVISOR - GALLONS

FIGURE 14-2 Use of DIVID macro-instruction.

There are three entries in the macro-instruction operand, MILEAGE, MILES, and
GALS, for each of the three parameters in the prototype, &QUOT, &DIVDEND, and
&DIVISOR. For a positional macro, the macro-instruction operands correspond
exactly with the prototype. The Assembler replaces each parameter in the macro
definition:

MACRO-INSTRUCTION MACRO DEFINITION

MILEAGE replaces &QUOT
MILES &DIVDEND
GALS &DIVISOR

MILEAGE, MILES, and GALS are defined in the source program. The Assembler
uses their addresses and lengths when producing the generated code (see the ZAP
and DP instructions generated).
We insert macro definitions before the main source program. Only comments
and Assembler control instructions EJECT, PRINT, SPACE, TITLE, ICTL, and ISEQ may
precede the header. We may define more than one macro, one after another, but we
may not define a macro within another macro. Also, a macro may be separately
assembled and catalogued for use in other programs.
Within the program we may use the macro-instruction any number of times,
using either the same labels or labels of any other valid fields. However, there is no
306 MACRO WRITING

automatic checking for validity. For example, if the macro-instruction is wrongly

coded with character instead of packed operands, the Assembler generates character
operands. To check for validity, we use Conditional Assembly instructions, covered
later.

VARIABLE SYMBOLS. In a macro definition, a variable symbol begins with an

ampersand (&) followed by 1 to 7 letters or digits, the first of which must be a letter.
Examples are &NAME and &DIVISOR. There are three types of variable symbols.

1. Symbolic Parameters. We may use these in the macro definition name field and
operand. In the prototype DIVID, one symbolic parameter is &QUOT. In the
macro-instruction we coded a value MILEAGE that the Assembler assigned to the
symbolic parameter &QUOT.
2. System Variable Symbols. The Assembler automatically assigns values to these
special symbols. There are three: &SYSECT, &SYSLIST, and &SYSNDX, covered
later.
3. Set Symbols. These permit us to define temporary storage and work areas to be
used within the macro definition. They are defined and processed by Conditional
Assembly instructions, covered later.

EXPLANATION OF THE MACRO DEFINITION. The general format for macro def¬
inition is as follows:

NAME OPERATION OPERAND

Header: blank MACRO blank
Prototype: Symbolic parameter symbol Symbolic parameter(s)
or blank
Model Ordinary, sequence Instruction Ordinary or
Statements: or variable or variable variable
symbol, or blank symbol symbols
Trailer: Sequence symbol MEND blank
or blank

HEADER. The MACRO header statement is blank in the name or operand fields It
tells the Assembler that a macro is to be defined.

PROTOTYPE. The name field may be blank, as in Figure 14-1, or it may contain a
symbolic parameter (a name preceded by an ampersand [&] as explained earlier)
The operation is a unique symbolic name, such as DIVID, that is not the name of
another macro or Assembler instruction. The operand may contain zero to 100
symbolic parameters separated by commas. OS permits up to 200 parameters.
307 Writing Macros

MODEL STATEMENTS. These statements define the Assembler statements that are
to be generated. There may be none or many model statements. We indicate con¬
tinuation in column 72 with any character. The name field may be blank (as in Figure
14-1), or it may contain an ordinary symbol, a variable symbol, or a sequence
symbol (a name preceded by a period, explained later). The operation may contain
an Assembler instruction, a macro-instruction or a variable symbol. The operand
may contain ordinary symbols (such as AMTPK) or variable symbols (such as
&QUOT).

TRAILER. MEND is a required entry to terminate the macro-definition. The name

may be blank or may contain a sequence symbol (a name preceded by a period).

COMMENTS. Comments may begin anywhere after a blank following the operand.
In Figure 14-1, model statement comments begin in column 41. Also, an entire line
may be coded as a comment. We may include comment lines anywhere in the
macro definition following the prototype statement. There are two ways: (1) An
asterisk (*) in column 1 causes the Assembler to print the comment along with the
generated code (see Figure 14-5 and 14-6); (2) A period in column 1 followed by an
asterisk (.*) tells the Assembler not to print the comment with the generated code (see
Figures 14-5 and 14-6).

KEYWORD MACROS. Keyword macros have two advantages over positional mac¬
ros: (1) We may code keyword parameters in any sequence; (2) the symbolic param¬
eters in the prototype statement may contain standard values allowing us to omit the
parameter when using the macro-instruction. Other than the prototype statement,
keyword macros are defined the same as positional macros. The parameters of the
keyword prototype are immediately followed by an equal sign (=) and an optional
standard value.
The macro in Figure 14-3 is similar to the one in Figure 14-1. The prototype is
keyword, and is coded as DIVID &QUOT=QUOTIENT,&DIVDEND=,&DIVISOR=.
Figure 14-4 uses the macro twice, depicting two ways to code keyword macros.
The first operand, &QUOT=, is followed by a standard value, QUOTIENT. When
using the macro-instruction, we may omit the parameter &QUOT. In this case, the
Assembler assumes that the name to be used by &QUOT is always QUOTIENT (see
B1ODIV in Figure 14-4). Alternatively, we may override the standard value by coding
a different label, such as QUOT=SPEED (see B20DIV in Figure 14-4).

1 MACRO
2 DIVIO 4QU0T = aU0TIENT,4DIVDEND=.40 I VISOR=
3 ZAP 4QUOT,40 IVDEND MOVE DIVIDEND TO QUOT
4 DP 4QUOT.4DIVISOR DIVIDE BY DIVISOR
5 MEND

FIGURE 14-3 Definition of keyword divide macro DIVID.

 308 MACRO WRITING

The other prototype parameters, &DIVDEND and &DIVISOR have no standard

values. We must code the name to be used in the macro-instruction as Dl VDEND=DIST,
etc. (See Figure 14-4. Note that in B20DIV the operands are not coded in sequence.)
Except for operands that have standard values, keyword macros require-coding
the keyword each time they are used. Unless there are a number of standard values, a
keyword macro-instruction could cause more coding for the programmer.

12 B10DIV DIVIO DIVOENO=DIST.DI V ISOR = TlME

13 + ZAP QUOTIENT.DIST MOVE DIVIDEND TO QUOT
14 + DP QUOTIENT.TIME DIVIDE BY DIVISOR

16 02ODIV DIVIO 01V ISQR-=TI ME.CIV 0END = DI ST .QUOT=SPEED

1 7+ ZAP SPEED,DIST MOVE DIVIDEND TO QUOT
10 + DP SPEED,TIME DIVIDE BY DIVISOR
19 *
20 ♦
21 QUOTIENT DS PL 7 QUOTIENT
22 DIST DS PL4 DIVIDEND - DISTANCE
23 TIME DS PL 3 DIVISOR - TIME
24 SPEED DS PL7 QUOTIENT - SP EE D

FIGURE 14-4 Use of keyword DIVID macro-instruction.

CONCATENATION. Concatenation means linking together, as a chain. In model

statements it is possible to concatenate a symbolic parameter with another symbolic
parameter or with characters.

1. Concatenate Symbolic Parameters. Figure 14-5 codes a load operation that varies
according to the type of data to be loaded. We code L concatenated with a
symbolic parameter, called here &TYPE, as L&TYPE. If &TYPE contains blank H
E, or D, the Assembler generates L, LH, LE, or LD.
2. Concatenate Characters. If a symbolic parameter is concatenated with digits,
letters, left bracket, or a period, there must be a period joining the two fields'
Assume a symbolic parameter &AREA. If it references a label called FIELD, then
&AREA A results in generated code FIELDA. Figure 14-5 illustrates concatenation
with a bracket &PR!N.(&LEN) to permit different length codes.

The macro in Figure 14-5 multiplies both binary fullword or halfword fields and
illustrates symbolic parameters, comments and concatenation. The prototype, MPY,

1 macro
2 AL ABEL 1
3 •♦ MPY 4REG1.4REG2, A MUL TC A N . 4MUL T PL R , 4TYP.&LEN,APR IN
LOAD REGISTERS WITH MULTIPLICAND 4 MULTIPLIER
4 4LABEL1
L4TYP AREG2,4 MULTC AN LOAD MULTIPLICAND
5
L4TYP 4REG1» 4MULTPLR LOAO MULTIPLIER
6
MULTIPLY two registers
7
MR 4REG1.4REG1 MULTIPLY REGISTERS
8
CONVERT PRODUCT TO DECIMAL
9
CVO 4REG2.D8LEW0RD STORE PRODUCT
10
1 1 MEND 4PRIN*(4LEN'*DBUE"0RD UNPACK IN PRINT AREA

FIGURE 14-5 Definition of multiply macro MPY with concatenation.

309 Writing Macros

contains a symbolic parameter &LABEL1 in the name field. When using MPY as a
macro-instruction we may code a label such as M10MULT, which the Assembler
includes in the generated code. The symbolic parameters in the prototype operand
are:

&REG1 the even-numbered register of an even-odd pair,

&REG2 the odd-numbered register,
&MULTCAN the multiplicand field, full or halfword,
&MULTPLR the multiplier field, full or halfword.
&TYP the type of operation—blank for fullword and H for halfword,
&LEN the length in the print area where the product is unpacked,
&PRIN the name of the print area.

The first model statement contains the same symbolic parameter &LABEL1 as
the prototype, because the Assembler is to generate this label for this statement. The
operation loads the full or halfword multiplicand into the odd register. The second
model statement loads the full or halfword multiplier into the even register. The third
model statement multiplies the contents of the two registers. (Operand-! of MR is the
even register of an even-odd pair.)
The fourth statement converts the product in the odd register to decimal format
in DBLEWORD, defined in the main source program. Finally, the decimal product is
unpacked in the print area. Note the concatenation to append the length code in
operand-1.
The program in Figure 14-6 tests the macro-instruction twice. M10MULT des¬
ignates H in the &TYP position. Note that LH is generated for L&TYP. M20MULT

19 MI0 MULT MPY 8.9.FI ELOHl.FIELDH2.H.6.PRINT+10

20+M10MULT LH 9.FIELDHI LOAD MULT IPL ICAND
2 1+ LH 8, FIELOH2 LO AO MULT IPL IER
22 + * MULTIPLY TWO REGISTERS
23 + MR 8.8 MULTIPLY REGISTERS
24 + CVD 9. DBLEWORD STORE PRODUCT
25 + UNPK PR I NT + 10(6).DBLEWORD UNPACK IN PRINT AREA

27 M20MULT MPY 0.1.FIELDFl .FIELOF2 * .10.PRINT+25

28+M20MULT L 1 , FI EL OF 1 LOAD MULTIPLICA ND
29 + L 0.FIELDF2 LOAD MULT I PL IER

30+♦ MULTIPLY TWO REGISTERS

MR 0.0 MULTIPLY REGISTERS
31 +
CVD 1 .DBLEWORD STORE PRODUCT
32 +
UNPK PR I NT+ 25(10/.CBLEWORD UNPACK IN PRINT AREA
33 +
34 * •
35 * •
36 DBLEWORD DS D DOUBLEWORD PRODUCT
37 FIELDH1 DS H HALFWORD MULTIPLICAND

DS H HALFWORD MULTIPLIER
38 FIELDH2
F FULLWORD MULTIPLICAND
39 FIELDF1 DS
DS F FULLWORD MULTIPLIER
40 FIELOF2
DC CL 12 1 * PRINT AREA
41 PRINT

FIGURE 14-6 Use of MPY macro-instruction.

U
310 MACRO WRITING

omits the &TYP position by means of two commas. The instruction L is generated for
L&TYP.
This example is still relatively simple. The Conditional Assembly instructions in
the next section test for validity and permit more variations.

Problems 14-1, 14-2, and 14-3 should now be attempted.

CONDITIONAL ASSEMBLY INSTRUCTIONS

Conditional Assembly instructions permit us to test such attributes as data format,

value, field length, and to define fields and change values. They do not generate any
code in themselves; rather, they help determine which Assembler instructions are
generated. There are two main groups:

1. Branching and Testing. AGO, ANOP, AIF, and ACTR permit testing attributes and
branching to different locations within the macro definition.
2. Defining Symbols (SET Symbols) and Varying Their Values. Local set symbols,
LCLA, LCLB, and LCLC, provide defining within a macro expansion. Global set
symbols, GBLA, GBLB, and GBLC, enable symbols to be known in other macro
expansions. The values in the SET symbols are modified by SETA, SETB, and SETC
instructions.

ATTRIBUTES. For each Assembler constant or instruction, the Assembler assigns

attributes such as field length and packed format. We may reference these attributes
by Conditional Assembly instructions. There are six kinds of attributes:

ATTRIBUTE NOTATION
L’ Length Length of symbolic parameter.
r Integer Integer attribute of fixed-point, float, ordecimal number.
S’ Scaling Scale attribute of fixed-point, float, or decimal number.
K’ Count Number of characters in a macro instruction operand.
N’ Number Number of operands coded in the macro-instruction.
T Type Type of DC or DS, such as P, C, X, F, etc.

LENGTH. Only AIF, SETA, and SETB statements may reference the length of a
variable symbol. For example &X SETA L'&Y means store the length of &Y in the field
defined by the SET symbol &X.

INTEGER AND SCALING. The macro may check the defined integer and scaling
attnbutes of fixed-point (binary), floating-point, and decimal numbers with AIF
SETA, and SETB. In the statement AMT DC P'1234.56' the integer attribute is 4 (4
digits left of the decimal point), and the scale is 2 (2 digits right of the decimal point)
Integer and scaling are not further covered.
311 Conditional Assembly Instructions

COUNT AND NUMBER. The count attribute refers to the number of characters in a
macro-instruction operand. The number attribute refers to the number of operands in
a macro-instruction. They may be referenced with AIF, SETA, and SETB. For exam¬
ple: DIVID MPG,MILES,GALS. The count attribute of GALS, having four characters,
is four. The number attribute of the macro, having three operands, is three. Count and
number are not further covered.

TYPE. The type attribute refers to the type of DC, DS, or instruction. Among the
types are:

A A-type address F Fullword P Packed

B Binary H Halfword V V-type address
C Character I Machine instruction X Hexadecimal
D Long float L Extended float Y Y-type address
E Short float O Omitted operand Z Zoned

The type may be referenced by AIF, SETC, and SETB. The next section under AIF and
Figure 14-7 give examples.

1 MACRO
2 4LABEL2 DIVID 4QUDT,4DIVDENC,4DlVISOR
3 .* TEST IF DIVIDEND 4 0IVIS0R BOTH DEFINED PACKED
4 AIF (T * 4 CIV DEND NE T•4DI V ISOR).NOTPAK
5 AIF < T•4DIVDEND NE *P').NOTPAK
TEST IF QUOTIENT LENGTH ADEQUATE
>1 O'

*
AIF (L*4C I VDEND-H. •4CIVIS0R GT L•4QUOT).WRONLN
8 AGO .D-IVE VALID PACKED FIELDS
9 .notpak MNOTE 'PARAMETER NOT DEFINED AS PACKED*
10 MEXI T
1 1 •WRONLN MNOTE 'LENGTH OF DIVIDEND + DIVISOR GREATER THAN QUOTIENT'
12 MEXIT
13 .* PERFORM DIVISION
14 • DIVE ANOP
15 4LABEL2 ZAP 4QU0T.4DIVDENC MOVE DIVIDEND TO QUOTIENT
16 DP 4QU0T,4DIVISOR DIVIDE BY DIVISOR
17 MEND

FIGURE 14-7 Definition of divide macro DIVID with validity tests.

BRANCHING & TESTING—AGO, AIF. These instructions make use of sequence

symbols. A sequence symbol begins with a period (.) followed by one to seven letters
or digits, the first of which is a letter. Examples are .B25, .AROUND, and .P. Since a
name field of a model statement may contain a sequence symbol, it is possible to
branch to different statements. Branching is done by the following:

NAME OPERATION OPERAND

Sequence symbol
or blank AGO Sequence symbol
Sequence symbol (logical expression) sequence symbol
or blank AIF
312 MACRO WRITING

AGO—UNCONDITIONAL BRANCH. AGO branches unconditionally to a state¬

ment with a sequence symbol for its name, as:

AGO .B25

.B25 MVC P+25(8),DATE

AIF—CONDITIONAL BRANCH. AIF means "ask if". The operand consists of two
parts: (1) A logical expression in brackets; and (2) Immediately following, a sequence
symbol. The AIF logical expression may use relational operators:

EQ equal NE not equal

LT less than LE less than or equal
GT greater than GE greater than or equal

The following are five AIF examples:

1. AIF (T’&AMT EQ P’).B25PAK (If the type of &AMT equals packed, then branch
to .B25PAK.)
2. AIF (L’&AMT GT 16).E35ERR (If the length of &AMT is greater than 16 then
branch to .E35ERR.)
3. AIF (T &LINK NE I ).R45ERR (If the type of &LINK does not equal an instruction
branch to .R45ERR.)
This testing occurs when the Assembler converts the macro to generated
code. The first example tests if &AMT is defined as packed, not what the field
actually contains. (This macro may be catalogued for use by other programmers.)
The Assembler cannot test the contents of a field at execution-time.
Logical operators AND, OR, and NOT combine terms in a logical expres¬
sion:
4. AIF ( &TAB EQ AND T’&ARG EQ 0’).R65 (If contents of &TAB are blank and
&ARG is omitted, branch to .R65. The latter is a way of checking if a macro¬
instruction operand is omitted—intentionally or accidentally.)
Finally, arithmetic operators, +(add), -(subtract), ^(multiply), and /(divide)
may combine terms of an expression:
5. AIF (L PROD GE (L &MULTCD+L &MPR+1)).VALID (If the length of product is
greater than or equal to the length of &MULTCD plus &MPR plus 1 branch
SDVAUD' ThlS teSt enSUr6S that the defined Product area is large enough for an
MP operation.) 6

Examine the AGO and AIF instructions in Figure 14-7. This example is similar
to Figure 14-1 with the additional checks that the dividend and divisor are defined as
packed, and that the quotient area is at least as large as the dividend plus divisor.
Figure 14-8 tests the macro. D10DIV shows valid operands that generate the correct
instructions. D20DIV and D30DIV illustrate invalid operands that generate error
313 Other Instructions

24 D1GDIV DIVIO MILEAGE.MILES,GALS VAL ID DIVISION

25+D1CDIV ZAP MILEAGE.MILES MOVE DIVIDEND TU QUOTIENT
26 + DP MILEAGE.GALS DIVIDE BY DIVISOR

28 02 001V DIVIO MILEAGE.MILES.PRINT INVALID DIVISION

29+PARAMETER NOT OEFINED AS PACKED

21 D30DIV DIVIO MILES.MILEAGE,GALS INVALID DIVISION

32+LENGTH OF DIVIDEND ♦ DIVISOR GREATER THAN QUOTIENT
33 *
34 ♦
35 MILES DS PL 3 DIVIDEND - MILES
36 GALS DS PL 3 DIVISOR - GALLONS
37 MILEAGE DS PL6 QUOTIENT - MILES PER GAL

FIGURE 14-8 Use of DIVID macro-instruction.

OTHER INSTRUCTIONS

There are as well three instructions not yet covered: ANOP, MNOTE, and MEXIT.

ANOP—NO OPERATION. ANOP is a convenience instruction. AGO and AIF re¬

quire a sequence symbol as a branch operand. But AGO or AIF may require branch¬
ing to an instruction whose name is an ordinary or variable symbol. If so, then AGO
and AIF must branch to an ANOP immediately before the statement.

NAME OPERATION OPERAND

A Sequence Symbol ANOP blank

Figure 14-7 illustrates the use of ANOP, where AGO has to branch to
&LABEL2. Since AGO cannot branch to a variable symbol, it goes to .MULT contain¬
ing the ANOP operation, and immediately preceding &LABEL2.

MNOTE AND MEXIT. We use these operations to print error messages and to exit
from the macro.

NAME OPERATION OPERAND

Sequence symbol,
variable symbol,
or blank MNOTE any message, within apostrophes
Sequence symbol
or blank MEXIT blank

MNOTE—MACRO ERROR MESSAGE. MNOTE is used to print programmer macro

messages at assembly-time. The message is enclosed in apostrophes. In order to print
an ampersand or an apostrophe as part of the message, we must code two adjacent
ampersands or apostrophes. For example: MNOTE 'CAIN && ABEL”S'. Two MNOTE
314 MACRO WRITING

messages in Figure 14-7 warn that the dividend or divisor are not packed format and
that the quotient length is too short. In Figure 14-8 when the error condition occurs,
the Assembler statements are not generated. Before program execution, we should
first check for and correct any assembly errors.

MEXIT—MACRO DEFINITION EXIT. MEXIT provides a convenient way to termi¬

nate processing of a macro. It acts like MEND, although MEND must be the last
statement of the macro definition. Figure 14-7 shows exit and termination of the
macro. The MEXIT could have been alternatively coded as:

MNOTE ’message’
AGO .FINISH (or any sequence symbol)

.FINISH MEND

Problem 14-4 should now be attempted.

SET SYMBOLS

SET symbols are variable symbols that define and assign values. We may then use
them to test values and to build instructions. SET symbols are assigned values when
we code SETA, SETB, or SETC Conditional Assembly instructions. They must first
have been defined by an LCL or GBL instruction. Local or global instructions may
define and assign an initial value. GBL's, and then LCL's, must be coded in the macro
definition immediately following the prototype statement.

NAME OPERATION OPERAND

LCLA One or more variable (SET)
blank LCLB symbols, separated by commas
LCLC

, TCT ,USed deflne a SETA symbol. It creates a 32-bit field initialized with
zero. LCLB defines a SETB symbol that creates a 1 -bit field initial,zed with zero LCLC

Sh defined. ^ Cr6ateS 3 Character value"—that is, a field with no

GBLA GBLB, and GBLC similarly define SET symbols, for values that are to he
known in other macro expansions in the same assembly. They are briefly discuss^

SETA
i A, ^ETBtnd'snTTh61'' defi"e values
bE I B, and SETC, then assign ^ ini‘ialiZe SET 5ymbok The SET operations
to SET symbols.
315 Set Symbols

SETA—SET ARITHMETIC. SETA assigns an arithmetic value to a SETA symbol.

NAME OPERATION OPERAND

A SETA symbol SETA an arithmetic expression

The maximum and minimum values of the expression are + 231 —1 and -231.
An expression consists of a term or an arithmetic combination of terms. Valid terms
are:

— Self-defining terms. Such a term has an inherent value, one that is not assigned a
value by the Assembler. These may be decimal (as 11), hexadecimal (as X'B'),
and binary (as B'l011 ')•
— Variable symbols, such as &AMT.
— Attributes for count, integer, length, number, and scale. Examples of SETA arith¬
metic are:

LCLA &FLD1.&FLD2
&FLD1 SETA 15
&FLD2 SETA &FLD1 +L&AMT+25

LCLA defines &FLD1 and &FLD2 as SETA symbols.

&FLD1: the value 1 5 (a self-defining term) is assigned to &FLD1.
&FLD2: the expression contains an arithmetic combination of terms. Assume
that &AMT is defined elsewhere with a length of 6. The Assembler
calculates the expression as:

TERM VALUE

&FLD1 (variable symbol) 15

L’&AMT (length attribute) 6
25 (self-definingterm) 25
Value assigned to &FLD2 46

The maximum number of terms in the expression is 16. Also, brackets may contain
terms in the expression, such as (&COUNT — X'l B')*3.
Figure 14-9 illustrates LCLA and SETA. In this mixed-type macro, the first two
parameters are positional whereas the third and fourth are keyword. This macro
prints a heading line containing a heading title, page number, and the date. The
macro centers the heading title on the page.

PARAMETER SPECIFIES LENGTH IN BYTES

&HEAD Heading Up to 90 characters

&PAGE Page number 2 Packed bytes
&DAT Date Not defined
&PRT Print area 121
316 MACRO WRITING

3 MACRO
4 4NAME HEONG AHEAC.APACE.AC AT=0ATE.APRT = PRI NT
5 LOLA ALEN.AMID LENGTH A MIO-POINT
6 LCLC ALIT•AL1.AL2 AREA FOR CHARS.
7 TEST VALIOITV OF PARAMETERS
a A IF IT•APAGE NE *P*1.ERRPACK
9 AIF ( T • AHE AO NE 'CM.ERRCHAR
10 A IF I L •AHEAO GT 901.ERRSIZE HEADING > 90 CHARS?
11 .« SET VALUES
12 4LEN SETA L # AHEAC LENGTH OF HEAC1NG
13 AMID SETA I 120 —ALENl/2 CENTER HEADING
14 AL IT SETC * = C•*PACE*•• LITERAL FOR •PAGE’
15 AL 1 SETC •L••• LENGTH CODE
16 AL2 SETC •A CAT• DATE
17 .4
18 ANAME UNPK APRT + 1 15(31 .APAGE UNPK PAGE CTR.
19 0 I APRT♦117,X*F0• CLEAR UNITS ZONE
20 M VC APRT 4110(4 ) . AL IT MOVE PACE LITERAL
2 I MVC APRT+AM10.(ALEN).AHEAD MOVE HEADING
22 M VC APRT 41(AL1AL2).ADAT MOVE OATE
23 MEXI T
24 ERROR MESSAGES
25 .ERRPACK MNOTE •PAGE COUNT NOT DEFINED AS PACKED*
26 MEXI T
27 .ERRCHAR MNOTE •HEACING NOT DEFINED AS CHARACTER*
28 MEX IT
29 •ERRSIZE MNOTE •LENGTH OF HEACING EXCEECS PRINT AREA*
30 MEND

FIGURE 14-9 Definition of heading macro HEDNG with conditional assem¬

bly instructions.

&LEN and &MID define two SETA symbols. AIF checks that the length of
heading does not exceed 90 bytes. (Assume 120 print positions with space for date
and page.) SETA assigns the length of &HEAD to &LEN. The title is centered by
calculating the first print position of &HEAD. For example:

L'&HEAD EXPRESSION 1ST POSITION

23 (120 —23)/2 = 97/2 = 48
16 (120—1 6)/2 = 104/2 = 52
11 (120-1 1 )/2 = 109/2 = 54

These lengths are used in Figure 14-10. Check that they cause centering of the
heading and that the correct code is generated.
Figure 14-10 also illustrates the SETC symbol, covered next.

SETuCTSET CHARACTER- SETC assigns a character value to a SETC symbol up to

eight characters enclosed in apostrophes. The operand generally defines a character

NAME OPERATION OPERAND

A SETC symbol SETC one character operand
317 Set Symbols

39 P10HE0 HEDNG heaogi.pagepk

40+P10HED UNPK PRINT+1IS(31.PAGEPK UNPK PAGE CTR.
4 1+ O 1 PRINT + 117.X *FO• CLEAR UNITS ZONE
42 + MVC PR INT + 110(41. = C'PAGE• MOVE PAGE LITERAL
43 + MVC PRINT+48(23}.HEAOG1 MOVE HEADING
44 + MVC PR IN T + 1 ( L • 0 A T E 1.DATE MOVE DATE

46 P20HE0 HEONG HEADG2.PAGEPK.DAT=DATOT

47+P2CHED UNPK PRINT+115(3).PAGEPK UNPK PAGE CTR.
48 + OI PRINT+117.X*F0* CLEAR UNITS ZONE
49 + MVC PR INT + 110(4), = C * P AGE• MOVE PAGE LITERAL
50 + MVC PRINT+52(16).F E A 0G2 MOVE HEADING
51 + MVC PRINT+1(L*DAT0T).DAT0T MOVE OATE

53 P3CHED HEDNG HEADG3.PAGEPK,PRT=OUTAREA,CAT= CATOT

5 4 + P30HED UNPK CUTAREA+115(3).PAGEPK UNPK PAGE CTR.
55 + OI OUTAREA + l17.X* FO• CLEAR UNITS ZONE
56 + MVC CUTAPEA+110(4),=C*PAGE* MCVE PAGE LITERAL
57 + MVC 0UTAREA + 54( 11 ),HE AOG3 MOVE HEADING
58 + MVC CUTAREA+1(L*CATOT),DATOT MOVE OATE

60 P40HED HEONG HEADG4.PAGEPK

61+LENGTH CF HEACING EXCEEDS PRINT AREA

63 * •
64 * •
65 PRINT OC CL 12 1 • • PRINT AREA
66 CIUTAREA DC CL 12 1• • PRINT AREA
67 PAGEPK OC PL 2 • 0 • PAGE COUNTER
68 HEAOG1 DC CL23•HOTROO CUSTOM IMPORTERS*
69 HEADG2 DC CL 16* ABC OISTRIEUTORS*
70 HEADG3 DC CL 1 1*BAKER CORP.*
71 HEADG4 DS CLloO LONG HEADING
72 CATE DS CL 12 DATE AREA
73 CATOT DS CL 12 DATE AREA

FIGURE 14-10 Use of HEDNG macro-instruction

Examples of SETC character operations:

LCLC &CHAR1 ,&CHAR2,&CHAR3

&CHAR1 SETC ’SAM’ S’
&CHAR2 SETC &TYPE.A’
&CHAR3 SETC ’L” FLOAT’

LCLC defines three SETC symbols.

&CHAR1: the character value SAM'S is assigned to the SETC symbol &CHAR1. Two
apostrophes within the expression denote a single apostrophe.
&CHAR2: Assume that &TYPE contains the value FIELD. The expression concate¬
nates FIELD with A and assigns FIELDA to &CHAR2.
&CHAR3: the value L'FLOAT is assigned to the SETC symbol &CHAR3.

In Figure 14-9 SETC defines three symbols, &LIT, &L1, and &L2. One SETC
assigns &LIT with a character expression to be used as a literal. Note the literal,
=C'PAGE', in the generated code in Figure 14-10. Instead of using &LIT in
the macro-definition, we could have coded the literal itself: MVC
318 MACRO WRITING

&PRT+110(4),—C'PAGE'. &L1 and &L2 are used to create a symbolic length refer¬
ence for moving the date to the print area. Note the macro-definition and generated
code for this example.
We have now covered all the features used in the macro HEDNG. Some
remaining items, SETB symbols, system variable symbols, and global SET symbols,
are covered next.

SETB—SET BINARY. SETB assigns the binary value 0 or 1 to a SETB symbol. SETB
determines if a condition is false (0) or true (1). SETB is commonly used as a switch
indicator in the macro definition.

NAME OPERATION OPERAND

A SETB symbol SETB 0 or 1, or (0) or (1), or (a logical expression)

A logical expression, enclosed in brackets, consists of one term (arithmetic

relationship, character relationship, or SETB symbol), or a logical combination of
terms (connected by AND, OR, or NOT). Assume that &SYM1 is format C containing
the value 6, &SYM2 is format C, and &SYM3 contains the word YES in the following
examples of SETB binary operations:

LCLB &B1 ,&B2,&B3,&B4

&B1 SETB 1
&B2 SETB (&SYM1 LT 7)
&B3 SETB (’&SYM3’ EQ NO’)
&B4 SETB (’&SYM3’ EQ ’YES’ AND T’&SYMI NE T’&SYM2)

LCLB defines four SETB symbols.

&B1: an arithmetic term (1 = true) is assigned to &B1.

&B2: the arithmetic relationship is true, so 1 is assigned to &B2.
&B3. the character relationship is false, so 0 is assigned to &B3.
&B4: the logical combination of terms is false, so 0 is assigned to &B4.

In Figure 14-11 SETB is a switch &ERRB that determines it any errors have been
encountered ,n the macro-instruction. If an error is found, the Assembler prints the
appropriate message and the switch is set. The macro then continues with the next
test. Only after all validity testing does the macro terminate processing. In this wav
we fully test the macro-instruction each time it is used.

Note: SETB symbols such as &ERRB can contain only 0 or 1 In an

instruction AIF (&ERRB1.A30, AIF tests if &ERRB contains 1, and if so
branches to A30. ' 1
319 System Variable Symbols

1 MACRO
2 4L00K LOOKP 4TABLE. ADDRESS OF TABLE
4SERARG. ADDRESS OF SEARCH ARGUMENT
4FUNCTN, ADDRESS TO STORE FUNCTION
4N0TFND ADDRESS IF ARG*T NOT FOUND
3 GBLB 4SAVIND SAVE AREA INDICATOR
4 LCLA 4LSER.4LENTRY LENGTH OF SEARCH 4 ENTRY
5 LCLB 4ERRB ERROR SWITCH INDICATOR
6 LCLC 4H,4HALF HALFWORD LITERAL
7 4ERRB SETS ( 1 ) SET ERROR INDICATOR TO 1
8 •* TEST FOR VALIDITY
9 A I F <T'4NOTFNO EQ • I • ) . A 10 IS NOTFND A VALID ADDRESS?
10 MNOTE •ADDRESS FOR NOTFOUNO IS INVALID*
i 1 4ERRB SETB (0 ) SET ERROR INDICATOR TO 0
l2 . A10 A IF (T•4T ABL E EQ *C* ANC T • 4SERARG EQ *C*) .A 20
13 A IF (T•4 T ABLE EO *P* ANC T • 4SERARG EQ *P*).A20
1 4 MNOTE •TABLE 44 SEARCH NOT BOTH CHAR OR PACKED*
1 5 4ERRB SETB (0 ) SET ERROR INDICATOR TO 0
16 . A20 A IF (4ERRB).A30 IS ERROR INDICATOR = 1?
1 7 MNOTE •MACRO CANNOT BE RESOLVED - TERMINATED*
ia MEXIT
1 9 .* SET VALUES
20 • A30 ANOP
2 1 4LSER SETA L* 4SERARG LENGTH OF SEARCH ARGUMENT
22 4LENTRY SETA 4LSERFL•4FUNCTN LENGTH OF SEARCH FUNCTION
23 4H SETC • =H• SET UP HALFWORD
24 4H ALF SETC •••4LENTRY'•• * CONSTANT
25 4LCOK ST 10.SAVREG SAVE REGISTER-10
26 LA 10.4T ABLE LOAD ADDRESS OF TABLE
27 AI F (T•4TABLE EO •P* ) .B1 0 IS TABLE DEFINED AS PACKED?
28 .* COMPARE SEARCH TO TABLE ARGUMENT
29 R4SYSNDX CLC 4SERARG,0(10) COMPARE CHARACTER
3C AGO • B 20
3 1 • BIO ANOP
22 R4SYSNOX CP 4SERARG.0(4LSER.10) COMPARE PACKED
33 .820 BE T4SYSNDX * EQUAL - FOUND
34 BL S4SYSNDX * LOW - NOT IN TABLE
35 AH 10.4H4HALF INCREMENT NEXT ENTRY
36 B R4SYSNDX
37 .* DEFINE savearea FIRST T IME ONLY
38 AIF (4SAVIND).830 HAS SAVIND BEEN DEFINED?
39 SAVREG DS F REGISTER SAVE AREA
40 4 SA VI NO SETB (1 ) SET INDIC AT OR ON (1)
4 l • B30 ANOP
42 .* ARGUMENT NOT FOUND
43 S4SYSNDX L 10.SAVREG RESTORE REG-10
44 B 4NOTFND GO TO ERROR ROUTINE
45 .* ARGUMENT FOUND
46 T4SYSNDX M VC 4F UNCTN.4LSER.(10) MOVE FUNCTION FROM TABLE
47 L 10.SAVREG RESTORE REG-10
48 MENO

FIGURE 14-11 Definition of table look-up macro LOOKP.

SYSTEM VARIABLE SYMBOLS

The Assembler automatically assigns values to the three local system variable sym¬
bols, &SYSECT, &SYSLIST, and &SYSNDX. Because of its limited use &SYSECT is not
covered.
320 MACRO WRITING

&SYSLIST—MACRO INSTRUCTION OPERAND. We may use &SYSLIST as an al¬

ternative way of referencing a positional macro operand. In the HEDNG macro in
Figure 14-9, we could have coded the UNPK instruction as UNPK
&PRT+115(3),&SYSLIST(2). The subscript (2) refers to the second parameter in the
prototype (&PAGE).

&SYSNDX—MACRO INSTRUCTION INDEX. For the first macro-instruction pro¬

cessed in an assembly, the Assembler initializes &SYSNDX with 0001. For each
succeeding macro-instruction, the Assembler increments &SYSNDX by 1. In Figure
14-10 the macro FHEDNG is used four times. Since this is the only macro-instruction
in the assembly, at P10HED, &SYSNDX is set to 0001; at P20HED, &SYSNDX is set
to 0002, etc.
&SYSNDX can prevent a macro from generating duplicate labels. This situation
did not occur in any examples up to this point. However, in Figure 14-11, the macro
LOOKP requires that the macro generate several labels. If the macro-instruction is
coded more than once, the macro generates labels with the same name, causing
Assembler error messages. To avoid this, the macro uses labels such as R&SYSNDX.
In the generated code in Figure 14-12, this label becomes R0001 for L10LK and
R0002 for L20LK.

Problems 14-5, 14-6, and 14-7 should now be attempted.

GLOBAL SET SYMBOLS

LCLA, LCLB, and LCLC define local SET symbols for use within the same macro-
definition. GBLA, GBLB, and GBLC define Global SET symbols for communicating
values between different macro-definitions.

NAME OPERATION OPERAND

GBLA One or more variable (SET) symbols,

blank GBLB separated by commas
GBLC

Global operations define the same initial values as do local operations. However,
they are initialized only once, the first time the Assembler encounters the GBLA
GBLB, or GBLC. We define global instructions immediately after the prototype
statement. Figure 14-11 gives an example. GBLB defines and initializes &SAVIND to
zero, and prevents SAVREG DS F from being defined more than once. The macro
??!w,k1SAV'ND contains zero- lf S<A 't Permits SAVREG to be defined and sets
&SAVIND to 1. &SAVIND is now permanently set to 1, through all succeeding
macro-instructions, and the Assembler, through the AIF statement, bypasses generat¬
ing more than one DS for SAVREG. (Consider how &SYSNDX could achieve the
same result.)
321 Extended Example—Table Look-Up Macro

55 L10LK LOOKP JOBTABPK,JOBNQPK .RATEPK,R1ONOFND

56+L10LK ST 10.SAVREG SAVE REGISTER-10
57 + LA 10.JOBTABPK LOAD ADDRESS OF TABLE
58+R0C0I CP JOBNOPK.0(4.10) COMPARE PACKED
59 + BE TO 0 0 1 * EQUAL - FOUND
60 + BL S000 1 * LOW - NOT IN TABLE

X
N
O
61 + AH

II
INCREMENT NEXT ENTRY
62 + B ROOO 1
63+SAVREG DS F REGISTER SAVE AREA
64+ SO00l L 10.SAVREG RESTORE REG-10
65 + B R 10NCFND GO TO ERROR ROUTINE
66+T000I M VC RATEPK,4(10) MOVE FUNCTION FROM TABLE
67 + L 10.SAVREG RESTORE REG-10

69 L20LK LOOKP JOBT ABCH.JOBNCCH .RATECH.R1ONOFND

70+L20LK ST 10.SAVREG SAVE REGISTER-10
71 + LA 10.JOBTABCH LOAD ADDRESS OF TABLE
72+R0002 CLC JOBNOCH,0(10) COMPARE CHARACTER
73 + BE T0 002 * EQUAL - FOUND
74 + BL S0002 * LOW - NOT IN TABLE
75 + AH 10,=H*9* INCREMENT NEXT ENTRY
76 + B R0002
77+S0002 L 1 0.SAVREG RESTORE REG-10
78 + B R10NCFND GO TO ERROR ROUTINE
79+T0002 M VC RATECH•5(10) MOVE FUNCTION FROM TABLE
80 + L 10.SAVREG RESTORE REG-10

82 L30LK LOOKP JOBTABPK.JOBNCCh1,RATEPK.R20N0FND

83+ADDRESS FOR NOTFOUNO IS INVALID
84-f TABLE 4 SEARCH NOT BOTH CHAR OP1 PACKED
65+MACRO CANNOT BE RESOLVED - TERMINATED

87 R10N0FN0 M VC PRINT+ »=C*ARGUMENT NOT IN TABLE*

88 4 •
e9 4 •
90 PR INT DC CL 12 1 • PRINT AREA
91 JOBTABPK DS 25PL7 TABLE OF PACK JOBS 4 RATES

92 JOBNOPK DS PL 4 SEARCH ARG - JOB NUMBER

93 RATEPK OS PL3 TO STORE FOUND TABLE RATE

JOETABCH DS 15CL9 TABLE OF CHAR JOBS 4 RATES

95
96 JOBNOCH DS CL 5 SEARCH ARG - JOB NUMBER
RATECH DS CL4 TO STORE FOUND TABLE RATE
97

FIGURE 14-12 Use of LOOKP macro-instruction.

EXTENDED EXAMPLE—TABLE LOOK-UP MACRO

The table look-up macro, LOOKP, is defined in Figure 14-11 and used in Figi
14-12. LOOKP permits us to code in one statement a table look-up routine that

— Initializes a register with the table address.

_ Compares a search argument to the table argument.
_ If equal, branches to an address where the table function is extracted.
_ If low, branches to the address of an error routine.
_ If high, increments for the next argument and returns to the compare.
322 MACRO WRITING

The macro allows for either character or packed arguments. It requires that the
table contain discrete arguments (unique numbers such as Job or Stock numbers,
rather than table ranges as in income tax), in ascending sequence. The comments
beside each parameter explain the symbolic parameters in the prototype operand.
We must code as the fourth parameter in the macro-instruction the address to which
the look-up routine branches if the search argument cannot be found. The program
must contain the address of this error routine. The routine should provide usual error
handling, such as the printing of a message.

The remaining problems should now be done.

PROBLEMS

14-1. Distinguish between a positional and a keyword macro.

14-2. What is the difference between the use of a variable symbol and a sequence
symbol?
14-3. Revise Figures 14-5 and 14-6 so that the operation is DR (Divide Register).
Changes the names to suit.
14-4. Revise Figures 14-7 and 14-8 as in the previous problem.
14-5. Revise Figures 14-9 and 14-10 for the following: Print area = 1 33 positions—
change other lengths accordingly; Add 'V to the page counter; Edit (ED) the
page counter.
14-6. Write a macro that provides for MP with round and shift to two decimal
places.
14-7. Expand the macro in the previous problem to provide as well for M and MFC
14-8. Write a macro to initialize a program with three base registers.
14-9. Write a macro to test given character fields for blank positions. (Assume that
the fields are input fields, to be packed.) Replace any blank position with a
zero.
 CHAPTER t 5

SUBPROGRAMS AND
OVERLAYS

This chapter covers the concept of writing and assembling programs as separate
subprograms. This chapter uses the general term subprogram to mean a section of
coding that comprises a separate part of the program, such as a control section
(CSECT) or a phase. The link edit step combines the separate subprograms into a
single executable program. We may want to code a program in more than one
subprogram for the following reasons:

— Several programmers can work separately on subprograms.

— Breaking the program into logical components simplifies the problem.
— It is easier to debug smaller sections.
_ There may not be enough base registers available for a large program.
_ Main storage may be too small for the entire program. The use of "Virtual Stor¬
age," however, provides automatic program sectioning and overlays, and to a
large degree reduces the need for programmers to design such programs.

CSECT—CONTROL SECTION

Chapter 6 introduced the term control section (CSECT). A CSECT is a block of coding
that can be relocated without affecting the operating logic of the program. Both the
Assembler and Linkage Editor process control sections, not programs. We may code

323
324 SUBPROGRAMS AND OVERLAYS

CSECTs as separate assemblies, each with its own unique base registers. Then we link
edit the CSECTs into one or more phases, the Linkage Editor output. A program may
consist of one or more phases, and a phase may consist of one or more control
sections. Among the ways to section a program into subprograms are:

1. The program may consist of a single phase—one or more control sections. The
CSECTs are assembled separately or together, and link edited into a single phase.
For execution, the system loads the entire phase into storage.
2. The program may consist of more than one phase, each with one or more CSECT.
Each phase is separately assembled, then link edited together. At execution-time,
the system loads the first (root) phase into storage. The root phase loads (overlays)
the other phases into storage as required.

There are two main problems associated with the use of subprograms:

1. Some data is common to more than one subprogram. But data is defined in only
one subprogram. Because subprograms are assembled separately, the Assembler
treats each subprogram as a completely different program. Data defined in one
subprogram is not therefore known in another. Among the ways of making data
known between subprograms are the use of "DSECTs" and "passing parameters".
2. A subprogram must be able to link to another subprogram, its register contents
must be saved (especially base registers), and there must be some means of
returning and restoring the register contents. The Assembler macros that provide
this linkage are CALL, SAVE, and RETURN. The Assembler requires a standard
savearea for registers and a standard linkage convention.

We will first examine a simple case of how a DSECT works. Then we will see
how to assemble and link together two CSECTs for execution. The last example
combines three separately assembled phases into one program—a root phase and
two overlay phases.

DSECT—DUMMY SECTION

We may want to describe a data area without actually reserving any storage. For
example, the main subprogram, SUBPROGA, contains the main data and certain
other coding, including instructions to link to SUBPROGB. SUBPROGB is a sepa¬
rately assembled control section. Within SUBPROGB we want to reference the main
data that is defined and exists in SUBPROGA. We may describe this main data in
SUBPROGB so that when-assembling SUBPROGB, the Assembler knows the names,
lengths, formats, and relative position of each field in SUBPROGA. For this purpose
we may use a special Assembler instruction, DSECT, Dummy Section.

NAME OPERATION OPERAND

Name DSECT blank

325 DSECT—Dummy Section

The name of the DSECT refers to the first (leftmost) byte of the section. DSECT
reserves no storage. Instead, it gives the Assembler a mask or image of data defined
elsewhere. Figure 15-1 illustrates a DSECT defined within a CSECT. The partial
program reads card records with two buffers and no workarea (IOREG = 5). Rather
than transfer the current buffer to a workarea with MVC CARDIN,0(5), we want to
process input records directly in the buffer, and we want the fields defined.
Note the following: The DSECT, called DATAIN, generates no object code. The
fields defined within the DSECT tell the Assembler the names and formats. USING
DATAIN,5 assigns register-5 as a base register for DATAIN. This is because the CARD
buffers are under register-5 (IOREG = 5). Register-5 acts as a base register with respect

LOC OEJECT CODE STMT SOURCE STATEMENT

cooooo 4 TESTA CSECT • CONTROL SECTION

000000 0530 5 BALR 3.0 INITIALIZE BASE REG
6 USING *.3
7 USING OATAIN,5

9 OPEN CARO ACTIVATE FILE

17 GET CARC READ A RECORD
0000 1 E D501 5000 3132 22 CLC COOEIN,=CB 03* IS IT VALID RECORD?
000024 4770 302C 23 BNE R1OCOOE * NO - ERROR

000028 0205 303E 5002 25 MVC PREV,ACCTIN

26 4 •
27 4 •
28 R1OCOOE ECU 4 ERROR ROUTINE

30 ZIOENO CLOSE CARD

38 EOJ

0 coooooooooo 42 PREV DC XL6 • 00 • PREVIOUS ACCOUNT NO.

0G0 040

44 CARO DTFCD BLKSIZE= 80,

OEV A C DR=SYSIPT •
OEVICE=3504,
EOFADDR=Z1OEND •
I0AREA1=CARBUFFI,
IOAREA2=CARBUFF2.
RECFORM=FIXUNB 9,
TYPEFLE=INPUT,
I0REG=<5>

0 00 C 7A 67 CARBUFF1 OS CL 80 INPUT BUFFER-1

68 CARBUFF2 OS CL80 INPUT BUFFER-2
OOOOCA

70 OATAIN DSECT • DATA DUMMY SECTION

CCOOGG
71 CARO IN OS OCL80 4 CARD RECORD
000000
72 COOEIN OS CL2 4 CARD CODE
000000
ACCT IN OS CL 6 4 ACCOUNT NO,
000002 73
74 cs CL 7 2 4 REST OF RECORD
ccoooe
75 DROP 5

77 TESTA CSECT 9 RESUME CONTROL SECT

0001 1 A
78 LTORG
000120
5E5BC2D6D7C5D540 79 = C * * SBCPEN *
000I20
80 =C*$*BCLOSE•
000128 5B5BC2C3D3D6E2C5
8 1 =A(CARO)
000 1 30 00000048
82 = C * 03*
000134 F0F3
83 END TESTA

FIGURE 15-1 Example CSECT and DSECT.

326 SUBPROGRAMS AND OVERLAYS

to DATAIN. When we code CLC CODEIN,=C'03', the Assembler treats CODEIN as

under register-5. The operand for CODEIN in object code is 5000 (base register-5,
no displacement, because CODEIN is the first byte within DATAIN). Assume IOCS
has loaded register-5 with the address of buffer-1 (CARBUFF1) for the first card record.
Since register-5 contains the address of CARBUFF1, then a reference to CODEIN is to
the first two bytes of CARBUFF1. On the next read operation, IOCS loads the address
of CARBUFF2 into register-5, and CODEIN references that area.
We want base register-5 to apply only to the fields in the DSECT. The statement
DROP 5 tells the Assembler to discontinue applying base register-5. The Assembler
resumes addressing with base register-3. The CSECT following DROP terminates the
DSECT, and because the CSECT is named TESTA, tells the Assembler to resume with
the initial CSECT called TESTA.
Under OS, Locate Mode involves register-1. The changes necessary to convert
from the DOS DSECT example would be:

— OS linkage for initialization and return to the Supervisor.

— A DCB specifying MACRF = (GL).
— After the GET, load the contents of register-1 into register-5, as in the example:

GET INCARD
LR 5,1

It is also possible to use register-1 as the DSECT base register, provided the
program executes no macro that destroys the base address while it is still required.

Problems 15-1 through 15-4 should now be attempted.

SUBPROGRAM LINKAGE

We may use DSECTs to make data known between separately assembled subpro¬
grams. Additionally, we use standard linkage and saveareas to link between subpro¬
grams and to save the contents of registers.

LINKAGE REGISTERS. The standard linkage registers are 0, 1, 1 3, 14, and 15:

REGISTER
USE
0 & 1 Parameter registers, used by the CALL macro to pass "parameters" (i.e.
addresses of data) to the called program.
13
Savearea re8'ster—contains the address of the calling program's savearea,
to be stored by the called program.
14
Return register—contains the address of the calling program, to which the
called program is to return.
327 Subprogram Linkage

15 Entry point register—contains the address of the called program's entry

point, where we want to link to begin executing.

THE STANDARD SAVEAREA. Each calling program requires definition of a

savearea to preserve the contents of its registers. The savearea contains 18 fullwords
(or 9 doublewords), aligned on a doubleword boundary. The savearea provides for
an additional condition—one subprogram may call another subprogram, which in
turn may call yet another subprogram. Figure 15-2 gives the savearea format.

Displace¬
Word ment Contents of each fullword
1 0 Used by PL/I programs.
2 4 Address of the savearea of the calling program.
The called program saves this in its own savearea.
3 8 ♦Address of the savearea of the called program.
4 12 ♦Contents of register-14, return address to the calling
program.
5 16 ♦Contents of register-15, the address of the entry
point to the called program.
6 20 ♦Contents of register-0.
7-18 24 ♦Contents of registers-1 through 12.

♦Called program stores these in calling program's savearea.

FIGURE 15-2 Standard savearea words.

LINKAGE MACROS. The following macros link between subprograms:

NAME OPERATION OPERAND

CALL entrypoint!,(parameter, . . .)]

(name) SAVE (r1,r2)
RETURN (r1,r2)

Assume that SUBPROGA is the main subprogram, loaded in storage and being
executed. SUBPROGA calls SUBPROGB for execution (SUBPROGB must also be in
storage). SUBPROGA is the calling program, and SUBPROGB is the called program.

TE1E CALL MACRO. We use CALL in the calling program to link to the called
program. The operand 'entrypoint' is the name of the first executable instruction of
the called program. (Following entrypoint is an optional parameter list. Parameters
are symbolic addresses that we want known in the called program.) CALL loads the
address of the next sequential instruction in register-14 and branches to the called
program.
 LOC OBJECT CODE STMT SOURCE STATEMENT

000000 4 PROG A C SEC T • MAIN CONTROL SECTION

5 4 COMMON DECLARATIVES
DATA DS OCL 1 DATA AREA
000000 r *
000000
000002
1
300C
20C J I 7 HRSPK
RATEPK
DC
DC
PL2*12.0*
PL 2*3.00*
| XX| .XC |
1 X. X|XC j
1 8 MAGEPK DS PL 4
000004 L 9

0 CO CO 8 0530 11 BEG IN A BALR 3.0 INITIALIZE BASE REGISTER-3

12 USING 4.3
1 3 USING DATA.4 ASSIGN BASE REG-4 TO DATA
00000 A 5840 307E 1 4 L 4.=A(DATA) LOAD BASE REGISTER-4
15 4 •
16 4 •
OOOOOE F83l 4004 1 7 ZAP XAGEPK,HRSPK SET UP MULTIPLICAND IN PROO
18 4 •
19 4 •
0000 l 4 4 100 3026 20 LA 13.SAVEA LOAD ADDRESS OF SAVE AREA
2 1 CALL PROGB LINK TO PROGB
25 A 1ORTN EQU 4 ANY VALID INSTRUCTION HERE
26 4 •
27 4 •
28 4 •
29 PDUMP DATA.BEGINA
34 EC J

0000 30 38 SA VEA DS 9D PROGA REGISTER SAVEAREA

000078 39 LTORG
000078 5B5BC2D7C4E4D4D7 40 =CL8•S*BPDUMP•
000080 0 000000000000008 4 1 =A(OATA.BEGINAI
000080 00000000 42 =A(DATA)
C0008C 00000000 43 = V< PROGB)

45 END BEGINA

// EXEC ASSEMBLY

000000 3 DATAB DSECT • PROGB COMMON DATA AREA

r
000000 oooc 1 4 HRSPK DC PL2•0* 1 XX| .XC |
000002 OOOC ] 5 RATEPK DC PL2*0* |x.x|xc|
000004 l 6 XAGEPK DS PL4

COOO 00 8 PROGB C SECT

9 SAVE (14,12) SAVE REGISTERS 14 - 12
000004 0590 1 2 B ALR 9,0 INITIALIZE BASE REGISTER-9
13 USING *»9
1 4 USING DATAB,4 ASSIGN BASE REGISTER-4
TO DATAB
000006 5000 9022 16 ST 13 .SAVEB + 4 SAVE ADDRESS OF SAVEA
00000 A 1 8C0 1 7 LR 12.13
ocoooc 41D0 901E ia LA 1 3.SAVEB
0000 1 0 50DC 0008 19 ST 13,8(12) STORE ADDRESS OF SAVEB
20 4 •
2 1 4 •
22 4 •
0000 1 4 FC31 4004 23 MP XAGEPK,RATEPK MULT HOURS X RATE
24 4 •
25 4 •
00001 A 58D0 9022 26 L 13.SAVEB+4 LOAD ADDRESS OF SAVEA
27 return (14,12) RETURN TO A10RTN IN PROGA

000024 32 SAVEB os 18F PROGB SAVEAREA

34 END PROGB

FIGURE 15-3 Linkage between main and subprogram.

328
329 Linking Two Control Sections

THE SAVE MACRO. When we link to the called program, we must save the con¬
tents of the registers of the calling program. The calling program defines the standard
savearea for this purpose. Before issuing the CALL macro, we first load the address of
the savearea in register-13. At the beginning of the called program we code SAVE
(14,12) to save the contents of the registers, except 13.

THE RETURN MACRO. In order to return to the calling program, we code RETURN
(14,1 2) to restore the original contents of the calling program's registers and to return
to the calling program.
Next we examine the generated code for the macros and the additional instruc¬
tions needed to complete the linkage.

UNKING TWO CONTROL SECTIONS

Figure 15-3 gives skeleton coding for two separately assembled CSECTs—a calling
subprogram, PROGA, and a called subprogram, PROGB. The savearea in PROGA is
called SAVEA, and that in PROGB is SAVEB. PROGA defines common data under
DATA (immediately at the start). DATA is subject to base register-4, and the rest of
the program following BEGINA is under base register-3. Before calling PROGB we
load register-13 with the address of our savearea, SAVEA. For the macro CALL
PROGB, the Assembler generates:

L 15, = V(PROGE3) Load address of PROGB in register-15

BALR 14,15 Load next instruction address in register-14 and branch
to PROGB

The literal =V(PROGB) is an external address constant. Since the Assembler

does not know the address of PROGB, we tell it that this address is external to this
assembly. The Assembler inserts an address of X'0000', and the Linkage Editor inserts
the correct address. BALR loads the address of the next instruction, A10RTN, in
register-14 and branches to PROGB. Immediately PROGB saves PROGA's registers.
The SAVE macro here generates STM 14,12,12(13). In effect, SAVE stores registers 14
through 1 2 beginning at SAVEA+12 (word 4 through 1 8)—check this to Figure 15-2.
Next, PROGB initializes base register-9. It could be any available register, but
not register-4. Register-4 still contains the address of DATA (the common data area)
as loaded in PROGA. We still need this address in order to reference these fields,
called DATAB in PROGB. Since register-4 is already loaded, we need only tell the
Assembler to assign base register-4 with USING DATAB,4. The Assembler will use
register-4 for any reference to the fields in the DATAB DSECT.
PROGB must now save the contents of register-1 3, which contains the address
of PROGA's savearea. We store the contents of register-13 in SAVEB+4 (word 2)
because, before returning, we must reload PROGA's registers. The next three instruc¬
tions store the address of SAVEB in SAVEA+8 (word 3). This is done because if there
330 SUBPROGRAMS AND OVERLAYS

are many subprograms, we can refer to this field for debugging and tracing if the
program does not work correctly. The linkage routine has now stored the following:

SAVEA SAVEB
Word Displ't Contents Word Displ't Contents
1 0 1 0
2 4 2 4 A(SAVEA)
3 8 A(SAVEB) 3 8
4 12 A(A10RTN) 4 12
5 16 A(PROGB) 5 16
6-18 20 Contents of registers 6-18 20
0-12

Now PROGB may perform required processing, and reference the fields de¬
fined in the DATAB DSECT (actually DATA in PROGA). In order to return to the
calling program, PROGA, we simply reload register-13 with SAVEB+4, the address
of SAVEA.
The RETURN macro next generates:

LM 14,12,12(13) Reload registers 14-12 starting with SAVEA + 12 (Word 4)

BR 14 Branch to A10RTN in PROGA.

RETURN restores the original SAVEA registers (14 through 12). Since register-
14 now contains the return address (A1ORTN), BR branches to this address. We now
resume normal processing in PROGA, with base registers reinitialized.
The question may arise: Why doesn't PROGA save its own registers in SAVEA
before linking to PROGB? Assume that this is done, and PROGB then initializes its
own register values. When PROGB returns to PROGA, PROGA's base registers are
not loaded—and without a base register PROGA has no way to reload its own
registers.
In this example, SAVEB does not require a full save area. This is the way we
would define SAVEB if PROGB were to link to another subprogram. If so, then the
called program would store PROGB's registers, linkage address, and savearea in
SAVEB.

TECHNICAL NOTE ON USING. One rule of the Assembler is "in calculating the
base register to be used, the Assembler always uses the available register giving the
smallest displacement". This rule sometimes causes the Assembler to override a
DROP or another USING. Suppose, for example, that the program uses two base
registers (3 and 4). The common data is under register-5 and is defined toward the
end of the CSECT:
331 Passing Parameters

BALR 3,0
USING *>3,4 3 & 4 are base registers for program
USING DATA,5 5 is base register for common data

DATA DS OC common data area

Depending on the size of the program preceding DATA, the Assembler may
apply register-4 to DATA rather than the specified register-5. For this reason, the
program defines the common data before the BALR/USING where the Assembler is
sure to apply the correct base register.

Problems 15-5 through 15-8 should now be attempted.

PASSING PARAMETERS

Another way to make data known between subprograms is through the use of “pass¬
ing parameters." The CALL statement contains a parameter list of the address(es) to
be passed to the called program:

CALL subprogram,(parameter-list)

Each parameter generates a fullword address, one after the other. CALL loads into
register-1 the address of the first parameter in the list. Since the parameter is itself an
address, register-1 will contain the address of the first address. The called program
can load the address of the first parameter into an available register.
Figure 1 5-4 provides the same simple example as the previous one, converted
to parameters. In the calling program, the instruction

CALL PROGB,(WAGEPK)

loads the address of WAGEPK's address into register-1 and links to PROGB. The code
that the CALL generates is (in part) the following:

L 15, = V(PROGB) Load address of PROGB in register-15.

LA 14,* + 10 Load return address in register-14
BALR 1,15 Load address of WAGEPK address in register-1,
DC A(WAGEPK) and link to PROGB

The called program uses this address to load the actual address of WAGEPK into
 332 SUBPROGRAMS AND OVERLAYS

LCC OBJECT CODE STMT SOURCE STATEMENT

coooco 5 PROG* C SEC T

000000 0530 6 BALR 3.0
7 USING *.3
8 * •
9 * •
000002 F631 3C66 3066 10 ZAP WAGEPK.HRSPK SET UP MULTIPLICAND
t 1 ♦ •
12 * •
oooooe 4100 30 IE 13 LA 13.SAVEA LOAD AODRESS OF SAVE AREA
14 CALL PROGB.<WAGEPK> LINK TO PROGB
24 * •
25 ♦ •
26 EG J
000020 29 SAVEA OS 18F PROGA REGISTER SAVEAREA
000066 12 OC 30 HRSPK OC PL 2* 12.0* |XX|.XC|
00006A 31 WAGEPK OS PL 4
C0006E 60CC 32 RATEPK OC PL2* 6.00• |X.X|XC|
000070 33 LTQRG
0 00 C 70 OCOOOOOO 34 =V(PROGB)
35 END PROGA

// EXEC ASSEMBLY,SI2E=64K

OCCOOO 3 PROGB CSECT

4 SAVE (14.12) SAVE REGISTERS 14 - 12
C 00 0 04 0590 7 B ALR 9,0 INITIALIZE BASE REG-9
8 USING *.9
ooooce 5 00 0 9026 9 ST 13.SAVEB+4 SAVE AODRESS OF SAVEA
OOOOOA 1 8CD 10 LR 12,13
COOOOC 4 1 DO 9022 1 1 LA 13,SAVEB
0000 1 0 5CDC 0008 12 ST 13,8(12)
000014 aeeo 1000 13 L 8.0(0,1) LOAO AOORESS OF WAGEPK
0000 1 8 FC3 1 8000 8004 14 MP 0(4,8).4(2.8) MULTIPLY HOURS X RATE
15 ♦ •

16 * •
0000 1 E 5600 9026 17 L 13.SAVEB+4 LOAD ADDRESS OF SAVEA
18 RETURN (14.12) RETURN TO PROGA

000028 23 SAVEB DS 1 8F PROGB SAVEAREA

25 END PROGB

FIGURE 15-4 Passing parameters.

register-8: L 8,0(0,1). The program can use this address explicitly as a base address
reference. In the instruction

MP 0(4,8),4(2,8)

operand-1 references WAGEPK (containing hours), and operand-2 references the

next field in storage, RATEPK.
The example provides standard program linkage, although there are shortcut
methods. For example, PROGB could assume register-15 as a base register, since it
contains the starting address of PROGB. We could omit the standard BALR/USING
and code USING *,15 at its start. Also, we need not store the contents of register-13
in the save area and reload it on return. These practices may be shortsighted, because
333 Linking Phases

any input/output or CALL executed in PROGB will destroy the contents of registers
13 and 15, causing a subsequent execution error.

Problem 15-9 should now be attempted.

LINKING PHASES

We may assemble and link edit one or more control sections, and may arrange the
assembly so that the Linkage Editor output is one or more phases. Up to now our
programs consist of only one phase. The Linkage Editor writes the object code phase
into the Core Image or Load library. The job card // EXEC causes the first or only
phase to load into main storage and to begin execution. If we have organized the
program into additional phases, the system does not load them into storage. We use
the LOAD or FETCH macros to load subsequent phases. The purposes of organizing a
program into phases are:

1. Some phases may be separately assembled and catalogued. A useful example is

data common to many programs—file declarations and record definitions. We
need not reassemble these phases each time we need them; we can use the
INCLUDE statement to link edit them into our program.
2. The entire program may not fit into main storage. We may arrange the program
into separate logical phases.
The main (root) phase is first, followed by as many additional (overlay) phases
as required. After the link edit, the // EXEC card loads the root phase into storage and
begins its execution. The root phase generally contains the common data and the
main program logic. It may load (with LOAD or FETCH) the various phases as they
are required. (The system loads phases, not programs or CSECTs.) Such phases are
called overlays—when they load into storage they may overlay previously loaded
phases. The root phase generally remains intact and is not overlaid.

THE PHASE CONTROL STATEMENT. Linkage Editor control statements include

the cards PHASE, INCLUDE, ENTRY, and ACTION. The PHASE card tells the Linkage
Editor that a section of coding is to link edit as a separate phase. If the code is to be
assembled, we insert the PHASE card ahead of // EXEC ASSEMBLY.

NAME OPERATION OPERAND

blank PHASE name,origin

The name gives the symbolic name of the phase, up to 8 characters. If the
program consists of more than one phase, then the first four characters of each phase
name must be identical. The origin gives the address of where the phase is to load at
execute-time. Among the commonly used entries are:
 334 SUBPROGRAMS AND OVERLAYS

// OPTION LINK,NQXREF.LOG
ACTION MAP
PHASE PMASA.BOOT
✓/ EXEC ASSEMBLY.SIZE=64K

LCC OBJECT CODE STMT SOURCE STATEMENT

000000 4 PROGA CSECT

000000 5 DATA DS OCL 1 CCMMCN DATA AREA
cooooo 1 20C 6 HRSPK DC PL2*12.0* |XX|.XC|
C 000 0 2 3C0C 7 RATEPK DC PL2* 3.00• I X . X | XC I
000004 a *AGEPK DS PL 4

COOCO 8 0£30 1 0 BEGINA 8 ALR 3,0

11 USING *.3
12 USING DATA.4
0 GOO 0 A 5640 31E6 13 L 4,=A(DATA) DATA BASE REGISTER
14 OPEN PRTR
22 LOAD PHASB LOAD PHASB INTO STORAGE
000026 50 1 0 309A 28 ST 1 . ADDRESS SAVE ENTRY POINT TO PHASB
29 4 •
00002A F831 4004 4000 30 ZAP HAGEPK,HRSPK SET UP MULTIPLICAND IN PfiOC
31 4 •
000030 4 100 3052 22 LA 13,SAVEA LOAD ADDRESS OF SAVEAREA
000034 5EF0 30 9A 33 L 15.ADDRESB LOAO ADORESS OF PHASB
34 C ALL <151 LINK TO PHASB ENTRY POINT
37 4 •

38 4 •
39 4 •
40 LOAD PHASC
000042 1 8F1 LOAD PH AS C INTO STORAGE
46 LR 15.1
000044 4 IDO LOAO PHASC ENTRY POINT
3052 47 LA 13.SAVEA
LOAD ADDRESS OF SAVEAREA
48 CALL < 15)
LINK TO PHASC ENTRY POINT
51 4 •
52 4 •
53 CLOSE PRTR
61 EGJ

00005C 65 SAVEA DS 18F

0000A4 SAVE AREA FOR THIS PHASE
66 ADDRESB DS F
ADDRESS OF PHASB ENTRY

68 PRTR DTFPR BLKSIZ£=121.

♦
CTLCHR=YES.
♦
DEVADOR = S YSLS T.
+
0EVICE=14O3,
♦
IOAREAl=IOAfiPRTl
♦
IOAREA2=IOARPRT2
+
RECFORM=FIXUNB.
♦
I0fiEG=I5>

0C00D8 90 IOARPRT1 DS CL 12 1
000151 91 BUFFER-1 PRINTER FILE
IOARPRT2 DS CL 12 1
92 BUFFER-2 PRINTER FILE
ENTRY PRTR
C001DC 93 LTORG
0001 DO 5B5BC2D6D7CSD540 94 =C•$iBOPEN •
000108 D7C8C1E2C2404040 95 = CL8•PHASB •
0001E0 D7C8C1E2C3404040 96 = CL8•PHASC•
0001E8 5E5BC2C3D3D6E2C5 97 =C•$ SBCLOSE•
0001FO 00000000 98 =A(OATA)
99 END BEGINA

FIGURE 15-5 Linkage between three phases.

335 Linking Phases

PHASE PMASB.*
// EXEC ASSEMBLY

000000 2 DATAB OSECT • COMMON OATA

oooooo OOOC 3 HRSPK OC PL 2*0* |xx|.xc |
000002 OOOC 4 WAT E PK DC PL 2 • 0 • 1 X . X1 xc j
000004 5 WAGEPK- DS PL4

OOOOOO 7 PRCGB CSECT

8 BEG INB SAVE (14.12) SAVE REGISTERS IN SAVEA
000004 0530 1 1 B ALR 3.0 INITIALIZE PROG 8 BASE REG
12 USING *.3
1 3 USING DATAB,4

000006 5000 3022 15 ST 1 3 , S A VE 844 SAVE ADDRESS OF SAVEA

0 000 0A 1 6CD 16 LR 12.13
oooooc 4100 301E 17 LA 13.SAVES
000010 500C 0008 18 ST 13.8(12) STORE ADORESS OF SAVES
19 ♦ •
0000 14 FC31 4004 4002 20 HP WAGEFK.RATEPK MULT HOURS X RATE
2 1 * •
22 * •
00001 A 58D0 3022 23 L 13 .SAVEB + 4 LOAD ADDRESS OF SAVEA
24 RETURN <14,12) RETURN TO PROGA

000024 29 SAVES DS 18F PROGB SAVEAREA

30 ENO BEGINB

PHASE PHASC1PHAS8
// EXEC ASSEMBLY

COOOOO OATAC DSECT • COMMON DATA AREA

OOOOOO OOOC 3 HRSPK OC PL 2 • 0 * |XX|.XC|
000002 OOOC 4 RATEPK OC PL2•0* 1 X . X | xc 1
000004 5 WAGEPK DS PL 4

OOOOOC 7 FROGC CSECT

a beginc SAVE (14.12) SAVE REGISTERS IN SAVEA
000004 0530 1 1 B ALR 3,0 INITIALIZE PROG C BASE REG
12 USING *.3
13 USING DATAC,4

000006 5000 303E 15 ST 13.SAVEC+4 SAVE ADORESS OF SAVEA

0 0 00 0 A 1 BCD 16 LR 12.13
OOOOOC 4100 30 3 A 17 LA 13.SAVEC
0000 1 0 5 CDC 0008 18 ST 13.8(12) STORE ADORESS OF SAVEC
19 * •
20 4 •
0000 1 4 9209 3082 21 MV I PRINT.X*C9*
ooooie D2C9 308C 3 1 06 22 MVC PRINT410(10),= X*40202021204B20202060•
OOOOlE OE09 30 8 C 4004 23 EO PRINTFIO(IO).WAGEPK
000024 0276 5000 3082 24 MVC 0( 12 1,5).PRINT
25 PUT PRTR PRINT WAGE
30 * •
5800 303E 31 L 13.SAVEC 44 LOAD ADDRESS OF SAVEA
000036
32 RETURN (14.12) RETURN TO PROGA

000040 37 SAVEC OS 18F PROGC SAVEAREA

ooooee 404C404040404040 38 PRINT OC CL 12 1* *

40 EXTRN PRTR

oooice 4 1 LTORG
00000000 42 =A(PRTR)
000106
43 = X • 40202021204B20202060 •
0001OC 40202021204B2020

00000 45 END BEGINC

FIGURE 15-5 (Continued)

336 SUBPROGRAMS AND OVERLAYS

// EXEC LNKEDT Relocation factor

PHASE XFR-AC LOCQRE HICORE DSK-AD ESO TYPE loaded REL-FR

ROOT oc acac oca o/a 0DA2CF 001 05 01 CSECT 0DA078 ODAC 78

ENTRY ODA120

CSECT 0DA270 0DA270

0DA2D0 CCA2DO 0DA33B 001 05 02 CSECT 0DA2D0 ODA2DO

OCA2DC CCA2C0 0DA3E5 001 05 03 CSECT C"PROGC~^ 0DA2D0 ODA2DO

FIGURE 15-5 (Continued)

PHASE name,ROOT: The name phase is the root phase, to be always in storage
during execution of the program. Only the first phase may be ROOT. Under a
simple operating system, the root phase begins at a doubleword address im¬
mediately following the Supervisor. In a multiprogramming system, the root
phase loads at the beginning of a partition.
PHASE name,*: The * references the Linkage Editor location counter (similar to that
of the Assembler). If not the first phase, the Linkage Editor assigns it to begin at a
doubleword address following the previous phase. If the first phase, it is assigned
a starting location like the root phase.
PHASE name,symbol: We may instruct the Linkage Editor that at execute-time this
phase is to be overlaid in storage beginning at the same address as a previously
defined phase.

In Figure 15-5 there are three phases. They are organized as follows:

Supervisor

main PROGA root phase

storage
PROGB PROGC overlay phases

The PHASE cards are:

PHASE PROGA, ROOT defines PROGA as the root phase, always in storage during
execution.
PHASE PROGB,* tells the Linkage Editor to begin the phase PROGB following the
previous phase (PROGA).
PHASE PROGC,PROGB tells the Linkage Editor to assign the phase PROGC to begin
at the same storage location as PROGB (an overlay).

THE LOAD AND FETCH MACROS. These macros are used to load a phase into
storage during program execution.
337 Linking Phases

NAME OPERATION OPERAND

Inamel LOAD phasename or (1)

[name] FETCH phasename or (1)

THE LOAD MACRO. The operand contains the name of the phase to be loaded.
We may use the phase name or load the phase name into register-!. LOAD causes
the phase to load into storage and returns control to the calling phase. LOAD also
stores in register-! the entry point address of the called phase. This address is re¬
quired because we later use it to CALL the overlay phase for execution. LOAD should
be placed so that the overlay phase does not erase it.

THE FETCH MACRO. The operand contains the name of the phase to be loaded.
We may use the phase name or load the phase name into register-1. FETCH loads the
phase into storage and branches to its entry point address. In effect, FETCH acts as a
combined LOAD and CALL, but with no automatic return.

THE LINKAGE EDITOR MAP. In Figure 15-5, each phase name begins with the
same first four characters, PROG. At the end of the sample program is the Linkage
Editor Map. We cause this map to print with the DOS control statement ACTION
MAP. The map lists the starting address of each phase and CSECT in the program. In
large programs, the map is a useful debugging and tracing device.
The CSECT beginning IJD in the Linkage Editor Map represents the module
that IOCS generated for the DTFPR macro for the fi le PRTR in the program. The module
is called PRMOD. Details are in the IBM Supervisor and I/O Macro manual.
Other DOS modules include the following:

DEVICE DTF MACRO IBM MODULE

Card DTFCD CDMOD IJCxxxxx

Printer DTFPR PRMOD IJDxxxxx
Magnetic Tape DTFMT MTMOD IJFxxxxx
Sequential Disk DTFSD SDMOD IJGxxxxx
Indexed Seq'l DTFIS ISMOD 1J H xxxxx
Direct Access DTFDA DAMOD IJIxxxxx

OVERLAY PROGRAM. Figure 15-5 illustrates a simple overlay program that links
three phases. The first phase initializes hours (HRSPK) in a product field (WAGEPK)
and links to the second phase. This phase multiplies hours by rate-of-pay (RATEPK) to
calculate wage, and returns to phase-1. Next, phase-1 loads phase-3 over phase-2,
and links to phase-3, which prints the wage.
338 SUBPROGRAMS AND OVERLAYS

DETAILED EXPLANATION. After assembly and link edit, the // EXEC card loads the
first phase, PHASEA, into storage. The first statements define the common data area.
At BEGINA, base register-3 for the program and register-4 for the common data area
are loaded. Then LOAD causes PHASB, the second phase, to load into storage,
following PHASA. LOAD also places in register-1 the address of the entry point to
PEHASB. The program stores this entry point in ADDRESB for later use. The program
then initializes WAGEPK with HRSPK, and links to PHASB.
PHASB saves the registers of PHASA and initializes its own registers. Then it
multiplies WAGEPK by RATEPK (DSECT entries, defined in PHASA), and returns to
PHASA.
PHASA next loads and links to PHASC, which saves the registers, prints
WAGEPK, and returns to PHASA. At this point, PHASA, and the program, terminate.

Note: PHASA contains definition of the DTFPR macro, PRTR, which

PHASC also uses. The Assembler instruction ENTRY PRTR makes PRTR
known outside PHASA. In PHASC, EXTRN PRTR tells the Assembler that
PRTR is defined outside this phase. The Link Editor completes the address
linkage.

Under OS, the relative location of each CSECT appears in the "CROSS REFER¬
ENCE TABLE" following the last assembled CSECT. Look for "CONTROL SECTION"
that could appear with such entries as:

CONTROL SECTION
NAME ORIGIN LENGTH
PHASA 00
PHASB 6D8
PHASC 6D8

If the entry-point addresss (EPA) of the first CSECT, PHASA, is 99080, then the
entry-point of both PHASB and PHASC in this case is:

EPA of PHASA 99080

Origin of PHASB & PHASC 6D8
EPA of PHASB & PHASC 99758

Any field can be found in a storage dump through use of the EPA plus the
contents of the location counter (LOC) on the program printout.
Note also that execution diagnostics show the contents of the registers under
"SA" (save area) in the same 18 fullword format as explained in this chapter.

OVERLAY CONSIDERATIONS

LOAD brings a phase into storage, where it remains until overlaid by another phase.
Therefore, once we LOAD a phase, we may CALL it any number of times. To load
339 Problems

and immediately execute a phase once, we may use FETCH. If there is insufficient
storage, large programs may require loading and reloading phases as needed. A
common use of overlays is the following:

1. The ROOT phase contains all common declaratives and basic main logic. It loads
(or fetches) the initialize phase.
2. The initialize phase contains routines executed only once, such as OPEN files,
handle date card, and extract the date from the communications region.
3. The ROOT phase then overlays the initialize phase with the general processing
phase, which includes calculations, and input/output. (Storage restrictions may
require overlaying some of these phases as required.)
4. At the end of the run, the ROOT phase overlays the general processing phase with
an end-of-file phase. This phase includes final totals and CLOSEs the files.

There are countless ways to handle program overlays. However, in all pro¬
gramming problems, the simplest way is generally the best way. And simpler may
include dividing a problem not into phases but into completely separate programs.

The remaining problems should now be attempted.

PROBLEMS

15-1. For what reasons would it be useful to organize a program into subprograms?
15-2. What is the difference (if any) between a CSECT and a DSECT?
15-3. USING tells the Assembler to apply a base register to a particular section of
code. What instruction tells it to discontinue applying the base register?
15-4. Recode and test a previous program using Locate Mode for input and output,
with buffers defined under a DSECT.
15-5. Why is it an especially dangerous practice to use register-13 as a base reg¬
ister?
15-6. For subprogram linkage, what is the purpose of registers 0, 1, 1 3, 14, and 15?
15-7. What are the three macros, and their purpose, required to link to another
subprogram, to preserve register contents and to return?
15-8. Revise and test any previous program into two separately assembled CSECTS.
Use a DSECT for common data.
15-9. Revise problem 15-8, changing the common data from a DSECT to passing
parameters.
15-10. What is the difference between the LOAD and CALL macros? Between
LOAD and FETCH?
15-11. Revise any previously written program into 4 phases. Phase-1 (ROOT) calls
Phase-2 for initialization and OPEN. Phase-1 then overlays Phase-2 with
Phase-3 for processing. At end-of-job, Phase-1 overlays Phase-3 with
Phase-4 for final processing.
 CHAPTER 1 6

OPERATING SYSTEMS

The topic of operating systems is large and complex. This chapter introduces material
that is useful for advanced Assembler programming. The first section examines gen¬
eral operating systems and its various support programs, including the Assembler and
the Linkage Editor. The following sections examine the functions of the Supervisor,
the Program Status Word, and the interrupt system. Finally, there is a discussion of
channels, Physical IOCS, the channel program, and the input/output system.
A knowledge of these features can be a useful asset when serious bugs occur
and where the solution requires a more intimate knowledge of the system. For the
serious student, these topics are a useful introduction to systems programming and
the relationship between the computer hardware and manufacturer-supplied
software.

OPERATING SYSTEMS

IBM supplies various programs ("software”) to support the computer system. These
include language translators such as Assembler, COBOL, and PL/I, and "utility”
programs to facilitate disk and tape processing. The levels of programming support

340
341 Operating Systems

depend on the size of the CPU and the needs of the user. Among the categories of
support are Basic Programming Support (BPS) for the minimum card, tape and disk
installations, and operating systems.
On earlier and on smaller computers the operators were very much involved in
operating the computer. For example, to assemble and execute a program, the oper¬
ator would have done the following:

— Load the Assembler translator program into storage.

— Load the source program into storage for translation into machine language object
code onto punched cards.
— Load the punched object program into the computer storage.
— Load the data into storage for the object program to execute.

Each step is separate, time-consuming and prone to errors. In a large system

such operator intervention is too costly. Therefore, operating systems were devised
to minimize operator intervention in the processing of programs. An operating sys¬
tem is a collection of related programs that provides for the preparation and execu¬
tion of our programs. The operating system is stored on disk or tape, and part of it, the
Supervisor program, is kept in the lower part of main storage. Under a typical operat¬
ing system we provide job control cards to tell the system what we want it to do. For
example, we may want to assemble and execute a program. In simple terms the
operating system could work as in Figure 16-1.

FIGURE 16-1 Job control for an operating system.

1 Preceding the job is a job control card that tells the operating system to assemble
' a program. The Assembler program is stored (catalogued) in a library on disk. The
system loads the Assembler program from the disk library into storage.
342 OPERATING SYSTEMS

2. The Assembler reads and translates the source program. It writes the object pro¬
gram onto another library on disk.
3. Following the source program is a job control card telling the system to execute
the assembled object program. The system then loads the object program from the
disk library into storage.
4. The program executes the data.
5. Following the data is a job card telling the system that there is no more data. The
operating system is now ready to process the next job.

An operating system involves little manual operating, but a complex system is

required to perform the preceding and other necessary tasks. There are various
operating systems, depending on the user's requirements. They differ in services
offered and the amount of main storage they require. The systems include:

SYSTEM TYPICAL USER

Basic Operating System BOS Smaller systems
Disk Processing System DPS Smaller systems with disk
Tape Operating System TOS Medium systems with tape
Disk Operating System DOS Medium systems with disk
Disk Operating System DOS/VS Medium systems with "virtual storage"
360 Operating System OS/MFT Large 360, "Fixed number of Tasks"
360 Operating System OS/MVT Large 360, "Variable number of Tasks"
370 Operating System OS/VS1 Large 370, equivalent to OS/MFT
370 Operating System OS/VS2 Large 370, equivalent to OS/MVT

The computer central processing unit (CPU), main storage, and input/output
devices are called the hardware. IBM "customer engineers" install the hardware and
service breakdowns. The operating system is a group of IBM-supplied programs, and
is called software. IBM "system engineers" help install and maintain the software.
Large installations have their own "systems programmers" who are responsible for
maintaining these complex operating systems. An operating system is composed of
several interrelated parts. Disk Operating System (DOS), on which this text is mostly
based, is organized as in Figure 16-2. The three main parts are Control Program
System Service Programs, and Processing Programs.

CONTROL PROGRAM. The control program controls all other programs that are
processed. It consists of the Supervisor, Job Control, and Initial Program Load. Under
OS, the functions are Data Management, Job Management, and Task Management.
The Supervisor is the nucleus of the operating system. At all times part of the
Supervisor resides in lower storage. The system loads user programs (ours) in storage
after the Supervisor area. Therefore there are always two (or more) stored programs in
storage: the Supervisor program and our program(s). Only one is executed at one
time, but control passes between them. The Supervisor's functions include the han-
343 Operating Systems

Disk operating system

Control program System service programs Processing programs

Supervisor Job IPL Linkage Librarian Translators Utility User

control editor programs programs

Source Relocatable Core

statement library image
library library

FIGURE 16-2 Disk operating system organization.

dling of "interrupts" (such as our program asking to use an input or output device),
fetching required routines from the program library, and handling program execution
errors. An important part of the Supervisor is the Input/Output Control System (IOCS)
to handle the complex input/output. IOCS handles such items as checking for valid
tape and disk files, and data transfer between I/O units and storage. A later section
covers the Supervisor in detail.

Storage:

IBM
Supervisor
Program

User
Program(s)

lob Control handles the transition between jobs run in the system. When
required, the Supervisor loads job control into storage. We provide job control cards
with our job to tell the system what we want to do next.
Initial Program Load (IPL) is a program that the operator uses to load the
Supervisor into storage (done daily or whenever required).

SYSTEM SERVICE PROGRAMS. These include the Linkage Editor and the Libra¬
rian.

THE LINKAGE EDITOR. The Linkage Editor has two main functions:
344 OPERATING SYSTEMS

1. IOCS is composed of complex input/output routines. We store (catalogue) these

in the library (covered next). We do not code a program with the complete
input/output operations. The Linkage Editor includes the required IOCS routines
after the program is assembled.
2. We may code a program in more than one section, and then assemble each
section separately. These assembled sections may then be link-edited into one
program. The Linkage Editor links the programs together and enables data in one
section to be recognized in another section (covered in Chapter 15).

THE LIBRARIAN. The operating system contains libraries on disk or tape to store or
catalogue IBM and our own commonly used programs and routines. Under the Disk
Operating System (DOS), there are three libraries:

1. The Source Statement Library (SSL) catalogues any program or routine still in
source code. We use instructions, such as COPY, to include the catalogued
source code into our program for subsequent assembling.
2. The Relocatable Library (RL) catalogues frequently used routines such as IOCS.
The routines are stored in assembled format not yet ready for execution. We use
the instruction INCLUDE to tell the Linkage Editor to include such routines in with
our assembled program.
3. The Core Image Library (CIL) contains programs and routines in executable for¬
mat, ready for execution. The CIL contains, for example, Assembler, PL/I,
COBOL, and other translator programs, and the various utility programs such as
Sort. We use the job control card EXEC to request the Supervisor to load a
program from this library into main storage for execution.

The OS libraries equivalent to DOS Source Statement, Relocatable, and Core

Image libraries are Source Library, Object library, and Load library.

PROCESSING PROGRAMS. Processing programs are stored (catalogued) on disk or

tape. They are classified into three groups:

1. Language Translators supplied by IBM with the system include Assembler, PL/I,
Fortran, COBOL, RPG, and ALGOL.
2. Utility Programs supplied by IBM include various utility and special purpose
programs, such as copy disk to printer, disk initialization, and various sort/merge
programs.
3. User-Written Programs are written by the user (us) and are not maintained or
supported by IBM. All examples in this text are user-written programs.

THE SUPERVISOR

The size of the operating system and of the Supervisor vary considerably according to
their complexity and functions they must perform. A medium-sized Supervisor under
345 The Supervisor

DOS typically requires some 10,000 bytes of main storage, whereas under a large
system the Supervisor often requires over 100,000 bytes.
Although the Supervisor program resides permanently in lower main storage,
the first section up to X'200' is allocated for use by the CPU. These "Fixed Storage
Locations" are listed in Figure 16-3. Some of the locations are explained in the later
section, Program Status Word.

FIXED STORAGE LOCATIONS

Area, Hex EC
dec. addr only Function
0- 7 0 Initial program loading PSW, restart new PSW
8- 15 8 Initial program loading CCW1. restart old PSW
16- 23 10 Initial program loading CCW2
24- 31 18 External old PSW
32- 39 20 Supervisor Call old PSW
40- 47 28 Program old PSW
48- 55 30 Machine-check old PSW
56- 63 38 Input/output old PSW
64- 71 40 Channel status word (see diagram)
72- 75 48 Channel address vward [0-3 key, 4-7 zeros, 8-31 CCW address]
80- 83 50 Interval timer
88- 95 58 External new PSW
96-103 60 Supervisor Call new PSW
104-111 68 Program new PSW
112-119 70 Machine-check new PSW
120-127 78 Input/output new PSW
132-133 84 CPU address assoc'd with external interruption, or unchanged
132-133 84 X CPU address assoc’d with external interruption, or zeros
134-135 86 X External interruption code
136-139 88 X SVC interruption [0-12 zeros, 13-14 ILC. 15:0, 16-31 code]
140-143 8C X Program interrupt. [0-12 zeros, 13-14 ILC, 15:0, 16-31 code)
144-147 90 X Translation exception address [0-7 zeros, 8-31 address)
148-149 94 Monitor class [0-7 zeros, 8-15 class number)
150-151 96 X PER interruption code [0-3 code, 4-15 zeros]
152-155 98 X PER address [0-7 zeros, 8-31 address)
156-159 9C Monitor code [0-7 zeros, 8-31 monitor code)
168-171 A8 Channel ID [0-3 type, 4-15 model. 16-31 max. I0EL length]
172-175 AC I/O extended logout address [0-7 unused, 8-31 address)
176-179 B0 Limited channel logout (see diagram)
185-187 B9 X I/O address [0-7 zeros, 8-23 address]
216-223 D8 CPU timer save area
224-231 E0 Clock comparator save area
232-239 E8 Machine-check interruption code (see diagram)
248-251 F8 Failing processor storage address [0-7 zeros, 8-31 address]
252-255 FC Region code*
256-351 100 Fixed logout area*
352-283 160 Floating-point register save area
384 447 180 General register save area
448-511 ICO Control register save area
512* 200 CPU extended logout area (size varies)
•May vary among models; see system library manuals for specific model.
fLocation may be changed by programming (bits 8-28 of CR 15 specify address).

FIGURE 16-3 Fixed storage locations.

The Supervisor loads operating system routines stored on disk (usually) into
main storage as required. The section of storage that the Supervisor uses for tempor¬
ary routines is the "transient area". Figure 16-4 illustrates the layout of the Supervisor
in main storage (not an exact representation).
346 OPERATING SYSTEMS

CPU bytes Fixed storage locations

1. Communications region
2. Channel scheduler
Supervisor 3. Storage protection
resident 4. Interrupt handling
area 5. System loader
6. Error recovery routines
7. Program information block
8. I/O devices control table
Transient area 9. Transient area
Problem program(s)
FIGURE 16-4 Supervisor routines.

1. Communication Region. This area contains the current date as well as other fields
shown in the diagram. (There is one Communication region for each partition
under multiprogramming.)

CO
a_
ID Address: Address:
Address:
User Area - set to zero Uppermost Uppermost Length of
Date Uppermost
when JOB statement is Job Name Byte of Byte of Problem
Mo/Doy/Yr u Byte of
Reserved read. (Communication (Entered from Current phase with Program
or i Problem
within o job step or un Job Control) Problem highest Label
Day/ Mo/Y r E Program
between job steps) o Program ending Area
Area
Phase oddress
?
ci
Bytej 0 7 8 11 12 22 23 24 31 32 35 36 39 40 43 44 45

2. Channel Scheduler. The channels provide a path between main storage and the
input/output devices, and permit overlapping of program execution with I/O
operations. The Channel Scheduler routine handles all I/O. If the requested chan¬
nel, control unit, and device are available, the channel operation begins. If busy,
the Channel Scheduler places its request in a queue to wait until the device is
available. The channel notifies the Channel Scheduler when the I/O operation is
complete, or that an error has occurred (these are "I/O interrupts").
3. Storage Protection. Storage Protection is an optional feature that prevents the
problem program from erroneously moving data into the Supervisor area and
destroying it. Under a multiprogramming system, storage protection is required to
prevent a program in one partition from erasing a program in another partition.
4. Interrupt Handling. An interrupt is a signal that informs the system that special
action is required, to interrupt the program currently being executed, and to give
control to the appropriate Supervisor routine. This topic is covered in detail in the
next section, PSW.
5. System Loader. This routine is responsible for loading programs into main storage
for execution.
6. Error Recovery. For each I/O device (or class of devices) there is a special routine
to handle device error-recovery. When an error is sensed, the Channel Scheduler
invokes the required routine which attempts to correct the error.
347 The Program Status Word—PSW

7. Program Information Block (PIB). The PIB contains information tables required by
the Supervisor about the current program(s) in storage.
8. I/O Devices Control Table. This area contains the table of I/O devices that relate
physical unit addresses (X'nnn') with logical units (SYSxxx).
9. Transient Area. This area provides temporary storage for routines that the Super¬
visor loads as required: OPEN/CLOSE, DUMP, computer operator messages,
end-of-job handling, some error recovery, and "checkpoint" routines.

THE PROGRAM STATUS WORD—PSW

The PSW is a doubleword of data stored in the control section of the CPU. (On small
models, the PSW is only a fullword in length, and its format differs from that de¬
scribed here; its functions, however, are similar.) The PSW controls an executing
program and indicates its status. There are two PSW modes that provide control and
status information: Basic Control (BC) mode and Extended Control (EC) mode. Both
the 360 and 370 use BC mode, and the mode is indicated by a 0 in the PSW bit-12.
EC mode is available only on the 370 for "virtual storage", with the "extended-
control" facility. When in EC mode, PSW bit-12 contains a 1. For each mode the
PSW format is the same in only certain positions. The charts next show the two
modes (bits are numbered from left to right zero through 63):

PROGRAM STATUS WORD (BC Mode)

Protect'n
Channel masks E CMWP Interruption code
key

0 6 7 8 11 12 IS 16 23*24 31

Program
ILC CC Instruction address
mask
32 34 36 39 40 7^48 sICT S3
0-5 Channel 0 to 5 masks 32-33 (ILC) Instruction length code
6 Mask for channel 6 and up 34-35 (CC) Condition code
7 (E) External mask 36 Fixed-point overflow mask
12 (OOI Basic control mode 37 Decimal overflow mask
13 (M) Machine-check mask 38 Exponent underflow mask
14 (W«1) Wait state 39 Significance mask
15 (P—1) Problem state

PROGRAM STATUS WORD (EC Mode)

Protect'n Program
0R00 0TIE CMWP 00 CC 0000 0000
key mask
o 7 8 11 12 IS 16 18 20 23 24 31

0000 0000 Instruction address

32 39 40 47*48 5S66 63
1 (R) Program event recording mask 15 (P=1) Problem state
5 (T=1) Translation mode 18-19 (CC) Condition code
6 (I) Input/output mask 20 Fixed-point overflow mask
7 (E) External mask 21 Decimal overflow mask
12 (C— 1) Extended control mode 22 Exponent underflow mask
13 (M) Machine-check mask 23 Significance mask
14 (W=1) Wait state

Fields that programmers may find useful include:

348 OPERATING SYSTEMS

Bit 15: State. In both modes, 0 = Supervisor state and 1 = Problem state (the
computer always functions in one or the other state). When the computer is
executing the Supervisor program, the bit is 0, and all instructions are valid.
When in the Problem state, the bit is 1, and certain privileged instructions (such
as Start IO and Load PSW) cannot be executed.
Bits 16-31: Program Interrupt Code (BC mode only). The computer sets these bits
according to the type of program interrupt when one occurs. The following list
of interrupt codes shows the hex representation of the 16-bit code:

PROGRAM INTERRUPTION CODES

0001 Operation exception 000C Exponent overflow excp
0002 Privileged operation excp OOOD Exponent underflow excp
0003 Execute exception OOOE Significance exception
0004 Protection exception OOOF Floating-point divide excp
0005 Addressing exception 0010 Segment translation excp
0006 Specification exception 0011 Page translation exception
0007 Data exception 0012 Translation specification excp
0008 Fixed-point overflow excp 0013 Special operation exception
0009 Fixed-point divide excp 0040 Monitor event
000A Decimal overflow exception 0080 Program event (code may be
OOOB Decimal divide exception combined with another code)

Bits 34-35: Condition Code (BC mode only. Under EC mode, the Condition code is
in bits 18-19). Certain arithmetic and logical instructions set this code.
Bits 40-63: Instruction Address (both modes). This area contains the address of the
next instruction to be executed. The CPU accesses the designated instruction
from main storage, decodes it in the control section, and then executes it in the
arithmetic/logical section. The first two bits of every machine code instruction
indicate its length. Assume an RR-format instruction, two bytes long; when
executing the RR instruction, the CPU increments the instruction address in the
PSW by two, and this now indicates the address of the next instruction. In the
case of a "branch'' instruction, the branch address may replace the PSW instruc¬
tion address.

INTERRUPTS

An interrupt occurs when it is necessary for the Supervisor to perform some special
task. There are six main classes of interrupts:

Program Interrupt. This is caused by an operation that the computer cannot

execute, such as an attempt to perform arithmetic on invalid arithmetic data. This
is the common type of interrupt when a program terminates abnormally (some-
imes called "bombing"). Appendix B lists the various types of program interrupts
that can occur during execution.
Supervisor Call Interrupt. A transfer from the Problem program to the Supervisor
requires a Supervisor Call" (SVC) operation and causes an interrupt. For exam-
p e, our program may issue a request for input/output or to terminate processing
Control is passed to the Supervisor by means of a Supervisor Call (SVC). §
349 Interrupts

3. External Interrupt. An external device may need attention. For example, the com¬
puter operator may press the request key on the console typewriter, or there may
be a request for telecommunications.
4. Machine Check Interrupt. The machine-checking circuits may detect a hardware
error, such as a byte not containing an odd number of bits (odd parity).
5. Input/Output Interrupt. Completion of an I/O operation making the unit available
or malfunction of an I/O device (such as damaged tape) cause this interrupt.
6. Restart Interrupt on the 370 permits the operator or another CPU to invoke
execution of a program.

For every interrupt, the system alters the PSW as required, and stores the PSW
in a Fixed Storage Location, where it is available to any program for testing.
The PSW referenced to this point is often called the “current" PSW. When an
interrupt occurs, the computer stores the current PSW and loads a “new” PSW that
controls the new program (usually the Supervisor Program). The current PSW is in the
control section of the CPU, but the “old" and “new" PSW's are stored in main
storage.

Main storage

The interrupt replaces the current PSW: (1) It stores the current PSW into main
storage as the "old" PSW, and (2) It fetches a “new" PSW from main storage, to
become the “current" PSW. (The old PSW will therefore contain in its instruction
address the location following the instruction that caused the interrupt.) The com¬
puter stores PSW's in 12 doubleword locations in Fixed Storage; six are for “old"
PSW's and six for “new" PSW's, depending on the class of interrupt:

OLD PSW NEW PSW OLD PSW NEW PSW

Restart 0008 0000 Program 0040 0104

External 0024 0088 Machine 0048 0112
Supervisor 0032 0096 Input/Output 0056 0120

The following illustrates the sequence of events following a Supervisor inter¬

rupt. Assume that the Supervisor has stored in each of the six new PSW's the address
of each of its interrupt routines (the old PSW's are not yet required). Remember also
that when any instruction executes, the computer updates the current PSW—the
Instruction Address, and the Condition Code as required.
350 OPERATING SYSTEMS

1. Assume that our program requests input from disk. The input macro-instruction,
GET or READ, contains a Supervisor Call to link to the Supervisor for I/O. This is a
Supervisor interrupt.
2. The Instruction Address in the current PSW contains the address in our program
immediately following the SVC that caused the interrupt. The CPU stores this
current PSW in the old PSW for Supervisor interrupt, location 32. The new PSW
for Supervisor interrupt, location 96, contains Supervisor state bit = 0 and the
address of the Supervisor Interrupt routine. The CPU moves this new PSW to the
current PSW, and is now in Supervisor state.
3. The PSW Instruction Address contains the address of the Supervisor I/O routine,
which now executes. The Channel Scheduler requests the channel for disk input.
4. To return to our program, the Supervisor loads the old PSW from location 32 back
into the current PSW. The instruction "goes to" the PSW instruction address,
which is the address in our program following the original SVC that caused the
interrupt. The system switches from Supervisor back to Problem state.

In the case of a program check interrupt, the computer sets the cause of the
program check in PSW bits 16-31, the Program Interrupt code. If the Problem pro¬
gram attempts arithmetic on invalid data, the computer senses a "Data Exception,"
and stores X'0007' in PSW bits 16-31 (i.e., B'l 1 V in bits 29-31). The computer then
stores the current PSW in old PSW location 0040, and loads the new PSW from 0104
into the current PSW. This PSW contains the address of the Supervisor s Program
Check routine, which tests the old PSW to determine which type of program check
caused the interrupt.
The Supervisor prints the contents of the old PSW in hexadecimal and the cause
of the program check, "DATA EXCEPTION", "flushes" the interrupted program, and
begins processing the next job. Suppose that the invalid operation is an MP at
location X'6A320'. Since MP is six bytes long, the instruction address in the PSW and
the one printed will be X'6A326'. We can tell from the Supervisor diagnostic mes¬
sage first, that the error is a "Data Exception", and second, that the invalid operation
immediately precedes the instruction at X'6A326'.

CHANNELS

On the 360/370, channels direct data between devices and main storage. A channel
is a component that functions as a separate computer operated by "channel com¬
mands" to control input/output devices. Channels permit attaching a great variety of
I/O devices. There are two types of channels:

1. The multiplexor channel is designed to handle low-speed devices, such as card

printer, and terminals. It permits simultaneous operation of more than one device'
There is typically only one multiplexor channel on a system, although some 370's
have more than one.
351 Channels

2. The selector channel is designed to handle high-speed devices, such as magnetic

tape and disk. However, data can be transferred from only one device at a time
(burst mode). Depending on the model, there may be up to six selector channels.

Each channel has a four-bit address:

CHANNEL ADDRESS TYPE CHANNEL ADDRESS TYPE

0 0000 Multiplexor 4 0100 ) Selector

1 0001 ) 5 0101 J channels
2 0010 f Selector 6 0110 )
3 0011 \ channels

To interface a device with a channel requires a control unit. Since many

devices may be attached, the control unit is specific to the device. For example, a
magnetic tape control unit connects tape drives with a selector channel. The control
unit also has a 4-bit address. Further, each device has a 4-bit address, and is known
to the system by a physical address—a 12-bit code that specifies channel/control
unit/device, as OCCC UUUU DDDD (C = channel, U = control unit, D = device).
This physical address permits the attaching of 28 or 256 devices. Figure 16-5 illus¬
trates one possible configuration.
For example, a printer device number is 1110, and is attached to channel 0,
control unit 1. To the system, the physical address of the printer is 0000 0001 1110,

FIGURE 16-5 Channels and I/O devices.

352 OPERATING SYSTEMS

or X'01 E'. Assume that the two disk devices are numbered 0000 and 0001; if they are
both attached to channel 1, control unit 9, their physical addresses are respectively
X'l90' and X'191'.

SYMBOLIC ASSIGNMENTS. Although the Supervisor references I/O devices by

their physical numbers, our programs use symbolic names. We can assign a symbolic
name "permanently" or temporarily to any device, and a device may have assigned
more than one symbolic name. The system control program uses certain names,
called system logical units, including the following:

SYSIPT The card reader, tape, or disk device used as input for programs.
SYSRDR The card reader, tape, or disk device used as input for job control for the
system.
SYSIN The system name to assign both SYSIPT and SYSRDR to the same card
reader, tape, or disk device.
SYSLST The printer, tape, or disk used as the main output device for the system.
SYSPCH The card punch, tape, or disk used as the main device for "punching."
SYSOUT The system name to assign both SYSLST and SYSPCH to the same tape
device.
SYSLNK The disk area used as input for the Linkage Editor.
SYSLOG The console typewriter (or printer) used by the system to log operator
messages and job control statements.
SYSRES The disk or tape device where the operating system resides.
SYSRLB The devices for the relocatable and system libraries.
and
SYSSLB

In addition, there are programmer logical units, SYS000 - SYSnnn. A user may
assign any valid symbolic name to a device, such as assigning a disk drive, physical
address X'l60', with a logical address SYS002. The Supervisor stores these physical
and logical addresses in a table in order to relate them. The table is called I/O
Devices Control Table, and in simplified form could contain the following:

I/O DEVICE PHYSICAL ADDRESS_ LOGICAL UNIT(S)

card reader X00C’ SYSIPT, SYSRDR

printer X00E’ SYSLST
disk drive XI60’ SYSLNK, SYSRES, SYS002
tape drive X‘280’ SYS026, SYS035

Lor example, a reference to SYSLST is to the printer, and the disk device
X'l 60', is known as SYSLNK, SYSRES, and SYS002, depending on its particular use!
We may assign a logical address permanently or temporarily, and may change
353 Physical IOCS

logical addresses from job to job. For instance, we could use an ASSGN job control
statement to reassign SYS035 from tape output for a program to disk output on
X'l 60'.

PHYSICAL IOCS

The basic level of IOCS provides for channel scheduling, error recovery, and inter¬
rupt handling. We must write the “channel program" (the Channel Command
Word), and synchronize the program with completion of the I/O operation. We must
also provide for testing the Command Control Block for certain errors, checking
wrong-length records, switching between I/O areas where two are used, and, if
records are blocked, for blocking and deblocking. PIOCS macros include CCW,
CCB, EXCP, and WAIT.

[name] CCW Command code, Data address, Flags, Count field

Blockname CCB SYSnnn, Command-list-name
[name] EXCP Blockname or (1)
[name! WAIT Blockname or (1)

CHANNEL COMMAND WORD—CCW. The CCW instruction causes the Assem¬

bler to construct an 8-byte Channel Command Word that defines the I/O command
to be executed.

Command code—Defines the operation to be performed, such as 1 = Write, 2 =

Read, X'09' = Print, and space one line.
Data address—The storage address of the first byte where data is to be read or
written.
Flags—When the channel completes an operation defined in a CCW, it determines
its next action from these flag bits, and we can set flag bits to '1' to vary the
channel's operation (explained in detail later).
Count field—An expression that defines the number of bytes in the data block that is
to be processed.

COMMAND CONTROL BLOCK—CCB. There must be a CCB for each I/O device
that PIOCS macros reference. The CCB comprises the first 1 6 bytes of most generated
DTF tables. The CCB communicates information to PIOCS to cause required I/O
operations, and receives status information after the operation.

Blockname—The symbolic name associated with this CCB, used as an operand for
the EXCP and WAIT macros.
SYSnnn—The symbolic name of the I/O device associated with this CCB.
Command-list name—The symbolic name of the first CCW used with the CCB.
 354 OPERATING SYSTEMS

THE EXECUTE CHANNEL PROGRAM (EXCP) AND WAIT MACROS. The operand
of both EXCP and WAIT gives the symbolic name of the CCB macro to be referenced.
The EXCP macro requests Physical IOCS to start an I/O operation, and PIOCS relates
the blockname to the CCB to determine the device. When the channel and the
device become available, the channel program is started. Program control then
returns to our program. The WAIT macro synchronizes program execution with
completion of an I/O operation, since the program normally requires its completion
before it can continue execution. For example, we have issued EXCP to read a data
block—we must now WAIT for delivery of the entire data block before we can begin
processing it. (When bit-0 of byte-2 of the CCB for the file is set to 'V, the WAIT is
completed and processing continues.)

EXAMPLE PHYSICAL IOCS PROGRAM. Figure 16-6 simply generates and prints
the sum of the digits from 1 through 10, i.e., 1 + 2 + 3+ ... + 10. The program
prints successively 1, then 3, then 6, etc., and terminates after the tenth calculation
with 55. Note that the operands of both EXCP and WAIT specify PRTR, the name of
the CCB. Operand-2 of the CCB designates PRCOMWD, the name of the CCW.

PHYSIO START 0
6 ALR 3.0
USING * .3
LA 8.10 ESTABLISH COUNT OF 10

A 1 OLGOP AP SUM,0ICIT ADD DIGIT TO SUM

AP DIGIT,=P>1• INCREMENT DIGIT BY 1
UNPK PRINT+21131.SUM UNPACK SUM INTO PRINT
0 I PRINT+23,X*F0* SET ZONE SIGN TO X'F*

EXCP PRTR EXECUTE PRINT COMMAND

WAIT PRTR WAIT FOR COMPLETION

BCT 8.A 1OLOOP DECREMENT COUNT, LOOP IF NON

EQ J
TERMINATE IF ZERO

*** CECLARATIVES »•*

PRINT DC CL 120* • PRINT AREA
PRTR CCB SYSLST,PRCOMWD COMMAND CONTROL BLOCK

P R COM ^ D CCW X*09*.PRINT.X*20*.120 CHANNEL COMMAND WORD

DIGIT cc PL2•1•
SUM DC PL2•0•
SUM-OF-DIGITS ACCUMULATOR

END PHYSIO

FIGURE 16-6 Example physical IOCS program.

CCW FLAG BITS. The flag bits in the CCW may be set and used as follows:

Blt 3^S/htm Data fla§Sby X 80 • This bit sPecif'es "data chaining". When the
CCW has processed the number of bytes defined in its Count field the I/O
operation does not terminate if this flag bit is set. The operation continues with
355 Problems

the next CCW in storage. We can use data chaining to read or write data into or
out of storage areas that are not necessarily adjacent. In the following three
CCW's, the first two specify data chaining with X'80' in the Flag bits, operand-3.
An EXCP and CCB may then reference the first CCW, and as a result, the chain
of three CCW's causes the contents of an 80-byte input record to be read into
three separate areas in storage—20 bytes in NAME, 30 in ADDRESS, and 30 in
CITY.

DATACHAIN CCW 2,NAME,X’80’,20 Read 20 bytes into NAME, then

chain.
CCW , ADDRESS, X’80’, 30 Read 30 bytes into ADDRESS,
then chain.
CCW ,CITY,X’00’,30 Read 30 bytes into CITY, no chain
(stop).

Bit 33, "Chain Command flag", set by X'40'. This bit specifies "command chaining"
to enable the channel to execute more than one CCW before terminating the I/O
operation. Each CCW applies to a separate I/O record. The following set of
CCW's could provide for reading three input blocks, each 100 bytes long.

COMCHAIN CCW 2, INAREA, X’40’,100 Read record-1 into INAREA,

then chain.
CCW 2, IN ARE A+100,X’40’,100 Read record-2 into IN¬
AREA + 100, chain.
CCW 2,INAREA+200,X’00’,100 Read record-3 into IN-
AREA + 200, stop.

Bit 34, "Suppress Length Indication flag", set by X'20', is used to suppress an error
indication that occurs when the number of bytes transmitted differs from the
count in the CCW.
Bit 35, "Skip flag", set by X'10', is used to suppress transmission of input data. The
device actually reads the data, but the channel does not transmit the record.
Bit 36, "Program Controlled Interrupt flag", set by X'08', causes an interrupt when
this CCW's operation is complete (used when one Supervisor SIO instruction
executes more than one CCW).
Bit 37, "Indirect Data Address flag". This flag as well as other features about Physical
IOCS are covered in the IBM Principles of Operation manual and in the appro¬
priate Supervisor manual.

PROBLEMS
16-1. What is the purpose (if any) of an operating system?
16-2. Where is the Supervisor program located?
16-3. What are the two main features of the Linkage Editor?
356 OPERATING SYSTEMS

16-4. What do the first 512 bytes of main storage contain?

16-5. What is the purpose and contents of the Supervisor "transient area"?
16-6. What are the two modes of the PSW? The two states?
16-7. Where in the PSW (the name and bit positions) is the next sequential instruc¬
tion located?
16-8. What are the classes of interrupts and their causes?
16-9. What is the purpose of channels? What are the two types and their dif¬
ferences?
16-10. A printer, number 1101, is attached to control unit 0010 and a multiplexor
channel. What is the printer's physical address in hex?
16-11. Distinguish between physical address and logical address.
16-12. What are system logical units and programmer logical units?
16-13. Revise some simple program and substitute Physical IOCS for input/output.
 CHAPTER t 7

FLOATING-POINT
OPERATIONS

The preceding chapters discussed arithmetic data in two formats: packed decimal
and binary, or fixed-point. There are two disadvantages that may derive from per¬
forming arithmetic in these formats: (1) The maximum and minimum values may be
inadequate for the calculation being performed; and (2) the programmer is fully
responsible for maintaining decimal and binary point precision. Assembler floating¬
point format has its own unique set of instructions designed to overcome these
disadvantages. (On many smaller models, floating-point is optional.) Its most common
use is for calculations such as in astronomy or in nuclear physics that require ex¬
tremely high or low values. Most programs requiring floating-point arithmetic are
written in high-level languages such as FORTRAN and PL/I. These languages replace
much of the tedious detail that Assembler programming requires. Studying the As¬
sembler floating-point instructions gives better understanding of the high-level lan¬
guages and results in better programming performance. Ftowever, be warned that the
problem in Assembler of translating between binary and floating-point is formidable.

FLOATING-POINT FORMATS

BASE 10 FLOATING-POINT. Floating-point can be best explained in terms of dec¬

imal (base 10) values. Any decimal value can be expressed by the formula N = 10e
x f, where:

357
358 FLOATING-POINT OPERATIONS

N = the decimal value

e = exponent, or power, to which the base 10 is raised

f = fraction

Consider the following decimal values:

Decimal value N = 10e X f

123.45 103 X .12345 = 1000 x .12345
1.2345 101 x .12345 = 10 x .12345
0.12345 10° x .12345 = 1 x .12345
0.0012345 - 10~2 X .12345 = 0.01 x .12345

A floating-point value omits the base (10) and stores only the exponent (e) and the
fraction (f). As a fullword, the floating-point value could be stored as

[03 123450

f
exponent
f
fraction

meaning 103 x 0.123450.

CONVERTING BASE 10 TO BASE 16. The 360 and 370 store floating-point values
in base 16. The following technique converts decimal values into hexadecimal.
Assume a decimal value of 123.45:

1. Use the decimal-to-hexadecimal conversion table in Appendix A to convert the

integer portion 123 to base 16 = 7B.0000.
2. Convert the fraction portion as:

7B.0000

0.45
x 16 Multiply by 1 6
= 7.20 Extract the 7 = .7000
0.20
x 16 Multiply by 1 6
- 3.20 Extract the 3 = .0300
0.20
X 16 Multiply by 1 6
= 3.20 Extract the 3 = .0030
359 Floating-Point Formats

0.20
x 16 Multiply by 16
= 3.20 Extract the 3 = .0003

Hexadecimal value 7B.7333

Float numbers are stored as 6 digits in single-precision, or 14 digits in double-precision.

The value is stored in single-precision as 7B.7333, but is expressed more accurately
with double-precision as 7B.733333333333—there is no exact hex representation
for 123.45.

BASE 16 FLOATING-POINT. We previously converted 123.45 to X'7B.7333'. Any

hex number can be represented by:

A/-|6 ~ 1 6e x f16
7B.7333 = 16° x 7B.7333
= 161 x 7.B7333
- 162 X .7B7333

We may therefore store this floating-point number without the base (16) as

02 7B7333

exponent fraction

meaning 1 62 x X77B7333'.
Floating-point, like binary data, may be defined in storage or loaded in reg¬
isters. Either way, floating-point values are represented in three formats:

FORMAT PRECISION LENGTH

Short Single Fullword

Long Double Doubleword
Extended Long Extended Two doublewords (larger systems)

The float number consists of a sign, characteristic (exponent), and fraction:

single-precision s char fraction

bits 0 1-78- 31

double-precision s char fraction

bits 0 1-78- 63
360 FLOATING-POINT OPERATIONS

SIGN. The sign, in bit position zero, applies to the fraction. A 0-bit means plus, and
a 1 -bit means minus fraction.

CHARACTERISTIC. In a value such as 163, 16 is the fraction, and 3 is the exponent,

and means 16 x 16 x 16, or 4096. The 360 and 370 store the exponent (characteris¬
tic) in excess-64 notation, by adding 64 (X'40') to the stored exponent, as follows:

DECIMAL REPRESENTATION HEXADECIMAL REPRESENTATION

Exponent + 64 = Characteristic Exponent + 40 = Characteristic

03 + 64 = 67 03 + 40 = 43
00 + 64 = 64 00 + 40 = 40
-03 + 64 = 61 -03 + 40 = 3D

The exponent is incremented by 64 (X'40), and stored in hex format in bit positions
1-7. The lowest exponent is X'-40'; it is stored as X'-40' + X'40' = X'00'. The
highest exponent is X'3F'; it is stored as X'3F' + X'40' = X'7F'. This maximum
exponent is stored with all 7 bits on. Although the characteristic has no sign stored,
there is an implicit sign. For example, the exponent -2 is stored as X'-02' + X'40' =
X'3E'. Under base 16, such an exponent means 1 6-2.

FRACTION. The fraction may be represented as single-precision (short), double

precision (long), or as extended long. Single-precision processes faster and requires
less storage; double-precision provides greater accuracy. Single-precision stores the
fraction in hex in bits 8-31, and double-precision in bits 8-63. (Bit zero is the sign.)
Negative fractions are stored the same as positive fractions (unlike binary that uses
two's complement for negatives). The radix point (in base-10 the decimal point) is
immediately to the left of the fraction.
Following are examples of floating-point values:

Example: positive exponent, positive fraction. The decimal value 128.0 equals X'80',
or 162 x X',8'. It is stored in short form as:

hex binary
42 80 00 00 0100 0010 1000 0000 0000 0000 0000 0000
—t—- t "--
sign fraction sign char fraction
char

Based on 162 x X'.8', the characteristic is calculated as 02 + 40 = X'42' Because

the fraction is positive, the sign bit becomes 0. The fraction with the radix point to the
eft is represented as X'.8'. We may now compute its value using the exponent 2 and
the fraction as 162 X X'.8' = 256 x 0.5 = 128.

Example: positive exponent, negative fraction. The decimal val

ue —2816.0 equals
X —BOO , or 163 x X' —.B'. It is stored in short form as:
361 Floating-Point Formats

hex binary

sign fraction sign char fraction

& char

The characteristic is calculated as 03 + 40 = X'43'. Because the fraction is negative,

the characteristic is stored as X'C3'. The fraction becomes X' —.BO'. We may now
compute its value using exponent 3 and the fraction as 163 x X' —.BO' = 163 x
-1 1/16 = 162 x - 1 1 = -2816.

Example: Negative exponent, positive fraction. Assume a floating-point value stored

in short form as:

hex binary
3E C8 00 00 0011 1110 1100 1000 0000 0000 0000 0000
t t
sign fraction sign char fraction
& char

The characteristic is calculated as X'3E' - X'40' = -02. We may now compute the

value as 1 6~2 x X'.68' = ^ x = approximately 0.003051 7.

NORMALIZATION. Precision is maintained more accurately by means of "nor¬

malization". The normalization procedure left-adjusts the floating-point fraction
until the leftmost hex digit is nonzero, and decrements the characteristic by 1 for
each fraction digit shifted. For example, consider the floating-point value:

43100681001= 163 x + —) = 8 + = 8.5

Normalize by shifting the fraction left two digits and decrement the characteristic
by 2:

41880000= 161 x (-L + -U = 8 + = 8.5

\16 16V 16

Certain float operations involve prenormalizing (before the operation) and postnor-
malizing (after the operation). This practice is discussed along with the instructions.

Problems 17-1 through 17-4 should now be attempted.

362 FLOATING-POINT OPERATIONS

DECLARATIVES

We define floating-point data in decimal format, which the Assembler converts to

float. We may define data as single-precision (E-format), double-precision (D-
format), or on some systems extended long (L-format). (D-format was used earlier as a
DS to facilitate the CVB and CVD operations.) Also, we may define float constants
with or without an exponent modifier En.

NAME OPERATION OPERAND

[symboll DC dTLn'constant’

Optional: d = duplication factor to signify the number of repetitions of the con¬

stant. If it is omitted, the Assembler assumes one constant.
Required: T = type. E defines single-precision (32 bits of which 24 are the fraction).
D is double-precision (64 bits of which 56 are the fraction). L defines
extended long as two doublewords.
Optional: Ln = length in bytes. This factor is normally omitted because the Assem¬
bler aligns E on a fullword and D on a doubleword boundary—the
required format for floating-point RX instructions. If Ln is specified, this
alignment is not done.
Required: 'constant'. We define the constant as a decimal value, with a preceding
minus sign if necessary. We may also code a decimal point; if omitted, it
is assumed to be to the right. The Assembler uses the decimal point in the
conversion to float. We may further modify the value with an optional
exponent En. For example, 3.1416 may be coded as .31416E1 (meaning
0.31416 x 101) or as 3141.6E-3 (meaning 3141.6 x 10-3). The Assem¬
bler rounds and normalizes the constant if necessary. For an unnor¬
malized constant, we may use a scale modifier, written as Sn. The n tells
the Assembler how many hex digits to right-shift the fraction so that there
are hex zeros to the left.

Figure 17-1 illustrates various definitions of floating-point constants. Note the

alignment and the generated object code in each case. The first group defines
single-precision or short form.

FLOATE1 simply defines a 4-byte DS aligned on a fullword boundary.

FLOATE2 and FLOATE3 define the same constant as positive and as negative.
FLOATE4 has a duplication factor of 3, causing definition of three identical con¬
stants.
FLOATE5 illustrates a multiple declaration: one statement defines three different
constants. The third constant, 0, defines "true zero"—a zero fraction and
characteristic.
FLOATE6, FLOATE7, and FLOATE8 depict the exponent modifier. Each case gener¬
ates the same float constant.
363 Floating-Point Registers

6 *
7 * DC E SINGLE-PRECISION
8
003804 9 FLOATE1 DS E DEFINE FULLW0RD AREA
003808 427B7333 10 FL0ATE2 DC E • 123.451 POSITIVE VALUE
00380C C27B7333 1 1 FLOATE 3 DC E’-123.451 NEGATIVE VALUE
003810 413243FE413243FE 12 FLOAT E4 DC 3E•3.1416’ 3 CONSTANTS
003818 4 13243FE
0038 1 C 4164 FDF4RD9D4952 13 FL0ATE5 DC E'6.312,-.00015,O' MULTIPLE DECLARATION
003824 00000000
003828 427B7333 14 FL0ATE6 DC E 1 123.45E0' 123.45 X 1 = 123.45
00382C 427B7333 15 FLOATE’7 DC E' 1.2345E2' 1.2345 X 100 = 123.45
003830 427B7333 16 FLOAT E8 DC E•12345E-2' 12345 X .01 = 123.45
003834 450007B7 1 7 FL0ATE9 DC E S3 1123.45' UNNORMALIZED, USE OF SCALE
MODIFIER
19
20 $ DC D DOUBLE-PRECISION
21
003838 22 FL0ATD1 DS 0D ALIGN ON DOUBLEWORD BOUNDARY
003838 427B733333333333 23 FL OAT 02 DC 0'123.45' POSITIVE DOUBLE-PRECISION
003840 475912BC00000000 24 FL0ATD3 DC D ' 93.4E6' 93,400,000
003848 450007B733333333 25 FL OAT 04 DC 0S3'123.45' UNNORMALIZED, USE OF SCALE
MODIFIER

FIGURE 17-1 Floating-point declares in single and double-precision.

FLOATE9 uses a scale modifier to prevent normalization. TFie S3 causes the assem¬
bler to shift the fraction three positions to the right. The generated constant,
450007B7, is interpreted as

165 X (t6?+ W5 + T6e)

Note that compared to FLOATE6, this constant has lost some precision.
The second group defines double-precision or long form.

FLOATD1 is a DS with a zero duplication factor to force alignment on a doubleword

boundary.
FLOATD2 and FLOATD3 define double-precision constants. FLOATD2 gives more
precision than the same constant defined as short form in FLOATE2.
FLOATD4 uses a scale modifier and defines the same constant as FLOATE9.

Problems 17-5 and 17-6 should now be attempted.

FLOATING-POINT REGISTERS

From context it should be clear where “register” in this chapter means floating-point
and where it means general register. The four floating-point registers (FPR's) num¬
bered 0, 2, 4, and 6, are each a doubleword in length (8 bytes or 64 bits). The only
valid references to FPR's are 0, 2, 4, and 6. The type of instruction determines that it
is a floating-point and not a general register. For example, AR references two general
registers, whereas ADR references two floating-point registers. A float operation may
364 FLOATING-POINT OPERATIONS

specify the use of the entire 64-bit register (double-precision) or the leftmost 32 bits
(single-precision).

FLOATING-POINT INSTRUCTIONS

The floating-point instruction set, although less extensive, is similar to that for binary.
The instructions are in RR and RX format, where R references a FPR and X references
a storage address subject to the usual base and index register. These instructions
permit data manipulation between registers and between registers and storage. Op¬
erations include load, store, add, subtract, compare, halve, multiply, and divide. The
operations are named to describe their purpose. Consider the following three Load
operations:

operation: LE LER LTER

position: 12 123 1 23

Position-! signifies the type of operation, such as L for load, A for add. Exceptions are
LC, LN, LP, LT, and ST which require two letters.
Position-2 defines the length of the operation. E as in LE means single-precision, and
D as in LD means double-precision. U as in AUR implies single-precision un¬
normalized, and W as in AWR implies double-precision unnormalized.
Position-3 for RX format is blank. For RR, the letter R indicates a register, such as LER
and LTER.

LOAD INSTRUCTIONS. The Load instructions load floating-point values from

storage into a register or between registers, similar to binary L and LR. The most
common ones are:

NAME OPERATION OPERAND

LE R1,X2 or R1 ,D2(X2,B2)
Isymboll LD R1,X2 or R1 ,D2(X2,B2)
LER R1 ,R2
LDR R1,R2

The rules are:

1. The operations load the floating-point number referenced by the operand-2

address (storage or register) into the operand-1 register without normalization.
2. For LE, operand-2 is an aligned fullword in storage; for LD, operand-2 is an
aligned doubleword.
365 Floating-Point Instructions

3. LE and LER, being single-precision, process only the leftmost 32 bits of the
register; the right half is not affected.
4. These loads do not set the condition code.

Refer to Figure 17-2. In LOADE1, LE loads a short form constant called

FLOATEP1 into register-2. In LOADE2, LER loads the contents of register-2 into
register-4. Only the leftmost 32 bits of both operands engage in these operations—
the rightmost 32 bits are undisturbed. In LOADD1, LD loads a long form constant
called FLOATDP1 into register-O. In LOADD2, LDR loads the contents of register-0
into register-6. All 64 bits of both operands engage in these operations.

29 *

30 * LE £ LER LOAD SINGLE -PRECISION

31
003850 7820 3066 32 L0ADE1 LE 2,FL0ATEP1 REG-2: 434D28F6
003854 3842 33 L0ADE2 LER 4,2 REG-4: 434D28F6

35
36 * LD £ LDR LOAD DOUBLE PRECISION
37
003856 6800 305E 38 L0ADD1 LD 0 , FL OA TDP 1 REG-0: C27B74BC 6A7EF9DB
00385A 2860 39 LOAD02 LDR 6,0 REG-6: C27B74BC 6A7EF9DR

00385C 00000000
003860 C27B74BC6A7EE9DB 41 FL OAT DP 1 DC D'-123.456'
003868 434D28F6 42 FL0ATEP1 DC E ' 1234.56’

FIGURE 17-2 Floating-point load operations: LE, LER, LD, LDR.

SPECIAL LOAD INSTRUCTIONS. We may use certain load operations, forexample,

to reverse the sign or to set the condition code. (The binary correlates are LCR, LNR,
LPR, and LTR.)

NAME OPERATION OPERAND NAME OPERATION OPERAND

LCER R1 ,R2 LPER R1.R2

[symbol] LCDR R1,R2 [symbol] LPDR R1.R2
LNER R1.R2 LTER R1,R2
LNDR R1 ,R2 LTDR R1.R2

These instructions are similar to the previous load operations. Each in addition sets
the condition code: 0—zero fraction, 1—less than zero (except LPER and LPDR),
2—greater than zero (except LNER and LNDR).

LOAD COMPLEMENT—LCER and LCDR load the operand-2 register into operand-1
and reverse the sign bit: 0 becomes 1 and 1 becomes 0.
LOAD NEGATIVE—LNER and LNDR load the operand-2 register into operand-1 and
set the sign bit to 1, for minus.
366 FLOATING-POINT OPERATIONS

LOAD POSITIVE—LPER and LPDR load the operand-2 register into operand-1 and
set the sign bit to 0, for positive.
LOAD AND TEST—LTER and LTDR load the operand-2 register into operand-1.
These work the same as LER and LDR but in addition set the condition code.

STORE INSTRUCTIONS. STE and STD store the contents of a floating-point register
into a storage address. (The binary correlates are STH and ST.) The rules are: (1) STE
and STD store the contents of the operand-1 register in the operand-2 storage address
without normalization; (2) STE stores the leftmost 32 bits of the register; the storage
address must be an aligned fullword; (3) STD stores the entire 64 bits into an aligned
doubleword address.

NAME OPERATION OPERAND

[symboll STE R1.X2 or R1,D2(X2,B2)

STD R1.X2 or R1 ,D2(X2,B2)

In Figure 17-3, LD loads a long form value into register-0. STE stores the
leftmost 32 bits of register-0 in the fullword area, STORSING. STD stores the entire
64 bits of register-0 in the doubleword area, STORDOUB.

46 *
47 * STE 6 STD STORE FLOATING-POINT
48 *
00386C 6800 3076 49 LD 0 * EL TD1 REG-0: 44392800 00000000
003870 7000 3086 50 STE 0,STORSING STORSING: 44392800
003874 6000 307E 51 STD 0,STORDOUB STORDOUB: 44392800 00000000

003878 4439280000000000 53 FLTD1 DC D'146.32E2’ DOUBLEWORD CONSTANT

003880 54 STORDOUB DS 0 DOUBLEWORD AREA
003888 55 STORSING DS E FULLWORD AREA

FIGURE 17-3 Floating-point store operations: STE and STD.

ADDITION AND SUBTRACTION. There are instructions for both normalized and
unnormalized addition and subtraction. Subtraction inverts the sign of operand-2
and then adds the operands. The first step in add and subtract ensures that the
characteristics of both operands are equal. If unequal, the field with the smaller
characteristic is adjusted by shifting its fraction to the right and incrementing the
characteristic by 1 until the characteristics are equal.

Example: simple addition of short form:

41 290000 41 290000
+40 120000 = +41 012000 shift right and add
41 2A2000
367 Floating-Point Instructions

Example: fraction overflow. If the fraction overflows because of addition, then the
operation shifts the fraction right one hex digit, and increments the characteristic by
1. (If the characteristic overflows a program interrupt occurs.)

41 940000
41 760000
41 11A0000 fraction overflows
42 11A000 shift fraction right, add I to characteristic

Example: guard digit and normalization. Normalized addition and subtraction

normalize the result after the operation (post-normalization). Also, single-precision
add and subtract maintain improved precision by means of a "guard digit". When
the fraction is shifted right, this guard digit saves the last digit shifted. The digit is
restored during postnormalization.

42 0B2584 42 0B2584 guard digit

40 114256 42 001 142(5) shift right 2 digits
Add: 42 0B36C6(5)
Normalize: 41 B36C65 shift left I digit

ADD AND SUBTRACT NORMALIZED. The normalized add and subtract instruc¬
tions are:

NAME OPERATION OPERAND

AE R1.X2 or R1 ,D2(X2,B2)
[symbol] AD R1.X2 or R1 ,D2(X2,B2)
AER R1,R2
ADR R1.R2

NAME OPERATION OPERAND

SE R1.X2 or R1,D2(X2,B2)
[symbol] SD R1.X2 or R1,D2(X2,B2)
SER R1.R2
SDR R1.R2

Each operation sets the condition code as follows: 0—zero fraction in the result,
1 fraction less than zero, 2—fraction greater than zero, 3—exponent overflow in
the result.

ADD NORMALIZED. AE, AD, AER, and ADR add the contents of operand-2 to
 368 FLOATING-POINT OPERATIONS

operand-1, and normalize the result. The short form operations—AE and AER—
process only the leftmost 32 bits of the register; the rightmost 32 bits are unaffected.

SUBTRACT NORMALIZED. SE, SD, SER, and SDR subtract the contents of
operand-2 from operand-1 and normalize the result. The short form operations—SE
and SER— process only the leftmost 32 bits of a register; the rightmost 32 bits are
unaffected.

In Figure 17-4 ADDFLTE depicts single-precision add. A doubleword is loaded into

register-2, and AE adds the left half of a doubleword to register-2. A third dou¬
bleword is loaded into register-4, and AER adds the left half of register-2 to register-4.
The right half contents of the registers are undisturbed.
ADDFLTD is similar to ADDFLTE except that it uses double-precision. All 64
bits engage in the operations and the results (shown in comments) are more precise.
SUBFLTE is similar to ADDFLTE except that it performs single-precision sub¬
traction. SUBFLTD is similar to SUBFLTE, but uses double-precision subtraction with
more precise answers.

59
60 ae e AER ADD SINGLE-PRECISION NORMALIZED
61
00388C 6820 3 OC 6 62 ADDFLTE LD 2 * AMTFLT 1 REG-2: 427B7333 33333333
003890 7A20 30CE 63 AE 2 * AMTFL T2 REG-2: 429AB603 33333333
003894 6840 3006 64 LD 4,AMTFLT3 REG-4: 435C0999 9999999A
003898 3A42 65 AER 4,2 REG-4: 4365B4F9 9999999 A

67 *
68 £ AD £ ADR ADD DOUBLE-PRECISION NORMALIZED
69 *
00389A 6820 30C 6 70 ADDFLTD LD 2 , AMTFL T1 REG-2: 427B7333 33333333
00389 E 6A20 30C.F 71 AD 2,AMTFLT2 REG-2: 429AB604 1 89374BC
00 3 8A 2 6840 3006 72 LD 4,AMTFL T3 REG-4: 435C0999 9999999A
0038Afe 2A42 73 ADR 4,2 REG-4: 4365B4F9 DB22D0E 5
75 £
76 SE £ SER SUBTRACT SINGLE-PRECISION NORMALIZED
77 *
003 8 A 8 6820 30 C 6 78 SUBFLTE LD 2 , AMTFLT1
0038AC 7R2 0 3 0CF REG-2: 427B7333 33333333
79 SE 2,AMTFL T2 REG-2: 42 5C3063 33333333
0038R0 6840 3006 80 LD 4,AMTFLT3 REG-4: 435C0999 9999999 A
00 3 8 84 3842 81 SER 4,2 REG-4: 43564692 9999999 A
83 *
84 * SD £ SDR SUBTRACT DOUBLE-PRECISION NORMALIZED
85
0038R6 6820 30C 6 86 SUBFLTD LD 2,AMTFLT1
0038RA REG-2: 427B7333 33333333
6B20 30CF 87 SD 2,AMT FLT 2 REG-2: 425C3062 4DD2 F1 AA
0038RE 6840 3006 88 LD 4, AMTFL T3 REG-4: 435C0999
0038C2 2842 89 9999999A
SDR 4,2 REG-4: 43564693 74BC6A7F
0038C4 00000000
003RCR 427R733333333333 91 AMTFL T1 DC D' 123.45' DOUBLEWORD
0038D0 421F42D0E5604189 92 AMTFLT 2 DC D ' 31.261' DOUBLEWORD
003808 435C099qQ999999A 93 AMTFLT3 DC D'1472.6' DOUBLEWORD

FIGURE 17-4 Floating-point normalized add and subtract.

369 Floating-Point Instructions

ADD AND SUBTRACT UNNORMALIZED. We may want to control precision by

preventing normalization. Unnormalized operations are desirable, for example, in
converting between floating-point and binary formats (illustrated in a later section).
Unnormalized add and subtract set the condition code, but omit use of the guard
digit and the postnormalization step.

NAME OPER'N OPERAND

AU R1.X2 or R1,D2(X2,B2)
[symbol] AW R1.X2 or R1 ,D2(X2,B2)
AUR R1 ,R2
AWR R1 ,R2

NAME OPER'N OPERAND

SU R1,X2 or R1 ,D2(X2,B2)
[symbol] sw R1.X2 or R1,D2(X2,B2)
SUR R1.R2
SWR R1,R2

In these operations, U stands for single-precision unnormalized and W (double-U)

for double-precision. Examples in Figure 17-5 are similar to those just given for
normalized add and subtract and should be compared.
ADDFLTU illustrates single-precision unnormalized addition. A doubleword is
loaded into register-2. AU adds a short unnormalized constant to register-2. Another
doubleword is loaded into register-4, and AUR adds the left half of register-2 to
register-4. The right half of the registers are undisturbed and results are unnor¬
malized. ADDFLTW is similar to ADDFLTU except that it uses double-precision and
all 64 bits engage in the addition.
SUBFLTU is also similar to ADDFLTU except that short unnormalized subtract
is performed. SUBLLTW is similar to SUBFLTU, with double-precision used. In this
example, however, SWR shows a convenient way to clear a register to true zero—the
characteristic and fraction are both set to zero.

COMPARE. The following operations compare two floating-point fields:

NAME OPERATION OPERAND

CE R1.X2 or R1,D2(X2,B2)
[symbol) CD R1.X2 or R1,D2(X2,B2)
CER R1.R2
CDR R1.R2
370 FLOATING-POINT OPERATIONS

97 *

98 * AU £ AUR ADD SINGLE-PRECISION UNNORMALIZED

99
0038F0 6820 3116 100 AD0FLTU ID 2.AMTFLU1 REG-2: 427B7333 33333333
0038E4 7 F 2 0 3 11 F 101 AU 2 »AMTFLU2 REG-2: 44009AB6 33333333
00 38 F 8 6840 3126 102 LD 4, AMTFLU3 REG-4: 435C0999 9999999A
0038FC 3F4 2 103 AUR 4,2 REG-4: 44065B4F 9999999A

1 05
106 * AM £ AWR ADD DOUBLE-PRECISION UNNORMALIZED
107 £
0038FF 6820 3116 108 addfltw LD 2 , AMT FLU 1 REG 2: 427B7333 33333333
00 38 F 2 6E20 31 IF 1 09 AW 2,AMTFLU2 REG-2: 44009AB6 04189375
0038F6 6840 3126 110 LD 4,AMTFLU3 REG-4: 435C0999 9999999A
0038FA 2F42 111 AWR 4,2 REG-4: 44065B4F 9DB22D0E

113 ❖
1 14 * su £ SUR SUBTRACT SINGLE -PRECISION UNNORMALIZED
115 *
0038 FC 6820 31 16 116 SURFLTU LD 2,AMTFLU1 REG-2: 427B7333 33333333
003900 7F20 3 11 F 117 SU 2,AMTFLU2 REG-2: 4400 5C 30 33333333
003904 6840 3126 1 18 LD 4,AMTFLU3 REG-4: 435C0999 9999999A
003908 3F4 2 119 SUR 4,2 REG-4: 44056469 9999999A
121
122 * SW £ SWR SUBTRACT DOUBLE--PRECISION UNNORMALIZED
123
00390A 6820 3116 124 SURFLTW LD 2,AMTFLU1 REG-2: 427B7333 33333333
0039 0 F 6F20 31 IF 125 SW 2, AMTFLU2
003912 2F44 REG-2: 44005C30 624DD2F1
126 SWR 4,4 REG-4: 00000000 00000000

003914 00000000
003918 427B733333333333 128 AMTFLU1 DC D' 123.45' DOUBLEWORD NORMALIZED
003920 44001F42D0E56042 1 29 AMTFLU2 DC DS2'31.261' DOUBLEWORD UNNORMALIZED
00 392 8 435C09999999999A 130 AMTPLU3 DC D'1472.6' DOUBLEWORD NORMALIZED

FIGURE 17-5 Floating-point unnormalized add and subtract.

The rules are:

1. The characteristics of the two operands are checked. The shorter one is in¬
cremented and its fraction shifted right, as for normalized subtract.
2. Operand-1 is compared algebraically to operand-2, including the sign, expo¬
nent, and fraction. However, if both fractions are zero, the result is equal regard¬
less of sign and exponent.
3. CE and CER compare only the leftmost 32 bits.
4. For CE operand-2 is an aligned fullword in storage. For CD, operand-2 is an
aligned doubleword.
5. The condition is set for 0 (equal), 1 (low), and 2 (high).

In Figure 17-6 COMPE compares single-precision and COMPD compares double-

HALVE. The Halve instructions permit convenient division of an operand by two.

371 Floating-Point Instructions

134 *
135 ❖ CE £ CER COMPARE SINGLE-PRECISION
136 $
003930 7820 314 F 137 COMPE LE 2 , COMP 1
003934 7920 3156 1 38 CE 2.C0MP2 427B7333 > 421F42D0
003938 7840 315E 139 LE 4»COMP 3
00393C 39 24 140 CER 2.4 427B7333 < 435C0999

142 *
143 * CD £ CDR COMPARE DOUBLE-PRECISION
144 *
0039 3E 6820 314F 145 COMPD LD 2.COMP 1
003942 6920 3156 146 CD 2,COMP 2 427B7333 33333333 >
003946 6840 315F 147 LD 4, COMP 3 421F42D0 E5604189
00394A 2924 148 COR 2,4 427B7333 33333333 <
435C0999 9999999A
00394C 00000000
003950 427B733333333333 150 C0MP1 DC D' 123.45' DOUBLEWORD
003958 421F42DOE5604189 151 C0MP2 DC D'31.261' DOUBLEWORD
003960 435C09999999999A 152 C0MP3 DC D' 1472.6* DOUBLEWORD

FIGURE 17-6 Floating-point compare operations.

NAME OPERATION OPERAND

[symbol] HER R1,R2

HDR R1 ,R2

The rules are:

1. Operand-2 references a register containing the dividend which is to be divided

by two.
2. The operations move operand-2 to operand-1 and the fraction one bit to the
right. The sign and characteristic are unaffected. Operand-2 is not changed.
3. HER references only the leftmost 32 bits.
4. The condition code is not set.
5. There is no normalization or test for zero fraction.

In Figure 1 7-7 a doubleword is loaded in register-6. HER shifts only the left 8
hex digits one bit to the right, and HDR shifts all 16 hex digits.

1 56 *
157 * HER £ HDR HALVE
1 58
003968 6860 316E 159 HALVE LD 6,AMTHALF REG-6: 434D28F5 C28F5C29
00396C 3446 1 60 HER 4,6 REG-4: 4326947 A

00396E 2426 162 HDR 2,6 REG-2: 4326947A E147AE14

164 amthalf DC D' 1234.56' DOUBLEWORD

003970 434D28F5C28F 5C29

FIGURE 17-7 Floating-point halve operation.

 372 FLOATING-POINT OPERATIONS

MULTIPLICATION. The following instructions multiply floating-point fields.

NAME OPERATION OPERAND

ME R1.X2 or R1,D2(X2,B2)
Isymbol] MD R1.X2 or R1,D2(X2,B2)
MER R1.R2
MDR R1.R2

The multiply operation prenormalizes the field if necessary. Then it adds the charac¬
teristics and multiplies the fractions. The rules are:

1. The operand-! register specifies the multiplicand.

2. Operand-2 references the multiplier, either a storage address (ME and MD) or a
register (MER and MDR).
3. The operation normalizes the product, which replaces the multiplicand. Regard¬
less of the operation, the product is a double-precision value.

In Figure 17-8 MULTE depicts single-precision. A fullword multiplicand is

loaded into register-2. Then ME multiplies the left half of register-2 by the fullword
multiplier in storage. Although the fields are defined as doublewords, only the left
half engages in the operations. Next, another fullword is loaded into register-4, and
MER multiplies the contents of register-4 by register-2. The final product is in
register-4. MULTD uses double-precision. AIM 6 hex digits participate and we gain a
slightly more precise product.

168 *
1 69 * ME £ MER MULTIPLY SINGLE-PR EC ISI ON
170 *
003978 7820 3196 171 MULTE LE 2 »MUL TC AN 1 REG-2 : 4326D666
00397C 7C20 319E 172 ME 2»MULTPLER REG-2: 445CB979
003980 7840 31A6 173
LE 4,MULTCAN2 REG-4: 441205B8
003984 3C42 174
MER *’2 REG-4: 47687 ICC
1 76 *
177 *
MD £ MDR MULTIPLY DOUBLE-PRECISION
178 *
003986 6820 3196 179 MULTD LD 2 , MUL TCAN 1
00398A 6C20 31 9E REG-2: 4326D666 66666666
180 MD 2.MULTPLER
00398E 6840 31A6 181 REG-2: 445CB97A E147AE13
LD 4,MULTCAN2 REG-4: 441205B8 51EB851F
003992 2C42 1 82 MDR 4,2
REG-4: 476871D0 639C0ERE
003994 00000000
003998 4326066666666666 184 MULTCAN 1 DC D'621.4'
0039A0 4226333333333333 DOUBLEWORD
185 MULTPLER DC D'38.2’
0039A8 441205B851EB851F DOUBLEWORD
186 MULTCAN2 DC D'4613.72*
DOUBLEWORD

FIGURE 17-8 Floating-point multiplication.

DIVISION. The following instructions divide floating-point fields:

373 Floating-Point Instructions

NAME OPERATION OPERAND

DE R1.X2 or R1,D2(X2,B2)
[symboll DD R1.X2 or R1 ,D2(X2,B2)
DER R1 ,R2
DDR R1.R2

The divide operation prenormalizes the fields if necessary. The rules are:

1. The operand-1 register specifies the dividend.

2. Operand-2 references the divisor, either a storage address (DE and DD) or a
register (DER and DDR).
3. The operation normalizes the quotient, which replaces the dividend. For DE and
DER the quotient is single-precision; for DD and DDR the quotient is double¬
precision.
4. There is no remainder.
5. A divisor containing a zero fraction causes a program interrupt.

In Figure 1 7-9, DIVIDE depicts single-precision. A fullword dividend is loaded

into register-2. Then DE divides the left half of register-2 by the fullword divisor in
storage. Next, another fullword is loaded into register-4, and DER divides the con¬
tents of register-4 by register-2. The final quotient is in register-4. DIVIDD uses
double-precision. All 16 hex digits participate and we gain a slightly more precise
quotient.

190 *

191 * 0E £ DER DIVIDE SINGLE-PRECISION

192
0039B0 7820 31CE 193 DIVIDE LE 2 ,D I VIDND1 REG-2: 4326D666
0039B4 7D20 3106 194 DE 2 , DIVSOR REG-2: 4210445B
0 039 B 8 7840 31PF 195 LE 4.DIVIDND2 REG-4: 441205B8
0039BC 3042 196 DER 4,2 REG-4: 4311B9FC

198 *
199 00 £ DDR DIVIDE DOUBLE-PRECISION
200
0039BE 6820 3 ICE 201 DIVIDD L0 2,DIVIDN01 REG-2: 4326D666 66666666
0039C2 6D20 3106 202 DO 2,DIVSOR REG-2: 4210445B 24304055
0039C6 6840 310F 203 LD 4,DIVIDND2 REG-4: 441205B8 51EB851F
0039CA 2042 204 DDR 4,2 REG-4: 4311B9FC E537151B

0039CC 00000000
003900 4326066666666666 206 DIVIDND1 DC D'621.4' DOUBLEWORD
003908 4226333333333333 207 DIVS0R DC D'38.2 ' DOUBLEWORD
0039 E0 441205B851EB851F 208 DIVIDND2 DC O'4613.72' DOUBLEWORD

FIGURE 17-9 Floating-point division.

 374 FLOATING-POINT OPERATIONS

CONVERSION FROM PACKED TO FLOAT

Although it is simple to define data in floating-point format, it is somewhat difficult to

convert packed or binary data into float. The standard practice is to use CVB to
convert packed to binary in a general register, and there create the floating-point
number. Consider the decimal number 268,002. Converted to binary it is
X'000416E2'. With the fraction to the right, the double-precision float value is
4E000000 000416E2. We may load this number into an FPR and normalize the
fraction with a float operation.
Because negative binary numbers are in two's complement form, we must
convert them to positive. For the packed number -268,002 the correct float value is
CE000000 000416E2. Figure 17-10 gives the programming steps to convert
—268,002 to normalized single-precision floating-point. When converted into binary
in general register-8, -268,002 appears in two's complement as X'FFFBE91 E'. But a
floating-point fraction is stored in absolute form. Therefore we use LPR to adjust the
binary number to its absolute value in register-10: X'00041 6E2'. Next, we load the
characteristic X'4E' into register-9 and algebraically shift it left 32 bits into register-8.
Now the sign bit of the original binary shift is left 32 bits into register-8. Now the sign
bit of the original binary number is the leftmost bit of the characteristic, X'CE' or
binary 1100 1110. With the characteristic loaded into register-9 and the fraction in
register-10, the two registers are stored in a doubleword.
In order to normalize the floating-point field, we first clear the floating-point
register and then add the double-precision value. The floating-point number now
contains the correct characteristic and normalized fraction in single-precision:
C541 6E20.

003A30 7840 326? 233 FL0TPACK le 4,FLOAT FLT REG-4: C5416E20

00 3 A 34 3064 234 LPER 6,4
0 0 3 A 36 7960 325F FIT REG-6: 45416E20
235 CE 6,MAXVAL
003A3A 47B0 3266 236 IF EXCEEDS MAXIMUM,
BNL B10PASS THEN BYPASS
003A3E 6E40 3266 237 AW 4,ADJUST
003A42 6040 324F 238 FLT REG-4: 4E000000 FFFBE91E
STD 4,DOUBLE
003A46 5890 326? 2 39 STORE FLOAT DOUBLEWORD
L 9,D0UBLE+4
003A4A1 4E90 324F 24 0 GEN REG-9: FFFBE91E BINARY
CVD 9,DOUBLE DOUBLE: -268,002 PACKED

003A50 242 DOUBLE DS D

003A5R 4E000001000000 00 243 ADJUST DC doubleword area
003A60 48800000 X’4E00000100000000’ ADJUSTMENT FACTOR
244 MAXVAL DC E12 14748 3648 ’
003A64 C5416E20 MAXIMUM VALUE
265 FLOAT DC E ’-268002’
FLOAT VALUE TO BE CONVERTED

FIGURE 17-10 Conversion of packed to floating-point format.

CONVERSION FROM FLOAT TO PACKED

Because of (he great magnitude of floating-point numbers, we must be careful in

convertmg to packed format. If the absolute floating-point value is greater than 2»-1
(or 2,147,483,647), then its binary equivalent will exceed the capacity of a 32-bit
375 Conversion from Float to Packed

general register. We may make use of an unique short cut in the conversion. Con¬
sider a normalized float value, 4541 6E20. Its correct unnormalized hexadecimal
value is X'416E2', or decimal 268,002. We can use an unnormalized add operation,
AW, with an operand containing a characteristic of 4E to shift the radix point from
the left to the right as follows:

4E000000 00000000 = 4E000000 00000000

+ 45416E20 00000000 = 4E000000 000416E2
4E000000 000416E2

The rightmost 8 hex digits now contain the correct binary value, which we can next
convert to packed. If the float number had contained any significant digits to the
right, the operation would have shifted them out.
If the float value is negative, we must convert it to two's complement in binary.
A minor adjustment to the preceding routine gives correct results for either positive or
negative values. The AW operation adds X'4E00000100000000. The '1' in the frac¬
tion has no effect on positive numbers, but forces two's complement on negative.
Assume a float value of C5416E20:

4E000001 00000000 = 4E000001 00000000

+ C5416E20 00000000 = CE000000 000416E2
CE000001 FFFBE91E

The rightmost 8 hex digits now contain the correct two's complement value which
we can now translate to packed.
Figure 1 7-11 converts normalized single-precision float to packed format. The
float value is the one just discussed, C5416E20, and is loaded into floating-point
register-4. The first step checks that the value does not exceed 231 —1. Next, AW

212 * GENERAL REGISTERS:

0039 E 8 F875 3216 320A 213 PACKFLOT ZAP DBL WD » AMT PK 8: 9: 10 :
0039EE 4F80 3216 214 CVB 8 t DBLWD FFFBE91E
0039F2 10A8 215 L PR 10,8 FFFBE9 IE 000416E2
0039F4 5 89 0 322 A 216 L 9 ,CHAR FFFBE91E 4E000000 000416 E 2
0039 F 8 8 F 80 0020 217 SL DA 8,32 CE 000000 00000000 000416E2
218 LR 9,8 C E000000 CE000000 000416E2
0039FC 189 8
0039 ^ E 909A 32 1 F 219 STM 9,10,SAVEUN0R
220 * FLOATING- POINT REG-4:
2F44 221 SWR 4,4 00000000 00000000
003A02
003A04 6A40 321 F 222 AD 4,SA VEUNOR C5416E20 00000000
003A08 7040 3226 223 STE 4,S AV EN0R M

003A0C 000002 680020 225 AMTPK DC PL6’-268002’ PACKED FIELD

003 A 1 8 226 DBLWD DS 0 DOUBLEWORD AREA
003A20 227 SAVEUNOR DS D DOUBLEWORD AREA
003A28 228 SAVEN0RM DS F FULLWORD AREA
003A2C 4E000000 229 CHAR DC X•4E 0000 001 CHARACTERISTIC

FIGURE 17-11 Conversion of floating-point to packed format.

376 FLOATING-POINT OPERATIONS

unnormalizes the number. STD stores the entire 64-bit register in DOUBLE. Finally,
the rightmost four bytes of DOUBLE are converted into packed.
Conversion rules can be much more complicated. The examples given pro¬
cessed only single-precision with integers—that is, the implicit decimal point for the
number is to the right. The binary or decimal number may be mixed, that is with a
binary or decimal point not to the right, such as 123.45. If so, then the integer portion
must be separated from the fraction portion.

The remaining problems should now be attempted.

PROBLEMS

17-1. Under what circumstances should we consider the use of floating-point?

17-2. Why is the characteristic represented in excess-64 notation?
17-3. Convert the binary numbers (represented in hex) to normalized single¬
precision float: (a) X'15'20'; (b) X'9A.312'; (c) X'6B3.F2'.
17-4. Convert the following decimal numbers to normalized single-precision float-
fa) 32,768; (b) 79.396; (c) 244. 2166.
17-5. Code the decimal values in problem 1 7-4 as DC's and assemble them. Com¬
pare the assembler object code to your own calculations (remember the US¬
ING).
1 7-6. Code the decimal value 412.673 as below. Assemble and check the results: (a)
Normalized single-precision; (b) Normalized double-precision; (c) With an
exponent modifier E2 and double-precision; (d) Unnormalized double¬
precision with three hex digits preceding the first significant digit.
17-7. The slope m of a linejoiningtwo points (x-,,yd and (x2,y2) is m = iy2-yd/(x2-xd.
Define four fields XI, VI, X2, and Y2 containing single precision constants.
Calculate and store the slope as float in M. Code, assemble, and take a storage
dump of the results. Warning: What if X2 = XI?
17-8. Convert m in Problem 17-7 to character format so that it may be printed
normally.
17-9. Figure 9-14 calculated finance charge rebates in binary format. Rewrite the
routine using float declares and instructions. Take a dump of the registers and
storage to check the answers.
 APPENDIX A

HEXADECIMAL AND
DECIMAL CONVERSION*

Hexodecimol ond Decimal Integer Conversion Table

HALFWORD HALFWORD

BYTE BYTE BYTE BYTE

BITS: 0123 4567 0123 4567 0123 4567 0123 4567

Hex Decimal Hex Decimal Hex Decimal Hex Decimal Hex Decimal Hex Decimal Hex Decimal Hex Decimal

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 268,435,456 1 16,777,216 1 1,048,576 1 65,536 1 4,096 1 256 1 16 1 1
2 53b,870,912 2 33,554,432 2 2,097,152 2 131,072 2 8,192 2 512 2 32 2 2
3 805,306,368 3 50,331,648 3 3,145,728 3 196,608 3 12,288 3 768 3 48 3 3
4 1,073,741,824 4 67,108,864 4 4,194,304 4 262,144 4 16,384 4 1,024 4 64 4 4
5 1,342,177,280 5 83,886,080 5 5,242,880 5 327,680 5 20,480 5 1,280 5 80 5 5
6 1,610,612,736 6 100,663,296 6 6,291,456 6 393,516 6 24,576 6 1,536 6 96 6 6
7 7 117,440,512 7 7,340,032 7 458,752 7 28,672 7 1,792 7 112 7 7
1,879,048,192
8 134,217,728 8 8,388,608 8 524,288 8 32,768 8 2,048 8 128 8 8
8 2,147,483,648
150,994,944 9 9,437,184 9 589,824 9 36,864 V 2,304 V 144 9 9
9 2,415,919,104 9
A 167,772,160 A 10,485,760 A 655,360 A 40,960 A 2,560 A 160 A 10
A 2,684,354,560
184,549,376 B 11,534,336 B 720,896 B 45,056 B 2,816 B 176 B 11
B 2,952,790,016 B
c 3,221,225,472 C 201,326,592 C 12,582,912 C 786,432 C 49,15.2, C 3,072 C 192 c 12
D 13,631,488 D 851,968 D 53,248 D 3,328 D 206 D 13
D 3,489,660,928 D 218,103,808
234,881,024 14,680,064 E 917,504 E 57,344 E 3,584 t 224 t 14
E 3,758,096,384 E E
F 4,026,531,840 F 251,658,240 F 15,728,640 F 983,040 F 61,440 F 3,840 F 545 F 15

6 5 4 3 2 i
8 7

*Reprinted by permission from Introduction to IBM Data Processing Systems, © 1960,

1967, by International Business Machines Corporation.

377
 378 APPENDIX A

TO CONVERT HEXADECIMAL TO DECIMAL To convert integer numbers greater than the capacity of
EXAMPLE table, use the techniques below:
1 . Locate the column of decimal numbers corresponding to Conversion of
the left-most digit or letter of the hexadecimal; select Hexadecimal Value D34 HEXADECIMAL TO DECIMAL
from this column and record the number that corresponds
to the position of the hexadecimal digit or letter. 1 . D 3328 Successive cumulative multiplication from left to right,
adding units position.
2. Repeat step 1 for the next (second from the left)
2. 3 48
position . Example: D34 j ^ = 3380jq D = 13
3. Repeat step 1 for the units (third from the left) 3. 4 4 x16
position . 208
4. Decimal 3380 3 = + 3
4. Add the numbers selected from the table to form the 211
decimal number. xl 6
3376
4 = +4
TO CONVERT DECIMAL TO HEXADECIMAL 3380
EXAMPLE
1 . (a) Select from the table the highest decimal number DECIMAL TO HEXADECIMAL
Conversion of
that is equal to or less than the number to be con¬
Decimal Value 3380
verted . Divide and collect the remainder in reverse order.
(b) Record the hexadecimal of the column containing
1 . D -3328
the selected number.
52
(c) Subtract the selected decimal from the number to
be converted.
2. 3 -48
2. Using the remainder from step 1(c) repeat all of step 1 4
to develop the second position of the hexadecimal
(and a remainder). 3. 4 -4

3. Using the remainder from step 2 repeat all of step 1 to 3380]0 = D34
4. Hexodecimal D34 16
develop the units position of the hexodecimal .

4. Combine terms to form the hexodecimal number.

POWERS OF 16 TABLE

Example: 268,435,456, g = (2.68435456 x 108)|0= 1000 0000,6 = (107) )6

16n n

1 0
16 1
256 2
4 096 3
65 536 4
1 048 576 5
16 777 216 6
268 435 456 7
4 294 967 296 8
68 719 476 736 9
1 099 511 627 776 10 = A
17 592 186 044 416 11 = B
281 474 976 710 656 12 = C
4 503 599 627 370 496 13 = D
72 057 594 037 927 936 14 = E
J 152 921 504 606 846 976 15 = F
'V'
Decimal Values
 APPENDIX B

PROGRAM INTERRUPTS BY
CODE

A program interrupt occurs when the program attempts an operation that the CPU
cannot execute. The following lists the various program interrupts, by code.

1. Operation Exception. The CPU has attempted to execute an invalid machine

operation, such as hexadecimal zeros. Possible cause: (1) missing branch
instruction—the program has entered a declarative area; (2) the instruction, such
as a floating-point operation, is not installed on the computer; (3) during assem¬
bly, an invalid instruction has caused the Assembler to generate hexadecimal
zeros in place of the machine code. For a 6-byte instruction such as MVC, the
computer generates six bytes of hex zeros. At execute-time, the computer tries to
execute the zero operation code, causing an operation exception. (Since the
computer will attempt to execute two bytes at a time, some systems may generate
three consecutive operation exceptions.); (4) see also the causes for an addressing
exception.
2. Privileged-Operation Exception. An attempt has been made to execute a
"privileged instruction" that only the Supervisor is permitted to execute. Possible
causes: see Addressing and Operation exceptions. There are many possible
causes, and it may be necessary to take a hexadecimal dump of the program to
determine the contents of I/O areas and other declaratives to discover at what
point during execution the error occurred.

379
380 APPENDIX B

3. Execute Exception. An attempt has been made to use the EX instruction on

another EX instruction.
4. Protection Exception. Some computer models have a useful "storage protection"
device that prevents the program from erroneously moving data into the Super¬
visor area (or into the areas of other programs under multiprogramming). Such
attempts (for example, by MVC and ZAP) cause the computer to signal the error.
Possible cause: (1) the program has erroneously loaded data into one of the pro¬
gram's base registers; (2) improper explicit use of a base register.
5. Addressing Exception. The program is attempting to reference an address that is
outside available storage. Possible causes: (1) a branch to an address in a register
containing an invalid value; (2) an instruction, such as MVC, has erroneously
moved a data field into program instructions; (3) improper use of a base register,
for example, loaded with a wrong value.
6. Specification Exception. There are many causes. (1) An attempt has been made to
execute an instruction that does not begin in an even storage address (possibly an
incorrect base register). (2) For packed operations, a multiplier or divisor exceeds
eight bytes, or the length of the operand-! field is less than or equal to that of
operand-2. (3) For binary operations, the instruction violates the rule of integral
boundaries—halfword, fullword, or doubleword (e.g., operand-2 of binary multi¬
ply (M) should align on a fullword location, and that of CVB should align on a
doubleword location). Also, operand-! of the operation (such as M or D) must
specify an even-numbered register. (4) For floating-point, there may be a refer¬
ence to a register other than 0, 2, 4, or 6, or failure to address on the proper single-
or double-precision boundary.
7. Data Exception. An attempt has been made to perform arithmetic on an invalid
packed field. Possible causes: (1) an input field contained blanks or other non-
digits that pack invahdly; (2) failure to pack, or an improper pack; (3) improper
se of relative addressing, (4) an MVC has erroneously destroyed a packed field;
registermU tiP ICan<^ ^ ^ ^ ^ MP 'S t0° S^°rt; ^ improper explicit use of a base
8. Fixed-Point-Gverfbw Exception. A binary operation (add, subtract, shift) has
caused the contents of a register to overflow, losing a leftmost significant digit.
The maximum value in a register is, in decimal notation, +2,147,483 647
9. Fixed-Point-Divide Exception. A binary divide (D or DR) or a CVB has generated a
value that has exceeded the capacity of a register. Common cause8for divide
perations: dividing by a zero value. Remember that the maximum value that a
register can contain, in decimal notation, is +2,147,483,647
A.
Decimal-Overflow Exception. The result of a decimal (packed) operation is too
arge for the receiving field. Solution: redefine the receiving field so that it can
contain the largest possible value, or use another available, larger declarative.
B.
ecimal-Dmde Exception. The generated quotient/remainder for a DP is too
arge for the defined area. Possible cause: (!) failure to follow the rules of DP- m
the divisor contains a zero value. UV' U'

C. Exponent-Overflow Exception. A floating-point arithmetic

operation has caused
the exponent to overflow (exceed +63).
D. Exponent-Underflow Exception. A floating-point arithmetic
operation has caused
the exponent to underflow (less than -64).
381 Program Interrupts by Code

E. Significance Exception. A floating-point add or subtract has caused a zero frac¬

tion. All significant digits are lost, and subsequent computations may be mean¬
ingless.
F. Floating-Point-Divide Exception. An attempt has been made to divide in
floating-point using a zero divisor.

In each case, the system issues an error message, giving the type of program
interrupt and the address where the interrupt occurred. Sometimes the programming
error causes the program to enter a declarative area or some other invalid area
outside the program. (The computer may even find some valid machine operation,
such as X 3C', Multiply Float!) In debugging, we must determine how the program
arrived at the invalid address. In many cases, a dump of the program's registers and
storage area will be essential in tracing the cause of the error.

INVALID STATEMENT. Another common error, although not a program interrupt,

is one that the operating system generates: INVALID STATEMENT. The reason: the
system is trying to read a job control statement that is invalid. Usually, this is a
program data card—the program has gone to its end-of-file routine before all the data
was read. Possible causes: (1) missing branch instruction causing the program to
enter the EOF routine; (2) branching to the EOF routine, such as on an error condi¬
tion, without flushing remaining input data.
 APPENDIX C

360/370 INSTRUCTION SET

MACHINE INSTRUCTIONS MACHINE INSTRUCTIONS (Contd)

OP FOR OP F0R-
NAME MNEMONIC C00E MAT OPERANOS NAME MNEMONIC CODE MAT OPERANOS
Add (c) AR 1A RR R1.R2 Compare Logical Long (c) OF
CLCL RR R1.R2
Add (c) A 5A RX R1.D2(X2.B2) Convert to Binary CVB 4F RX R1.D2(X2,B2)
Add Decimal (c) AP FA SS D1(L1.BD.D2(L2.B2) Convert to Decimal CVD 4E RX R1,D2(X2,B2)
Add Halfword (c) AH 4A RX R1.D2tX2.B2l Diagnose (p) 83 Model-de pendent
Add Logical (c) ALR IE RR R1.R2 Divide DR ID RR R1.R2
Add Logical (c) AL 5E RX R1.D2IX2.B2) Divide D 5D RX R1,D2(X2,B2)
AND (c) NR 14 RR R1.R2 Divide Decimal DP FD SS D1(L1,B1),D2(L2,B2)
AND (c) N 54 RX R1 ,D2(X2,B2) Edit (c) ED DE SS D1(L.B1).D2(B2>
AND (c) Nl 94 SI D1 (B1),I2 Edit and Mark (c) EDMK DF SS D1 (L.B1 ),D2(B2)
AND (c) NC D4 SS D1 (L.B1 ),D2(B2) Exclusive OR (c) XR 17 RR R1.R2
Branch and Link BALR 05 RR R1.R2 Exclusive OR (c) X 57 RX R1,D2(X2,B2)
Branch and Link BAL 45 RX R1.D2(X2,B2) Exclusive OR (c) XI 97 SI D1 (81 >.12
Branch on Condition BCR 07 RR M1.R2 Exclusive OR (c\ XC D7 SS D1 (L.B1 ),D2(B2)
Branch on Condition BC 47 RX M1,D2(X2.B2) Execute EX 44 RX R1.D2(X2,B2)
Branch on Count BCTR 06 RR R1.R2 Halt I/O (c,p) HIO 9E00 S D2(B2)
Branch on Count BCT 46 RX R1,D2(X2.B2) Halt Device (c,p) HDV 9E01 S D2(B2)
Branch on Index High BXH 86 RS R1.R3,02(82) Insert Character 1C 43 RX R1,D2(X2,B2)
Branch on Index Low or Equal BXLE 87 RS R1,R3,D2(82) Insert Characters under Mask (c) ICM BF RS R1.M3,D2(B2)
Clear I/O (c,p) CLRIO 9D01 S D2(82l Insert PSW Key (p) IPK B20B S
Compare (c) CR 19 RR R1.R2 Insert Storage Key (p> ISK 09 RR R1.R2
Compare (c) C 59 RX R1,D2(X2.B2) Load LR 18 RR R1.R2
Compare and Swap (c) CS BA RS R1,R3,D2(B2) Load L 58 RX R1.D2IX2.B2)
Compare Decimal (c) CP F9 SS D1 (LI ,81 ),D2(L2,B2) Load Address LA 41 RX R1.D2(X2,B2)
Compare Double and Swap (c) CDS BB RS R1.R3,D2I82) Load and Test (c) LTR 12 RR R1.R2
Compare Halfword (c) CH 49 RX R1.D2(X2,B2) Load Complement (c) LCR 13 RR R1.R2
Compare Logical (c) CLR 15 RR R1.R2 Load Control (p) LCTL B7 RS R1,R3,D2(B2)
Compare Logical (c) CL 55 RX R1,D2(X2.82) Load Halfword LH 48 RX R1.D2(X2.B2)
Compare Logical <c) CLC D5 SS 01 (U.B 11.02(82) Load Multiple LM 98 RS R1.R3.D2IB2)
Compare Logical (c) CLI 95 SI D1(B1).I2 Load Negative (c) LNR 11 RR R1.R2
Compare Logical Characters CLM BD RS R1,M3.02(82) Load Positive (c) LPR 10 RR R1.R2
under Mask (c)
Load PSW (n,p) LPSW 82 S D2IB2)

382
383 360/370 Instruction Set

MACHINE INSTRUCTIONS MACHINE INSTRUCTIONS (Contd)

OP FOR
OP FOR
NAME MNEMONIC CODE MAT OPERANOS NAME MNEMONIC CODE MAI OPERANOS
Load Reel Address (c.p) LRA RX R1.D2(X2.B2)
Monitor Cail MC
B1 Store Clock (c) STCK 8205 s 02(82)
AF SI D1(B1),I2
Move MVI
Store Clock Comparator (p) STCKC 8207 s 02(82)
92 SI D1 (811,12 Store Control (p) STCTL 86 RS R1.R3,D2(B2)
Move MVC D2 SS D1(L,B1).D2(B2) Store CPU Address (p) STAP B212 S 02(82)
Move Long (c) MVCL 0E RR R1.R2 Store CPU ID (p) STIDP B202 S 02(82)
Move Numerics MVN D1 Di(L,B1),D2(B2>
Move with Offset MVO
SS Store CPU Timer (p) STPT B209 s D2(B2)
FI SS D1(L1.B1),D2(L2.B2! Store Halfword STH 40 RX R1.D2IX2.82)
Move Zones MVZ D3 SS D1(L.81),D2(B2> Store Multiple STM 90 RS R1.R3.D2(B2)
Multiply MR 1C RR R1.R2 Store Prefix (p) STPX B211 S 02(82)
Multiply M 5C RX R1,D2(X2,B2> Store Then AND System STNSM AC SI 01(81).12
Multiply Decimal MP FC SS D1 (L1.B1 ),D2(L2.B2] Mask (p)
Multiply Halfword MH 4C RX R1.D2(X2,B2) Store Then OR System Mask (p) STOSM AD SI 01(81),12
OR (c) OR 16 RR R1.R2 Subtract (c) SR IB RR R1.R2
OR (c) 0 56 RX R1.D2IX2.B2)
Subtract (c) S 5B RX R1,D2(X2.B7)
OR (c) 01 96 SI D1 (B1).I2
Subtract Decimal (c) SP FB SS D1(L1.B1).D2(L2.B2>
OR (c) OC D6 SS 01(L.B1).D2(B2)
Subtract Halfword (c) SH 4B RX R1,D2(X2.B2)
Pack PACK F2 SS D1(L1,B1).D2(L2.B2 Subtract Logical (c) SLR IF RR R1.R2
Purge TLB (p) PTLB 620D S
Subtract Logical (c) SL 5F RX R1.D2(X2.B2)
Read Direct (p) ROD 85 SI DHBU.I2 Supervisor Call SVC OA RR 1
Reset Reference Bit (c.p) RRB B213 S 02(82) Test and Set (c) TS 93 S 02(82)
Set Clock (c.p) SCK 6204 S D2(B2) Test Channel (c.p) TCH 9FOO S 02(82)
Set Clock Comparator (p) SCKC B206 s 02IB2) Test I/O (c.p) TtO 9DOO S 02IB2)
Set CPU Timer (p) SPT B208 s D21B2) Test under Mask (c) TM 91 SI DKBD.I2
Set Prefix(p) SPX B210 s D2IB2) Translate TR OC SS D1(L,B1).D2(B2)
Set Program Mask (n) SPM 04 RR R1 Translate and Test (c) TRT DO SS DHL,81),02(82)
Set PSW Key from Address (p) SPKA 820A s 02(82) Unpack UNPK F3 SS D1(L1.B1),D2(L2.B2)
Set Storage Key (p) SSK 08 RR R1.R2 Write Direct (p) WRD 84 SI D1(81).I2
Set System Mask (p) SSM 80 S D2(B2) Zero and Add Decimal (c) ZAP F8 SS D1(L1.B1).D2(L2.B2)
Shift and Round Decimal (c) SRP F0 SS D1(L1.B1).D2(82),I3
Shift Left Double (c) SLDA 8F RS R1.D2IB2)
Floating-Point Instructions
Shift Left Double Logical SLDL 8D RS R1,02(82)
OP FOR.
Shift Left Single (c) SLA 8B RS R1.D2IB2) MNEMONIC
NAME CODE HAT OPERANOS
Shift Left Single Logical SLL 89 RS R1.D2IB2) Add Normalized, Extended (c.x) AXR 36 RR R1.R2
Shift Right Double (c) SRDA 8E RS R1.D2IB2) Add Normalized, Long (c) ADR 2A RR R1.R2
Shift Right Double Logical SRDL 8C RS R1.D2IB2) Add Normalized, Long (c) AD 6A RX R1,D2(X2,B2)
Shift Right Single (c) SR A 8A RS R 1.02(82) Add Normalized, Short (c) AER 3A RR R1.R2
Shift Right Single Logical SRL 88 RS R1,02(82) Add Normalized, Short (c) AE 7A RX R1,D2(X2,B2)
Signal Processor (c.p) SIGP AE RS R1.R3.D2IB2) Add Unnormalized, Long (c) AWR 2E RR R1.R2
Start I/O (c.p) SIO 9COO S 02(82) Add Unnormalized, Long (c) AW 6E RX R1,D2(X2,B2)
Starr I/O Fast Release (c.p) SIOF 9C01 S 02IB2) Add Unnormalized, Short (c) AUR 3E RR R1.R2
Store ST 50 RX R1.D2IX2.B2I Add Unnormalized, Short (c) AU 7E RX R1,D2(X2,B2)
Store Channel ID (c.p) STIDC B203 S D2(B2)
Store Character STC 42 RX R1,D2(X2,B2) c. Condition code is set. p. Privileged instruction,
Store Characters under Mask STCM BE RS R1.M3,D2(B2) n. New condition code is loaded. x. Extended precision floating-point.

EXTENDED MNEMONIC INSTRUCTIONS*

Extended Code* Machine Instr.
Use (RX or RR) Meaning (RX or RR)
General B or BR Unconditional Branch BC or BCR 15,
NOP or NOPR No Operation BC or BCR 0,
After BH or BHR Branch on A High BC or BCR 2,
Compare BLor BLR Branch on A Low BC or BCR 4,
Instructions BE or BER Branch on A Equal B BC or BCR 8,
(A:B) BNHor BN HR Branch on A Not High BC or BCR 13.
BNL or BNLR Branch on A Not Low BC or BCR 11,
BNE or BNER Branch on A Not Equal B BC or BCR 7,
After BO or BOR Branch on Overflow BC or BCR 1.
Arithmetic BP or BPR Branch on Plus BC or BCR 2,
Instructions BM or BMR Branch on Minus BC or BCR 4.
BNP or BNPR Branch on Not Plus BC or BCR 13,
BNM or BN MR Branch on Not Minus BC or BCR 11,
BNZ or BNZR Branch on Not Zero BC or BCR 7,
BZ or BZR Branch on Zero BC or BCR 8.
After Test BO or BOR Branch if Ones BC or BCR 1,
under Mask BM or BMR Branch if Mixed BC or BCR 4,
Instruction BZ or BZR Branch if Zeros BC or BCR 8,
BNO or BNOR Branch if Not Ones BC or BCR 14,

•Second operand not shown; in all cases it Is ^For OS/VS and DOS/VS;
D2(X2,B2) for RX format or R2 for RR format. source: GC33-4010.
 APPENDIX D

DOS AND OS JOB

CONTROL

DOS JOB CONTROL

Figure D-1 illustrates an example of conventional job control to assemble and exe¬
cute a program under the Disk Operating System.

//JOB job-name Job-name may be 1-8 characters.

// OPTION DECK,DUMP,LIST,LOG,XREF DECK: Punch an assembled object deck (or NODECK).
DUMP: Print contents of storage on abnormal
execute error (or NODUMP).
LIST: List the assembled program (or NOLIST).
LOG: Print the job control cards (or NOLOG).
XREF: Print a cross-reference of symbolic names
after the assembly (or NOXREF).
ACTION MAP Print a map of the “link-edited” program (NOMAP).
// EXEC ASSEMBLY Load Assembler program into storage, begin assembly.

• (source program here)

t* Denotes end of assembly.

II EXEC LNKEDT Perform “link-edit” — include input/output routines.
// EXEC Load assembled program into storage, begin execution.

• (test data here)

I* Denotes end of data.
/& Denotes end of job, return control to Supervisor.

FIGURE D-1 Conventional DOS job control.

384
385 DOS and OS Job Control

Larger DOS systems provide for cataloguing commonly-used job control on

disk, in the "Procedure Library". The preceding example of job control could be
catalogued, for example, to provide for automatic assembly, link-edit and execute,
through the use of only a few job statements, as in Figure D-2.

* $$ JOB jobname Job-name may be 1-8 characters.

// EXEC PROC= ASSEMBLY The catalogued procedure "Assembly” contains
assembly, link-edit and execute job statements.

(source program here)

Denotes end of assembly.
I*

• (test data here)

/* Denotes end of data.

/& Denotes end of job.
* $$ EOJ

FIGURE D-2 DOS job control under catalogued procedure.

DOS JOB CONTROL FOR MAGNETIC TAPE

We use the same job control cards for magnetic tape as for card and printer pro¬
grams. However, tape files require additional information to provide greater control
over the file. Under DOS, two additional job cards are LBLTYP and TLBL.
// LBLTYP TAPE precedes // EXEC LNKEDT, and informs the Linkage Editor to
reserve 80 bytes ahead of our program for processing tape file labels. If our program
normally loads in location X'3800', with LBLTYP it will load in X'3850'. TLBL follows
// EXEC LNKEDT and provides details of our file to IOCS.

II TLBL filename, ‘file-ID’, date, file-serial-number, volume-sequence-number,

© © © © ©
file-sequence-number, generation-number, version-number
© © ©
© filename The name of our DTFMT, the only required entry for TLBL.
© ‘file-ID’ The file identifier in the file label, 1-17 characters.
© retention date One of two formats: (1) yy/ddd—the date of retention, e.g.
85/030 tells IOCS to retain the file until Jan. 30, 1985;
(2) dddd—for output files, we may code a retention period
in days.
@ file serial 1-6 characters, the volume serial number for the first or
number only volume of the file.
© volume sequence 1-4 digits for the volume number in a multi-volume file,
number
© file sequence 1-4 digits for the file number in a multi-file volume.
number
© generation no. 1-4 digits for the generation number.
© version number 1-2 digits for the version number.
If we omit the entry for e, f, g or h, IOCS assumes ‘1 ’ if output, and ignores if input.

FIGURE D-3 DOS job control for magnetic tape.

 386 APPENDIX D

DOS JOB CONTROL FOR DIRECT ACCESS STORAGE DEVICES

Each extent for the file requires two job control cards, DLBL and EXTENT, equivalent
to the magnetic tape TLBL card (a file may be stored on more than one extent).

// DLBL filename, ‘file-ID’, date, codes

© © © ©
(a) filename The name of our DTFSD, 1-7 characters.
© ‘file-ID' Our file-ID (within apostrophes), 1-44 characters. This is the
first field of the format-1 label. We can code file-ID and option¬
ally generation and version number. If we omit this entry, IOCS
uses the filename.
© retention One of two formats: (1) dddd = retention period in days; and (2) yy/ddd
date = the date of retention, e.g., 85/030 means retain file until January 30,
1 985. If we omit this entry, IOCS assumes 7 days.
(d) codes The type of file label: SD-Sequential Disk; ISC-Index Sequential
Create; ISE-Index Sequential Extend; DA-Direct Access. If we
omit this entry, IOCS assumes SD.

// EXTENT symbolic-unit, serial-no., type, sequence-no., relative-track,

© © © © ©
number of tracks, split-cylinder track
© ©
© symbolic The symbolic unit SYSnnn for the file. If we omit this entry,
unit IOCS assumes the unit from the preceding EXTENT, if any.
© serial The volume serial number for the volume. If we omit this entry,
number IOCS uses the number from the preceding EXTENT, if any.
© type The type of extent. If omitted, IOCS assumes type 1. 1 —Data area
with no split cylinder; 2—Independent overflow area for IS;
4—Index area for IS; 8—Data area, split cylinder.
@ sequence The sequence number (0-255) of this extent in a multi-extent
number file. Not required for SD and DA, but if used the extent begins
with 0. For IS with a master index, the number begins with 0-
otherwise IS files begin with extent 1.
© relative
1-5 digits to indicate the sequential track number, relative to 0
track
where the extent begins. The formula to calculate the relative
track is:
RT = tracks per cylinder x cyl. no + track no.
Example fora 2311 (10 tracks/cylinder), on cylinder-3, track-4-
K I - (10 x 3) + 4 = 34.
© number of
1-5 digits to indicate the number of tracks allocated for the file
tracks on this extent.
® split
cylinder Di8c^Sf°r19,t° S'gnify the uPPertrack number for split cylinders
in SD files. (There may be more than one SD file within a
track cylinder.)

Note: the LBLTYP job control entry used for tape is also required for non-
sequentuaPdisk. For example, if there are two non-sequential disk files in the
program, the entry is//LBLTYP NSD(2).

FIGURE D-4 DOS job control for DASD.

387 DOS and OS )ob Control

OS JOB CONTROL

There are different versions of OS job control language. The following illustrates one
version, providing for assembly, link-edit, and execution of test data. The program
uses a card and a printer file, both of which require a DD (Data Definition) job card.

//jobname [optional account#, acctg information, programmer name]

//stepname EXEC ASMGCLG Use ASMG simply to assemble, with no execute.

1—1-“Level” of Assembler, e.g., “F" or "G”.
I-“Compile” (assemble).
--“Link-edit” the assembled program.
-“Go,” or execute the link-edited program.

//ASM.SYSIN DD * * Denotes that program deck on cards immediately

follows.

(program source deck)

/* Denotes end of assembly.

//GO.SYSUDUMP DD SYSOUT = A Causes printing of execution error diagnostics.

//GO.printername DD SYSOUT = A Data Definition for printer in program DCB.

('A’ is class of output for printer.)

//GO.readername DD * Data Definition for card reader. * indicates

that card data immediately follows.

(test data here)

/* Denotes end of data.

II Optional entry for end of job.

FIGURE D-5 Simple OS job control.

The use of OS job control for magnetic tape and disk is explained along with
the program examples.
 APPENDIX E

SPECIAL MACROS: INIT,

PUTPR, DEFCD, DEFPR, EO)

Included in this appendix are the special macros used at the beginning of this text:
INIT, PUTPR, DEFCD, and DEFPR. The macros are simple to implement and to use,
and anyone is free to catalogue them. Beginners often have trouble coding the
regular full macros, making punctuation and spelling errors and omitting entries. The
use of macros such as the ones in this appendix can avert a lot of initial coding
mistakes and can free the beginner to concentrate on programming logic.
The INIT macro (used to establish base register addressability) requires versions
for both DOS and OS (Figure E-1 and E-2). A further refinement (recommended)
could include the DOS STXIT or OS SPIE macro for error recovery.
PUTPR (Figure E-3) generates two instructions, of the form:

MVI PRINT,X’nn’ Insert control character

PUT PRTR,PRINT Print line

If the control character supplied is invalid, the macro-instruction generates write/

space one line.

388
 MACRO
SINITZE IN IT
SINITZE START X* CA078*
E ALR 3,0 L 0 AO BASE REGISTER 3
USING *.3.4,5 ASSIGN BASE REGS 3,4 S 5
LA 5.2048 LOAD X•800• (1/2 OF X * 1000• )
LA 4,2 0 4 8( 3,5 ) LOAD BASE REG 4
LA 5.2048(4,5) LOAD BASE REG 5
FIGURE E-1 MEND

MACRO
SINITZE INIT
SINITZE C SEC T
SAVE (14.12) SAVE REGISTERS FOR SUPERVISOR
B ALR 3,0 LOAC BASE REGISTER 3
USING *.3.4,5 ASSIGN EASE REGS 3 • 4 <4 5
ST 13.SAVEAREA+4 SAVE ADDRESSES FOR RE TURN
LA 13,SAVE AREA * TO SUP ER V I SOR
LA E• 204e LOAD X•8 C 0• (1/2 OF X'looo*)
LA 4,2048(3.5) LOAD BASE REG 4
LA 5,2048(4,5) L C AD eASE REG 5
B SAVE AREA+le*4
SPACE
SAVEAREA DC 18F■0• REG . SAVEAREA FOR INTERRUPTS
FIGURE E-2 MEND

MACRO
&WR1TE PUTPR SF1LE.SPRAREA.SCTLCHR
LCLC SCTL
. *
. VALAREA AIF ( •SCTLCHR• NE •WSPl• ).NEXT 1 PRINT S SPACE 17
SCTL SETC •X*'G9'••
AGO •NEXT9
.♦
.NEXT 1 AIF (•SCTLCHR* NE •■SP2•).NEXT2 PRINT S SPACE 27
SCTL SETC •X* *1 1* ••
AGO • NE XT 9
.*
• NE XT 2 A I F (•SCTLCHR* NE •*SP3•).NEXT3 PRINT S SPACE 37
SCTL SETC •X*•19*••
AGO • NE XT 9
.*
• NEXT 3 AIF (•SCTLCHR* NE *SP1*).NEXT4 SPACE 1. NO PRINT7
SCTL SETC •X* *00* *•
AGO • NEXT 9
. *
•NEXT4 SPACE 2, NO PRINT?
AIF (•SCTLCHR* NE *SP2*).NEXT5
SCTL SETC •X* • 13* * •
AGO • NE X T 9
. *
• NEXT 5 AIF (•SCTLCHR* NE *SP3*).NEXT6 SPACE 3, NO PRINT?
SCTL SETC •X* • IB* • *
AGO •NEXT9
. *
.NEXT 6 A IF (•SCTLCHR* NE 'SK1M.NEXT7 SKIP TO NEW PAGE?
SCTL SETC •x*•ee*••
AGO •NEXT9
.*
•NEXT7 A IF (•SCTLCHR* NE • WSPO* I.NEXTd PRINT S SPACE 0?
SCTL SETC •X* *01• ••
AGO • N E XT 9

•NEXT0 MNOTE 1.‘INVALID PRINT CONTROL - DEFAULT TO WSP1*

SCTL SETC • X* •09• • •
.*
• NEXT 9 ANOP
SWR ITE MV I SPRAREA.SCTL MOVE CTL CHAR TO PRINT
POT SFILE.SPRAREA * S PRINT

FIGURE E-3 • NEXT 10 ANOP

MENO

389
 390 APPENDIX E

DEFCD and DEFPR define the card reader and the printer respectively, and
assume a workarea for PUT and use of IBM machine code rather than the ASA
control characters. DEFCD checks the validity of the supplied end-of-file address, a
useful test. The DOS versions (Figure E-4 and E-5) generate DTFCD and DTFPR, and
the OS versions (Figure E-6 and E-7) generate DCB's. The particular entries may vary
slightly by installation.

MACRO
4CDFILE DEFCD 4ECF
A IF (T * 4EOF EO *1* OR T * 4EOF EO • M* ).A 10 EOF ADDRESS VALID?
MNOTE 1••EOF ADDRESS NOT DEFINED* NO -
4EOF CLOSE 4C0FILE * GENERATE EOF ROUTINE
EOJ
•A1 0 ANOP
4CDFILE DTFCD BLKSI2E=B0. DEFINE CARD FILE ♦
DEVADDR=SYSIPT• ♦
CEVICE=1442. ♦
E0FADDR=4ECF, ■f
IOAREA1=CDBUFF1 • ♦
I0AREA2=CDBUFF2 • ♦
TYPEFLE=INPUT• +
»ORKA=YES
SPACE
COBUFF 1 DC CLBO* • CARC BUFFER-1
CDBUFF2 OC CL 80 * • CARD BUFFER-2

FIGURE E-4

MACRO
4PRFILE DEFPR
4PRFILE DTFPR BLKSIZE=133, DEFINE PRINTER FILE •f
CTLCHR=YES.
+
CEVADDR=SYSLST.
♦
DEVICE=1403,
♦
IOAREA1=PR0UFF1,
♦
I0AREA2=PRBUFF2,
♦
*ORKA=YE S
SPACE
PR8UFFl CC CL133* •
PRINT BUFFER-1
PRBUFF2 DC CL133* •
PRINT EUFFER-2
SPACE
MEND
FIGURE E-5

MACRO
4CDFILE DEFCD 4EOF
A IF ( T • 4EOF EC • I • OR T•4EOF EQ *M*).A10 EOF ADDRESS VALID?
MNOTE 1••EOF ADDRESS NOT DEFINED* NO -
4EOF CLOSE 4CDFILE *
GENERATE EOF ROUTINE
EOJ
• Alb ANOP
4CDFILE DC B DDNAME = SYSIN,
DEFINE CARD FILE +
DEV 0= CA,
♦
D S0RG = P S•
+
EQDAD=4E0F,
♦
MAC RF =(GM )
MEND
FIGURE E-6
391 Special Macros: INIT, PUTPR, DEFCD, DEFPR, EOJ

MACRO
SPRFILE DEFPR
+
SPRFILE DC 8 DDNAME=SYSPRINT,
OEVO=DA,
+
DSCRG=PS.
RECFM=FBSM,
MACRF = < PM)
SYSPRINT EQU SPRFILE
ENTRY SYSPRINT
MEND
FIGURE E-7

DOS already has a simple EOJ macro. The one included here (Figure E-8) is for
OS, to generate the load savearea and return, to tie in with the OS INIT macro.

MACRO
SLABEL EOJ
* DOS COMPATIBLE EXIT ROUTINE FOR OS G. KIDD
SLABEL L 13.SAVEAREA+4 END-OF-JOB. RETURN
RETURN (14.12) * TO SUPERVISOR
MEND
FIGURE E-8
INDEX

&SYSUST, 319 Addressing, 19, 127

&SYSNDX, 319 Addressing Exception, 380
AE, AER (Add Float), 367
AGO, 310, 311
A (Add Fullword), 198 AF1 (Add Flalfword), 198
A-format (see also Address constant), AIF, 310, 311
190 AL, ALR (Add Logical), 237
ABEND macro, 38, 160 Alignment on 370, 191
Access motion, 279 Alphameric data, 7
Access time, 6 Alternate track, 278
ACTION, 384 AND (N, NC, Nl, NR) operations, 241
ACTR, 310 ANOP, 310, 313
AD, ADR (Add Float), 367 AP (Add Packed), 86
ADDR1, 30, 53 AR (Add Register), 198
Address, 19, 27 Argument:
Address constant (Type-A), 190 in table, 218
Address marker, 281 in TR, 250
Addressability error, 73 in TRT, 252

392
393 INDEX

Arithmetic: Binary search, 227

binary, 127, 198 Binary shift, 203, 239
decimal (packed), 86 Bit, 9, 11
floating-point, 367 BL (Branch Low), 63, 141
Array (see Table) Blank, 43, 56
ASA control character, 149 Block, 262
ASCII code, 249 Block control word, 273
Assemble, 1 8, 341 Block count, 270
Assembler, 1 8 Blocked records, 262, 272
Assembler instructions, 24 Blocking factor, 262
Assembler listing, 29 BM (Branch Minus), 87, 141
Assigning a base register, 136 BO (Branch Overflow), 87, 141
Asterisk total indication, 105 Boolean logic, 241
Attributes for Conditional Assembly, 310 Boundary alignment, 188
AU, AUR, AW, AWR (Add Unnor¬ BP (Branch Plus), 87, 141
malized), 369 BR (Branch Register), 141, 163
Branching, 63, 87
Buffer (I/O Area), 144, 146, 156, 325
B (unconditional branch), 64, 141 BXH (Branch Index High), 221
B-format, 187 BXLE (Branch Index Low/Equal), 221
BAL (Basic Assembler Language) (see Byte, 9, 11
Assembler) BZ (Branch Zero), 87, 141
BAL (Branch and Link), 163
BALR (Branch and Link Register), 128,
137 C (Compare Fullword), 199
Base, 14, 16, 358 CALL macro, 327, 331
Base register: CALL, SAVE, and RETURN, 327
addressing, 58, 127 CANCEL macro, 38
defined, 19 Card, 6
initialize multiple, 129, 193, 195 Card file, 35, 1 50
initialize one, 128, 138 Carriage control tape, 149
BC (Branch on Condition), 141 CCB, 353
BCR (Branch on Condition Register), 141 CCW, 353
BCT (Branch on Count), 221 CD, CDR, CE, CER (Compare Float), 369
BCTR (Branch on Count Register), 221 Central Processing Unit (CPU), 4, 6, 10
BE (Branch Equal), 63, 141 CH (Compare Halfword), 199
BH (Branch High), 63, 141 Channel Command Word (CCW), 353
Binary arithmetic, 186, 198 Channel for carriage control tape, 149
Binary comparisons, 199 Channel for input/output, 350
Binary constant (Type B), 187 Channel scheduler, 346
Binary data, 12, 185 Character format, 12, 55
Binary data packing, 239 Character instructions, 58
Binary numbers, 8, 186 Characteristic (Float), 360
Binary point, 9 CL (Compare Logical), 239
394 INDEX

CLC (Compare Logical Character), 62 CSECT (Control Section), 135, 323

CLCL (Compare Long), 217 CVB (Convert to Binary), 191
CLI (Compare Logical Immediate), 65 CVD (Convert to Decimal), 191
CLOSE macro, 36, 147 Cylinder, 280
CLR (Compare Logical Register), 239 Cylinder Index, 288
CNTRL macro, 149 Cylinder Overflow Area, 289
COCR (Cylinder Overflow Control Re¬
cord), 288
Codes, 41 D (Divide Register), 205
Coding, 26 D-format (Doubleword format), 362
Coding sheet, 21 DASD (Direct Access Storage Device),
Command Control Block (CCB), 353 277
Comments, 23, 24, 307 DATA (entry in PRINT statement), 26
Communication Region, 346 Data Exception, 97, 380
Compare (see C, CH, CLC, CLI, and CR) Data Management, 145
Completion code, 97 Data Record formats (disk), 281
COMRG (Communication Region), 215 Data Set, 40, 1 53
Concatenation, 308 Data transfer rate (disk), 280
Condition code, 39, 62, 87, 89, 141, Date from Communications Region, 21 5
238, 245, 253 DC (Define Constant):
Conditional Assembly instruction, 310 address (A), 190
Conditional branch, 63, 87 binary (B), 1 87
Connector (flowchart), 45 character (C), 55
Constant (see DC) definition of, 27
Continuation, 24 floating-point (D,E), 362
Continuous forms, 8 fullword (F), 1 88
Control, 6 halfword (H), 1 88
Control character, 149 hexadecimal (X), 77
Control program, 4 packed (P), 81
Control Section (see CSECT) zoned (Z), 79
Control unit, 6, 351 DCB (Data Control Block), 153
Conversion of double-precision binary, DD (Data Definition job statement), 1 53,
208 265, 284
Conversion of Float to Packed, 374 DD, DDR, DE, DER (Divide Float), 373
Conversion of Packed to Float, 374 Debugging, 73, 96, 123, 142, 160, 182,
Core Image Library, 344 210, 234
Count Area, 281 Decimal data (see Packed data)
Count attribute (macros), 311 Decimal precision, 107, 111
Count-Key-Data format, 281 Decimal-Divide Exception, 123, 380
CP (Compare Packed), 88 Decimal-Overflow Exception, 380
CPU (see Central Processing Unit) Declaratives (see DC and DS)
CR (Compare Register), 199 DEFCD macro, 35, 388
Cross Reference Table, 338 Define Constant (see DC)
395 INDEX

Define Storage (see DS) End-of-file:

DEFPR macro, 35, 388 card, 35, 1 52, 1 55
Delete code (ISAM), 296 disk, 281
Device independence, 158 tape, 263, 271
Diagnostic messages, 30 End-of-Tape marker, 261
Digit selector, 102 End-of-Volume, 269, 271
Direct Access Storage Device (DASD), ENDFL macro, 292
277 Entry Point Address (EPA), 98, 338
Direct file organization, 282 ENTRY statement, 338
Direct table addressing, 224 EOJ macro, 38, 391
Disk labels, 284 EPA (see Entry Point Address)
Disk Operating System (see DOS) EQU statement, 68
Disk pack, 278 Error detection, 96
Displacement, 19, 58, 128 ESETL macro, 296
DLBL, 386 EX (Execute), 247
Documentation, 167 Excess-64 notation, 360
DOS, 97, 342 EXCP (Execute Channel Program), 354
Double-precision binary, 208, 238 EXEC statement, 384
Double-precision float, 362 Execute Exception, 380
Doubleword format (D-type), 191, 362 Explicit length, 59
DP (Divide Packed), 110 Explicit use of base register, 213
DR (Divide Register), 205 Exponent, 358
DROP base register, 326 Exponent modifier, 362
DS (Define Storage), 27, 52 Exponent-Overflow Exception, 380
DSECT (Dummy Section), 324 Extend an ISAM file, 290
DTFCD macro, 1 50 Extended mnemonics, 141, 383
DTFDI macro, 1 58 Extended-precision Floating-point, 362
DTFIS macro, 292 Extent (disk), 286
DTFMT macro, 262 External address constant (V-type), 329
DTFPR macro, 1 52 EXTRN statement, 338
Dummy Section (DSECT), 324
DUMP macro, 1 60
Duplication factor, 52, 55 F-format (Fullword format), 188
FETCH macro, 337
Field, 7
E-format, 362 File:
EBCDIC code, 12, 249 card, 35
ED (Edit), 101 disk, 282
Edit word, 102 printer, 35
EDMK (Edit and Mark), 214 tape, 265
Effective address, 139 File Definition macro, 35, 146, 1 50, 1 53
EJECT statement, 25 File label, 267, 286
END statement, 26, 38 FilenameC, 293
396 INDEX

Fill character, 102 Independent Overflow area, 290

Fixed length record, 262 Index Point, 280
Fixed Storage Locations, 345 Index register, 1 34
Fixed-Point data (see Binary data) Indexed Sequential Organization, 282,
Fixed-Point-Divide Exception, 380 287
Fixed-Point-Overflow Exception, 380 INIT macro, 35, 388
Floating-point format, 357 Initial Program Load (IPL), 284, 343
Floating-point register, 363 Initialization under OS, 139
Flowchart, 44, 1 65 Input, 36, 40, 54
Format-1 label, 286 Input/Output, 5, 11, 144
Fraction for Floating-point, 359 Input/Output Control System (IOCS), 145
Fullword format (F-type), 188 Instruction, 12, 20, 23
Function (tables), 218, 250, 252 Instruction address, 98, 348
Instruction alignment, 61
Instruction format, 20, 130
GBLA, GBLB, GBLC, 320 Interblock gap (IBG), 262
GEN (entry in PRINT statement), 25 Interrupts, 97, 346, 348
General Purpose Register (see Register) I/O Area (see Buffer)
Generations of computers, 3 IOCS (Input/Output Control System), 145
GET macro, 36, 43, 147 IOCS modules, 153, 337
Global Set symbol, 320 IOREG macro entry, 157
Guard digit, 367 IS (see Indexed Sequential Organization)
ISAM (see Indexed Sequential Organiza¬
tion)
FH-format (Halfword format), 188 ISEQ statement, 26
Halfword format (H-type), 1 88
HALT I/O, 145
HDR, HER (Halve Float), 371 JCL (Job Control Language), 47
Header labe!, 268 Job control, 47, 341, 384
Header statement (macro), 304
Hexadecimal arithmetic, 15
Hexadecimal conversion, 377 K (measurement of storage size), 11
Hexadecimal format (X-type), 14, 43, 76 Key, 281
High-level language, 21 Key Area, 281
Home Address, 280 Keyword macro, 304, 307

IBG (Interblock gap), 262 L (Load), 192

1C (Insert Character), 246 L-format, 362
Identification Sequence (ISEQ), 24, 26 LA (Load Address), 192
Immediate operand, 65 Label (see Name)
Imperative macro, 146 LBLTYP statement, 385
Implicit length, 59 LCDR, LCER (Load Complement Float),
INCLUDE statement, 333 365
397 INDEX

LCLA, 314 LTORG statement, 67

LCLB, 314 LTR (Load & Test Register), 196
LCLC, 314
LCR (Load Complement), 196 M (Multiply Fullword), 201
LD, LDR, LR, LER (Load Float), 364 Machine language, 17
Length indication, 52, 55 Macro definition, 304
LH (Load Halfword), 192 Macro expansion, 305
Libraries, 344 Macro writing, 303
Link edit, 336, 343 Macro-instruction, 21, 305
Link Edit Map, 337 Magnetic tape, 259
Linkage between phases, 333 Main logic section, 166
Linkage between subprograms, 326 Main storage (see Storage)
Linkage between subroutines, 164 Mask:
Linkage Editor control statement, 333 Boolean operation, 241
Linkage register, 140 branch instruction, 141
LIOCS (Logical IOCS), 145 Master index, 289
Literal, 66 MD, MDR, ME, MER (Multiply Float),
Literal pool, 67 372
LM (Load Multiple), 192 Memory (see Storage)
LNDR, LNER (Load Negative Float), 365 MEND statement, 307
LNKEDT statement, 384 MEXIT statement, 313
LNR (Load Negative), 196 MH (Multiply Halfword), 201
Load base register, 137, 193, 195 Minus sign:
Load an ISAM File, 290, 297 binary, 1 88
LOAD macro, 337 card, 7
Load point address (see Entry Point Ad¬ packed, 86
dress) zoned, 79
Load Point Marker, 261 Mixed-type macro, 304, 315
Load register operations, 192 MNOTE statement, 313
LOC (see Location Counter) Model statement, 305
Local Set Symbol, 314 MP (Multiply Packed), 106
Locate mode, 156 MR (Multiply Register), 201
Location Counter, 19, 29, 53, 1 19, 136 Multi-file volume, 267
Multi-volume file, 267
Logic, 6
Logical expression, 312, 318 Multiplexor channel, 350
Logical IOCS (LIOCS), 145 Multiprogramming, 130
Logical operation, 237 MVC (Move Character), 58
MVCL (Move Character Long), 217
Logical operators, 312
MVI (Move Immediate), 65
Logical record, 145
MVN (Move Numeric), 77
Low-level language, 21
LPDR, LPER (Load Positive Float), 365 MVO (Move with Offset), 108
MVZ (Move Zones), 77
LPR (Load Positive), 196
LR (Load Register), 192
LTDR, LTER (Load & Test Float), 365 N (AND), 241
398 INDEX

Name (label), 23 Physical IOCS (PIOCS), 145, 353

NC (AND Character), 241 PIOCS (see Physical IOCS)
Nl (AND Immediate), 241 Positional macro, 304
NOP (No-Operation), 244 Primary track, 278
Normalization, 361, 367 Prime data area, 288
NR (AND Register), 241 PRINT instruction, 25
Printer, 8
Printer file, 35
O (OR), 241 Printing lines, 37
Object code format, 131 Privileged instruction, 145
Object program, 19, 29 Privileged-Operation Exception, 379
OC (OR Character), 241 Problem program, 145
Ol (OR Immediate), 241 Product length, 106, 201
OPEN macro, 36, 147 Program Information Block (PIB), 347
Operand, 23 Program interrupt, 14, 348, 379
Operating system, 13, 340 Program relocatabiI ity, 130
Operation, 23 Program Status Word (PSW), 13, 98, 347
Operation Exception, 73, 379 Programmer Logical Unit, 352
Operator's guide, 1 70 Programming style, 162
OPTION statement, 384 Protection Exception, 380
OR, 241 Prototype statement (macro), 304
ORG statement, 119 PSW (see Program Status Word)
OS (Operating System), 97, 139, 342 Punched card, 6
Overflow: PUT macro, 148
binary, 206 PUTPR macro, 37, 388
packed, 86 PUTX macro, 298
Overflow area (disk), 289
Overflow entry, 289
Overlay phase, 336 Quotient:
binary, 206
packed, 110
P-format (see Packed format)
PACK, 82
Packed data, 80 Radix point, 360
Packed format (P-type), 12, 80 Random retrieval, 290, 293
Packed operations, 82 READ macro, 294
Page overflow, 91 Record, 7, 36
Parameter, 331 Record control word, 273
Parity bit, 9 Record overflow, 281
Pass parameter, 331 Reflective marker (see Tape marker)
PDUMP (Partial Storage Dump), 121 Register:
Phase, 333 floating-point, 363
PE1ASE statement, 333 general purpose, 12, 126
Physical address, 351 Register restrictions, 127
399 INDEX

Relational operators, 312 Sign:

Relative addressing, 20, 55, 60 of binary number, 188
Relocatable library, 344 of decimal number, 86
Relocation factor, 98 of floating-point, 360
Remainder: of zoned number, 79
binary, 206 Significance Exception, 381
packed, 110 Significance starter, 102, 215
RETURN macro, 140, 329 Single-precision float, 362
ROOT phase, 333 SL (Subtract Logical), 237
Rotational delay (disk), 280 SLA (Shift Left Algebraic), 203
Rounding: Slash-asterisk (/*) job control, 35, 384
binary, 207 SLDA (Shift Left Double Algebraic), 203
packed, 107, 111, 216 SLDL (Shift Left Double Logical), 239
RR-format, 133 SLL (Shift Left Logical), 239
RS-format, 133 SLR (Subtract Logical Register), 237
RX-format, 1 34 Sort routine, 226
Source document, 7
Source program, 18
S (Subtract Fullword), 198 Source statement library, 344
S-format, 131 SP (Subtract Packed), 86
SAVE macro, 140, 329 SPACE statement, 25
Savearea for registers, 140, 327 Specification Exception, 380
Scale modifier (floating-point), 363 SPIE macro, 98
Scan (see TRT) SR (Subtract Register), 1 98
SD, SDR, SE, SER (Subtract Float), 367 SRA (Shift Right Algebraic), 203
Search argument (tables), 218 SRDA (Shift Right Double Algebraic),
Selector channel, 350 203
Self-relocating program, 147 SRDL (Shift Right Double Logical), 239
Sequence symbol, 311 SRL (Shift Right Logical), 239
Sequence-checking, 39 SRP (Shift & Round Packed), 216
Sequential file organization (disk), 282 SS-format, 58, 132
Sequential processing of an ISAM file, ST (Store Register), 196
296 Standard file label, 267, 286
SET symbol, 306, 314 Standard tape label, 267
SETA, 314 START instruction, 135
SETB, 318 START I/O, 145
SETC, 316 Status condition, 293, 295
SETFL macro, 292 STC (Store Character), 246
SETL macro, 296, 297 STD, STE (Store Float), 366
SH (Subtract Halfword), 198 STH (Store Halfword), 196
Shift: STM (Store Multiple), 196
binary number, 203, 239 STMT, 30
decimal number, 108, 216 Storage, 5, 11
Sl-format, 65, 131 Storage dump, 121, 160
400 INDEX

Storage Immediate (see Sl-format) Track index, 288

Trailer label, 269
Storage Protection, 346
Trailer statement, 305
Storage-to-Storage (see SS-format)
Transient area, 347
Store register operations, 196
Translate (see TR and TRT)
Stored program, 1 7
TRT (Translate and Test), 252
Structured programming, 166
True zero, 362
STXIT macro, 98
Two's complement representation, 186
SU, SUR (Subtract Unnormalized Float),
369
Subject instruction, 247 Unconditional branch, 64
Subprogram, 323 UNPK (Unpack), 84
Subroutine, 1 63 USING statement, 128, 136, 330
Supervisor, 13, 145, 342, 344
Utility program, 344
SVC (Supervisor Call), 348
SW, SWR (Subtract Unnormalized Float),
369 V-type constant, 329
Switch, 244, 31 8 Variable length field, 246, 249, 254
Symbol length attribute, 60 Variable length record, 262, 272
Symbolic assignment, 352 Variable symbol, 306
Symbolic language, 1 8 Virtual storage, 323
Symbolic parameter, 306 Volume label:
SYS address (see System logical unit) disk, 284, 286
System logical unit, 352 tape, 267
System service programs, 343 VSAM, 282
System variable symbol, 306, 319 VTOC (Volume Table of Contents), 284
SYSUDUMP, 97, 389

WAIT macro, 354

Table, 21 8, 250 WAITF macro, 294
Table look-up, 219 Workarea, 1 52
Tape labels, 267 WRITE macro, 292, 294
Tape mark, 270
Tape marker, 261
Target (Boolean operation), 241 X, XC, XI, XOR, XR (Exclusive OR), 241
Test Channel, 145 X-format (see Hexadecimal format)
TEST I/O, 145
TIME macro, 21 5
TITLE statement, 25 Z-format (Zoned format), 78
TLBL entry, 385 ZAP (Zero and Add Packed), 86
TM (Test Under Mask), 244 Zero duplication factor, 54
TR (Translate), 249 Zero suppression, 102
Track (disk), 278 Zone portion of byte, 12
Track descriptor record, 280, 284 Zone punch, 7
Track format, 280 Zoned format (Z-type), 78
 PROGRAMMING ASSEMBLER LANG¬
UAGE brings a practical approach to tech¬
nical problem-solving. Real-world program¬
ming assignments prepare the user for typi¬
cal data processing applications. Naming
conventions, programming standards and
strategies, and preferred organizational for¬
mat conform to accepted practice among
data processing professionals, easing the
transition for the newcomer to everyday
procedures he or she will find on the job.
This thorough look at ASSEMBLER gives
programmers an especially clear introduction
to the language. PROGRAMMING ASSEM¬
BLER LANGUAGE is a valuable guidebook/
reference you’ll want to keep for years to
come.

Peter Abel is currently with the Department

of Computer Systems, British Columbia
Institute of Technology.

RESTON PUBLISHING COMPANY, INC.

A Prentice-Elall Company
Reston, Virginia
PROGRAMMING
ASSEMBLER LANGUAGE
PETER ABEL
Programmers who know ASSEMBLER are in great demand today be¬
cause of the understanding this high-level language gives them of the
computer’s machine language. Peter Abel’s new ASSEMBLER reference
book gives programmers a solid introduction to the language’s capa¬
bilities and usages. This detailed look at ASSEMBLER covers every¬
thing you’ll need to know to apply this language with ease—diagnostics,
condition codes, operations, registers are just a sampling of the many
specifics included. The Table of Contents:

• INTRODUCTION TO THE COMPUTER AND THE ASSEMBLER

Basic Computer Concepts
The Assembler
Program Execution
• BASIC ASSEMBLER CODING
Programming for Character Data
Decimal Data and Arithmetic I
Decimal Arithmetic II
Base Registers and Instruction Format
Input and Output
Strategy, Style, and Standards
• BINARY OPERATIONS
Registers and Binary Programming
Explicit Use of Base Registers
Logical Operations and Bit Manipulation
• EXTERNAL STORAGE
Magnetic Tape
Direct Access Storage
• ADVANCED TOPICS
Macro Writing
Subprograms and Overlays
Operating Systems
Floating-Point Operations

RESTON PUBLISHING COMPANY, INC.

A Prentice-Ha I I Company
Reston, Virginia