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3D electronics for hybrid pixel detectors – TWEPP-09
/ Godiot, S (Marseille, CPPM) ; Barbero, (Bonn U.) ; Chantepie, B (Marseille, CPPM) ; Clémens, J C (Marseille, CPPM) ; Fei, R (Marseille, CPPM) ; Fleury, J (LBL, Berkeley) ; Fougeron, D (Marseille, CPPM) ; Garcia-Sciveres, M (LBL, Berkeley) ; Hemperek, T (Bonn U.) ; Karagounis, M (Bonn U.) et al.
Future hybrid pixel detectors are asking for smaller pixels in order to improve spatial resolution and to deal with an increasing counting rate. Facing these requirements is foreseen to be done by microelectronics technology shrinking. [...]
CERN, 2009
Published version from CERN: PDF;
In : Topical Workshop on Electronics for Particle Physics, Paris, France, 21 - 25 Sep 2009, pp.220 (CERN-2009-006)
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2.
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FE-I4 ATLAS pixel chip design
/ Barbero, Marlon (Bonn U.) ; Arutinov, David (Bonn U.) ; Hemperek, Tomasz (Bonn U.) ; Karagounis, Michael (Bonn U.) ; Kruth, Andre (Bonn U.) ; Wermes, Norbert (Bonn U.) ; Beccherle, Roberto (INFN, Genoa) ; Darbo, Giovanni (INFN, Genoa) ; Dube, Sourabh (LBL, Berkeley) ; Elledge, David (LBL, Berkeley) et al.
2009 - 10 p.
- Published in : PoS VERTEX2009 (2009) 027
External link: Published version from PoS
In : 18th International Workshop on Vertex Detectors and related techniques, Veluwe, Netherlands, 13 - 18 Sep 2009, pp.027
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3.
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Submission of the First Full Scale Prototype Chip for Upgraded ATLAS Pixel Detector at LHC, FE-I4A
/ Barbero, M (Bonn U.) ; Arutinov, D (Bonn U.) ; Beccherle, R (INFN, Genova) ; Darbo, G (INFN, Genova) ; Dube, S (LBNL, Berkeley) ; Elledge, D (LBNL, Berkeley) ; Fleury, J (LBNL (visiting from LAL)) ; Fougeron, D (Marseille, CPPM) ; Garcia-Sciveres, M (LBNL, Berkeley) ; Gensolen, F (Marseille, CPPM) et al.
A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. [...]
ATL-UPGRADE-PROC-2010-006.
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2010. - 6 p.
Original Communication (restricted to ATLAS) - Full text
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4.
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The FE-I4 Pixel Readout Integrated Circuit
/ Garcia-Sciveres, M (LBNL, Berkeley) ; Arutinov, D (Bonn U.) ; Barbero, M (Bonn U.) ; Beccherle, R (INFN, Genoa) ; Dube, S (LBNL, Berkeley) ; Elledge, D (LBNL, Berkeley) ; Fleury, J (Orsay, LAL) ; Fougeron, D (Marseille, CPPM) ; Gensolen, F (Marseille, CPPM) ; Gnani, D (LBNL, Berkeley) et al.
A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. [...]
ATL-UPGRADE-PROC-2010-001.
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2010.
Original Communication (restricted to ATLAS) - Full text
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5.
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Low power discriminator for ATLAS pixel chip
/ Menouni, M (Marseille, CPPM) ; Arutinov, D (Bonn U.) ; Barbero, M (Bonn U.) ; Beccherle, R (INFN, Genoa) ; Dube, S (LBL, Berkeley) ; Elledge, R (LBL, Berkeley) ; Fougeron, D (Marseille, CPPM) ; Garcia-Sciveres, M (LBL, Berkeley) ; Gensolen, F (Marseille, CPPM) ; Gnani, D (LBL, Berkeley) et al.
The design of the front-end (FE) pixel electronics requires low power, low noise and low threshold dispersion. In this work, we propose a new architecture for the discriminator circuit. [...]
CERN, 2009
Published version from CERN: PDF;
In : Topical Workshop on Electronics for Particle Physics, Paris, France, 21 - 25 Sep 2009, pp.606-609 (CERN-2009-006)
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6.
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Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS
/ Kruth, A (Bonn U.) ; Ahluwalia, G (Bonn U.) ; Arutinov, D (Bonn U.) ; Barbero, M (Bonn U.) ; Gronewald, M (Bonn U.) ; Hemperek, T (Bonn U.) ; Karagounis, M (Bonn U.) ; Krueger, H (Bonn U.) ; Wermes, N (Bonn U.) ; Fougeron, D (Marseille, CPPM) et al.
FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. [...]
CERN, 2009
Published version from CERN: PDF;
In : Topical Workshop on Electronics for Particle Physics, Paris, France, 21 - 25 Sep 2009, pp.548-552 (CERN-2009-006)
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7.
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HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results
/ Liu, J (Marseille, CPPM ; Shandong U.) ; Backhaus, M (CERN ; Bonn U.) ; Barbero, M (Marseille, CPPM) ; Bates, R (Glasgow U.) ; Blue, A (Glasgow U.) ; Bompard, F (Marseille, CPPM) ; Breugnon, P (Marseille, CPPM) ; Buttar, C (Glasgow U.) ; Capeans, M (CERN) ; Clemens, J C (Marseille, CPPM) et al.
/HV CMOS
In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 10(34) cm(−)(2) s(−)(1), more than twice the expected Phase I . [...]
2015
- Published in : JINST 10 (2015) C03033
Fulltext: PDF; IOP Open Access article: PDF;
In : 16th International Workshop on Radiation Imaging Detectors, Trieste, Italy, 22 - 26 Jun 2014, pp.C03033
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8.
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Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip
/ ATLAS IBL Collaboration
The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. [...]
arXiv:1209.1906; AIDA-PUB-2012-010.-
2012 - 45 p.
- Published in : JINST 7 (2012) P11010
Fulltext: PDF; External link: Preprint
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10.
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MCC: the Module Controller Chip for the ATLAS Pixel Detector.
/ Beccherle, R (INFN, Genoa ; Genoa U.) ; Blanquart, L (LBL, Berkeley ; UC, Berkeley) ; Boyd, R (Oklahoma U.) ; Calvet, D (Clermont-Ferrand U.) ; Comes, G (Bonn U.) ; Darbo, G (INFN, Genoa ; Genoa U.) ; Einsweiler, K F (LBL, Berkeley ; UC, Berkeley) ; Fischer, P (Bonn U.) ; Gagliardi, G (INFN, Genoa ; Genoa U.) ; Gemme, C (INFN, Genoa ; Genoa U.) et al.
In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. [...]
ATL-INDET-2002-002.
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2002. - 26 p.
Access to fulltext document - Access to fulltext document
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