Analog Signal Processing (EE60032),

Department of Electrical Engineering, Indian Institute of Technology, Kharagpur

Tutorial Module 1: Signal Processing Using Operational Amplifier
Faculty: Ashis Maity Session: Autumn 2019

 Amplifier with different non-idealities

1. Design an inverting amplifier for a nominal gain of 4, a gain error of 0.1% and an input
impedance of 10 kΩ. [Ans. 𝑅2 = 40 kΩ, 𝐴𝑜𝑙 = 5005]

Figure 1

2. Design an inverting amplifier as shown in the figure 2 to get a dc gain of -10 and an input
impedance of 10 MΩ. Calculate 𝑅𝑡 , 𝑅𝑠 and 𝑅1 . [Ans. 𝑅1 = 10 MΩ, 𝑅𝑡 = 47 kΩ, 𝑅𝑠 = 22 Ω]

Figure 2 Figure 3

3. For the non-inverting amplifier as shown in the figure 3, 𝑅1 = 1 KΩ, 𝑅𝑓 = 10 KΩ.

a) Calculate the maximum output offset voltage due to 𝑉𝑖𝑜𝑠 and 𝐼𝐵 . Assume the op-amp has
𝑉𝑖𝑜𝑠 = 10 mV, 𝐼𝐵 = 300 nA and 𝐼𝑜𝑠 = 50 nA.
b) Calculate the value of 𝑅𝑐𝑜𝑚𝑝 needed to reduce the effect of 𝐼𝐵 .
c) Calculate the maximum output offset voltage if 𝑅𝑐𝑜𝑚𝑝 as calculated in (b) is connected in
the circuit.
[Ans. a) 113 mV, b) 0.9 kΩ, c) 110.5 mV]
 4. In an inverting amplifier 𝑅1 = 100 KΩ, 𝑅𝑓 = 10 MΩ. [Ans. a) 606 mV. b) 6 V]
a) Calculate maximum output offset voltage caused by input offset voltage 𝑉𝑖𝑜𝑠 ;
b) Calculate maximum output offset voltage caused by input bias current 𝐼𝐵 ;
Where 𝑉𝑖𝑜𝑠 = 6 mV and 𝐼𝐵 = 500 nA.

 Adder/Subtractor:
5. Design a circuit which can generate an output voltage vo=-2(3v1+4v2+2v3), where v1, v2 and v3
are the input voltages.
6. Design an adder circuit using op-amps to get vo= - (0.1v1+v2+10v3), where v1, v2 and v3 are the
inputs.
7. Find Vo in figure 4. [Ans. 6.568 V]

Figure 4
8. Show that vo= a1v1+a2v2+a3v3. Find a1, a2 and a3. Find the value of vo if
i) R4 is shorted.
ii) R4 is removed.
iii) R1 is shorted.

Figure 5
 Op-amp circuit analysis:
9. For the instrumentation amplifier shown in the figure 6 below, verify that vo=
(1+R2/R1+2R2/R)(v2-v1).

Figure 6
10. Calculate Vo for the circuit shown in the figure 7 below for V1=5V and V2= 2V. [Ans. 3V]

Figure 7
11. Compared with the classical triple op-amp, below in figure 8 uses fewer resistances. The wiper
is nominally positioned halfway to maximize the CMRR. Show that vo= (1+2R2/R1)(v2-v1).

Figure 8
12. Show that vo= 2(1+R/RG) (v2-v1) in figure 9.

Figure 9

13. The circuit in figure 10 can be used to control the input resistance of the inverting amplifier
based on 𝑂𝐴1 .
a) Show that 𝑅𝑖 = 𝑅1 ⁄(1 − 𝑅1 ⁄𝑅3 ).
b) Specify resistances suitable for achieving 𝐴 = −10 𝑉⁄𝑉 with 𝑅𝑖 = ∞.

Figure 10

14. In the series-series circuit in figure 11, 𝐴 = 104 𝑉⁄𝑉, 𝑅1 =1 KΩ, 𝑅2 =2 KΩ and 𝑅3 =3 KΩ. Find a
expression for 𝐼0 = 𝐴𝑔 𝑉𝐼 − 𝑉𝐿 ⁄𝑅0 . What is the value of 𝐴𝑔 and 𝑅0 .
[Ans. 𝐴𝑔 =2×10−3, 𝑅0 =5×106 ]
 Figure 11

15. Assuming the op-amp of figure 12 has 𝑟𝑑 = ∞, 𝐴 = 103 𝑉⁄𝑉 and 𝑟0 =0, and all resistance are
identical.
a) Find 𝐴𝑖𝑑𝑒𝑎𝑙 and gain error GE.
b) Find 𝐴𝑚𝑖𝑛 for GE ≤ 0.1%. [Ans. a) 𝐴𝑖𝑑𝑒𝑎𝑙 = -8 𝑉⁄𝑉, GE = 1.28%, b) 𝐴𝑚𝑖𝑛 =13000 𝑉⁄𝑉]

Figure 12
 16. The circuit in figure 13 yields 𝐼0 = 𝐴𝑉𝐼 − (1⁄𝑅0 )𝑉𝐿 . Find the expression for 𝐴 and 𝑅0 , as well
as the condition among its resistances that yields 𝑅0 =∞.
(𝑅1 +𝑅2 )𝑅4 𝑅5 𝑅1 (𝑅3 +𝑅4 )
[Ans. 𝐴 = 𝑅 ,𝑅0 = , 𝑅0 → ∞ for 𝑅1 𝑅4 = 𝑅2 𝑅3]
1 𝑅5 (𝑅3 +𝑅4 ) 𝑅1 𝑅4 −𝑅2 𝑅3

Figure 13

17. Show that the linearized bridge circuit of figure 14 yields 𝑉0 = 𝑅2 𝑉𝑅𝐸𝐹 𝛿 ⁄𝑅1 .

Figure 14

 Phase-lead/Phase-lag circuit:
18. Determine the phase angle and the time delay for the circuit shown in the figure 15
for a frequency of 2 kHz. Given: R1= 20 kΩ, R= 39 kΩ, Rf= R1 and C= 1nF.
[Ans. φ = 52.2𝑜 , τ𝑑 = 72.5 µs]

Figure 15
 Slew rate limitations:
19. An op-amp used as an inverting amplifier with a gain of 50. The voltage gain vs. frequency
curve has a flat gain up to 20 kHz and SR=0.5 V/ µS. What maximum peak-to-peak input signal
can be applied without distorting the output? [Ans. 3.98 V]

20. A square wave of peak-to-peak amplitude of 500 mV has to be amplified to a peak-to-peak

amplitude of 3 V with a rise time of 4 µS or less. Is an op-amp with slew rate of 0.5 V/µS
sufficient? [Ans. SR = 0.6 𝑉⁄𝜇𝑠]

21. a) An op-amp has a slew rate of 2 V/µS. What is the maximum frequency of an output sinusoid
of peak value 5 V at which distortion sets in due to slew rate limitation?
b) If a sinusoid of 10 V peak is specified, what is the full power bandwidth?
[Ans. a) 63.7 kΩ. b) 31.85 kΩ]

22. An op-amp has slew rate of 2 V/µS. Find the rise time for an output voltage of 10 V amplitude
resulting from a rectangular pulse input if the op-amp is slew rate limited. [Ans. 4 µs]