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ORCIDEl-Bay Bourennane
El-Bey Bourennane
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- affiliation: Bourgogne University, Dijon, France
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2020 – today
- 2024
[j38]Ayoub Laouarem
, Chafia Kara-Mohamed, El-Bay Bourennane, Aboubekeur Hamdi-Cherif:
HTC-retina: A hybrid retinal diseases classification model using transformer-Convolutional Neural Network from optical coherence tomography images. Comput. Biol. Medicine 178: 108726 (2024)- [c43]Calvo Mayaudón Haroldo, Nakojah Chris David, Mahdi Madani, El-Bay Bourennane:
FPGA Implementation of AES-Based on Optimized Dynamic s-Box. SECRYPT 2024: 730-737 - 2023
- [j37]Mohamed Gafsi, Rim Amdouni, Mohamed Ali Hajjaji, Abdellatif Mtibaa, El-Bey Bourennane:
Hardware implementation of a strong pseudorandom number generator based block-cipher system for color image encryption and decryption. Int. J. Circuit Theory Appl. 51(1): 410-436 (2023) - 2022
- [j36]Rim Amdouni, Mohamed Gafsi, Ramzi Guesmi, Mohamed Ali Hajjaji, Abdellatif Mtibaa, El-Bay Bourennane:
High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding. Integr. 87: 346-363 (2022) - [i2]Solomon Negussie Tesema, El-Bay Bourennane:
Multi-Grid Redundant Bounding Box Annotation for Accurate Object Detection. CoRR abs/2201.01857 (2022) - 2021
- [j35]Mohamed Skander Daas, Salim Chikhi, El-Bay Bourennane:
A dynamic multi-sink routing protocol for static and mobile self-organizing wireless networks: A routing protocol for Internet of Things. Ad Hoc Networks 117: 102495 (2021) - [j34]Khaled Allem, El-Bay Bourennane, Youcef Khelfaoui:
A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM. Int. J. Reconfigurable Comput. 2021: 5584391:1-5584391:31 (2021) - [c42]Solomon Negussie Tesema, El-Bay Bourennane:
Multi-Grid Redundant Bounding Box Annotation for Accurate Object Detection. DASC/PiCom/CBDCom/CyberSciTech 2021: 145-152 - 2020
- [j33]Badreddine Miles, El-Bay Bourennane, Samia Boucherkha, Salim Chikhi:
A study of LoRaWAN protocol performance for IoT applications in smart agriculture. Comput. Commun. 164: 148-157 (2020) - [j32]Qaiser Ijaz, El-Bay Bourennane, Ali Kashif Bashir, Hira Asghar:
Revisiting the High-Performance Reconfigurable Computing for Future Datacenters. Future Internet 12(4): 64 (2020) - [j31]Sara Daas, Amira Yahi, Toufik Bakir, Mouna Sedhane, Mohamed Boughazi, El-Bay Bourennane:
Multimodal biometric recognition systems using deep learning based on the finger vein and finger knuckle print fusion. IET Image Process. 14(15): 3859-3868 (2020) - [j30]Hakim Doghmane, Hocine Bourouba, Kamel Messaoudi, El-Bay Bourennane:
Ear recognition based on discriminant multi-resolution image representation. Int. J. Biom. 12(4): 377-395 (2020) - [c41]Songchenchen Gong, El-Bay Bourennane, Junyu Gao:
Multi-feature Counting of Dense Crowd Image Based on Multi-column Convolutional Neural Network. ICCCS 2020: 215-219 - [c40]Nabil Sahli, Mohamed Benmohammed, Hugues Bersini, El-Bay Bourennane:
Artificial Intelligence and Cyber Security: Protecting and Maintaining Industry 4.0 Power Networks. IAM 2020: 19-31 - [c39]Solomon Negussie Tesema, El-Bay Bourennane:
Towards General Purpose Object Detection: Deep Dense Grid Based Object Detection. IIT 2020: 227-232
2010 – 2019
- 2019
- [j29]Hafida Saggou, Ines Sadeg, Megdouda Ourbih-Tari, El-Bay Bourennane:
The analysis of unreliable M[X]/G/1 queuing system with loss, vacation and two delays of verification. Commun. Stat. Simul. Comput. 48(5): 1366-1381 (2019) - [j28]Karima Amara, Ali Malek, Toufik Bakir, Arezki Fekik, Ahmad Taher Azar, Khaled Mohamad Almustafa, El-Bay Bourennane, Dallila Hocine:
Adaptive neuro-fuzzy inference system based maximum power point tracking for stand-alone photovoltaic system. Int. J. Model. Identif. Control. 33(4): 311-321 (2019) - [j27]Salim Bendjoudi, Hocine Bourouba, Hakim Doghmane, Kamel Messaoudi, El-Bay Bourennane:
Palmprint identification performance improvement via patch-based binarized statistical image features. J. Electronic Imaging 28(5): 053009 (2019) - [j26]Salim Bendjoudi, Hocine Bourouba, Hakim Doghmane, Kamel Messaoudi, El-Bay Bourennane:
Palmprint identification performance improvement via patch-based binarized statistical image features (Erratum). J. Electronic Imaging 28(5): 059802 (2019) - [j25]Farouk Amish, El-Bay Bourennane:
An efficient hardware solution for 3D-HEVC intra-prediction. J. Real Time Image Process. 16(5): 1559-1571 (2019) - [c38]Nadira Boukhatem, Salah Toumi, El-Bey Bourennane, Abdelghani Redjati, Abderraouf Fares:
Simulation Study of Video Transmission by Optical Fiber. CITSC 2019: 20-26 - [c37]Badreddine Miles, Salim Chikhi, El-Bay Bourennane:
Carbon monoxide detection: an IoT application used as a tool for civil protection services to save lives. ICFNDS 2019: 8:1-8:4 - [c36]Hatem Belhassen, Heng Zhang, Virginie Fresse, El-Bay Bourennane:
Improving Video Object Detection by Seq-Bbox Matching. VISIGRAPP (5: VISAPP) 2019: 226-233 - 2018
- [j24]Elhillali Kerkouche, El-Bay Bourennane, Allaoua Chaoui:
A Graphical Modelling Editor for STARSoC Design Flow Tool Based on Model Driven Engineering Approach. e Informatica Softw. Eng. J. 12(1): 9-26 (2018) - [j23]Gilberto Ochoa-Ruiz, Pamela Wattebled, Maamar Touiza, Florent de Lamotte, El-Bay Bourennane, Samy Meftali, Jean-Luc Dekeyser, Jean-Philippe Diguet:
A modeling front-end for seamless design and generation of context-aware Dynamically Reconfigurable Systems-on-Chip. J. Parallel Distributed Comput. 112: 1-19 (2018) - [j22]Akram Kout, Said Labed, Salim Chikhi, El-Bay Bourennane:
AODVCS, a new bio-inspired routing protocol based on cuckoo search algorithm for mobile ad hoc networks. Wirel. Networks 24(7): 2509-2519 (2018) - [c35]Hiliwi Leake Kidane, El-Bay Bourennane:
Run-time Reconfigurable Network-On-Chip: A Survey. SSD 2018: 846-851 - [c34]Amira Hadj Fredj, Jihene Malek, El-Bay Bourennane:
An Efficient FPGA Implementation of Anisotropic Diffusion Function for Medical Images. SSD 2018: 865-869 - [c33]Hiliwi Leake Kidane, El-Bay Bourennane:
MARTE and IP-XACT Based Approach for Run-Time Scalable NoC. MCSoC 2018: 162-167 - [c32]Songchenchen Gong, El-Bay Bourennane:
Implementation of Real Time Reconfigurable Embedded Architecture for People Counting in a Crowd Area. MISC 2018: 219-229 - 2017
- [j21]Atef Dorai, Virginie Fresse, Catherine Combes, El-Bay Bourennane, Abdellatif Mtibaa:
A collision management structure for NoC deployment on multi-FPGA. Microprocess. Microsystems 49: 28-43 (2017) - [c31]Hiliwi Leake Kidane, El-Bay Bourennane, Gilberto Ochoa-Ruiz:
Run-Time Scalable NoC for FPGA Based Virtualized IPs. MCSoC 2017: 91-97 - [c30]Metzli Ramirez-Martinez, Francisco Sanchez-Fernandez, Philippe Brunet, Sidi Mohammed Senouci, El-Bay Bourennane:
Dynamic management of a partial reconfigurable hardware architecture for pedestrian detection in regions of interest. ReConFig 2017: 1-7 - 2016
- [j20]Amira Yahi, Salah Toumi, El-Bay Bourennane, Kamel Messaoudi:
A speed FPGA hardware accelerator based FSBMA-VBSME used in H.264/AVC. Evol. Syst. 7(4): 233-241 (2016) - [j19]Farouk Amish, El-Bay Bourennane:
Fully pipelined real time hardware solution for High Efficiency Video Coding (HEVC) intra prediction. J. Syst. Archit. 64: 133-147 (2016) - [c29]Amira Hadj Fredj, Jihene Malek, El-Bey Bourennane:
Fast oriented Anisotropic Diffusion filter. IDT 2016: 308-312 - [c28]Hiliwi Leake Kidane, El-Bay Bourennane, Gilberto Ochoa-Ruiz:
NoC Based Virtualized Accelerators for Cloud Computing. MCSoC 2016: 133-137 - 2015
- [j18]Kamel Messaoudi, El-Bay Bourennane, Salah Toumi, Hichem Mayache, Nawfel Messaoudi, Ouassila Labbani:
Utilisation of the Array-OL specification language for self-generation of a memory controller especially for the H.264/AVC. Int. J. Embed. Syst. 7(2): 133-147 (2015) - [j17]Atef Benhaoues, Salah Toumi, Camel Tanougast, El-Bay Bourennane, Kamel Messaoudi, Hichem Mayache:
Versatile digital architecture for mobile terminal. Microprocess. Microsystems 39(6): 405-417 (2015) - [j16]Kamel Messaoudi, Hichem Mayache, Atef Benhaoues, El-Bay Bourennane, Salah Toumi:
Connection of H.264/AVC hardware IPs using a specific Networks-on-Chip. Microprocess. Microsystems 39(8): 609-620 (2015) - [j15]Gilberto Ochoa-Ruiz, Sébastien Guillet, Florent de Lamotte, Éric Rutten, El-Bay Bourennane, Jean-Philippe Diguet, Guy Gogniat:
An MDE Approach for Rapid Prototyping and Implementation of Dynamic Reconfigurable Systems. ACM Trans. Design Autom. Electr. Syst. 21(1): 8:1-8:25 (2015) - [c27]Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa:
Differentiated service for NoC-based multimedia applications. ICM 2015: 154-157 - [c26]Farouk Amish, El-Bay Bourennane:
A novel hardware accelerator for the HEVC intra prediction. NEWCAS 2015: 1-4 - 2014
- [j14]Nabil Sahli, Mohamed Benmohammed, El-Bay Bourennane:
Ontology and protocol secure for SCADA. Int. J. Metadata Semant. Ontologies 9(2): 114-127 (2014) - [c25]Atef Benhaoues, El-Bay Bourennane, Camel Tanougast, Hichem Mayache, Salah Toumi, Kamel Messaoudi:
Implementation of universal digital architecture using 3D-NoC for mobile terminal. CoDIT 2014: 595-600 - [c24]Amira Yahi, Kamel Messaoudi, Salah Toumi, El-Bey Bourennane:
Hardware implementation for a new design of the VBSME Used in H.264/AVC. CoDIT 2014: 658-662 - [c23]Atef Dorai, Virginie Fresse, El-Bay Bourennane, Abdellatif Mtibaa:
A Novel Architecture for Inter-FPGA Traffic Collision Management. CSE 2014: 487-495 - 2013
- [j13]Maamar Touiza, Gilberto Ochoa-Ruiz, El-Bay Bourennane, Abderrezak Guessoum, Kamel Messaoudi:
A novel methodology for accelerating bitstream relocation in partially reconfigurable systems. Microprocess. Microsystems 37(3): 358-372 (2013) - 2012
- [j12]Gilberto Ochoa-Ruiz, Ouassila Labbani, El-Bay Bourennane, Philippe Soulard, Sana Cherif:
A high-level methodology for automatically generating dynamic partially reconfigurable systems using IP-XACT and the UML MARTE profile. Des. Autom. Embed. Syst. 16(3): 93-128 (2012) - [c22]Gilberto Ochoa, Ouassila Labbani, El-Bay Bourennane, Philippe Soulard:
Model-Driven Approach for Automatic Dynamic Partially Reconfigurable IP Customization. IPDPS Workshops 2012: 407-412 - [c21]Gilberto Ochoa-Ruiz, Ouassila Labbani-Narsis, El-Bay Bourennane, Sana Cherif, Samy Meftali, Jean-Luc Dekeyser:
Facilitating IP deployment in a MARTE-based MDE methodology using IP-XACT: A Xilinx EDK case study. ReConFig 2012: 1-8 - [c20]Gilberto Ochoa-Ruiz, Ouassila Labbani, El-Bay Bourennane, Sana Cherif, Samy Meftali, Jean-Luc Dekeyser:
Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT. RSP 2012: 107-113 - 2011
- [j11]Rabah Sadoun, Adel Belouchrani, El-Bey Bourennane, Ahmed Zerguerras:
An FPGA based soft multiprocessor for DNS/DNSSEC authoritative server. Microprocess. Microsystems 35(5): 473-483 (2011) - [c19]Gilberto Ochoa, El-Bay Bourennane, Hassan Rabah, Ouassila Labbani:
High-level modelling and automatic generation of dynamicaly reconfigurable systems. DASIP 2011: 332-339 - [c18]Gilberto Ochoa, El-Bay Bourennane, Ouassila Labbani, Kamel Messaoudi:
IP-XACT and marte based approach for partially reconfigurable systems-on-chip. FDL 2011: 1-8 - 2010
- [j10]Elhillali Kerkouche, Allaoua Chaoui, El-Bay Bourennane, Ouassila Labbani:
A UML and Colored Petri Nets Integrated Modeling and Analysis Approach using Graph Transformation. J. Object Technol. 9(4): 25-43 (2010) - [j9]Elhillali Kerkouche, Allaoua Chaoui, El-Bay Bourennane, Ouassila Labbani:
On the Use of Graph Transformation in the Modeling and Verification of Dynamic Behavior in UML Models. J. Softw. 5(11): 1279-1291 (2010) - [c17]Kamel Messaoudi, El-Bay Bourennane, Salah Toumi, Elhillali Kerkouche, Ouassila Labbani:
Memory requirements and simulation platform for the implementation of the H.264 encoder modules. IPTA 2010: 133-137 - [i1]Lamjed Touil, Abdessalem Ben Abdelali, Abdellatif Mtibaa, El-Bey Bourennane:
Towards Hardware implementation of video applications in new telecommunications devices. CoRR abs/1005.0771 (2010)
2000 – 2009
- 2009
- [c16]Elhillali Kerkouche, Allaoua Chaoui, El-Bay Bourennane, Ouassila Labbani:
Modeling and Verification of Dynamic Behavior in UML Models: A Graph Transformation Approach. SEDE 2009: 111-118 - 2008
- [j8]Sami Boukhechem, El-Bay Bourennane:
SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source ISS by Using Interprocess Communication. Int. J. Reconfigurable Comput. 2008: 902653:1-902653:10 (2008) - [c15]Sami Boukhechem, El-Bay Bourennane:
TLM Platform Based on SystemC for STARSoC Design Space Exploration. AHS 2008: 354-361 - [c14]Sami Boukhechem, El-Bay Bourennane:
TLMCO-simulation for an open source MPSOC platform under STARSoC environment. SoC 2008: 1-6 - 2007
- [c13]AbdelHalim Samahi, El-Bay Bourennane:
Automated Integration and Communication Synthesis of Reconfigurable MPSoC Platform. AHS 2007: 379-385 - 2006
- [c12]Adel Belouchrani, El-Bey Bourennane, Karim Abed-Meraim:
A closed form solution for the blind separation of two sources from two sensors using second order statistics. EUSIPCO 2006: 1-5 - [c11]AbdelHalim Samahi, El-Bay Bourennane, Sami Boukhechem:
Communication Interface Generation For HW/SW Architecture In The STARSoC Environment. ReConFig 2006: 58-63 - 2005
- [j7]Johel Mitéran, Jiri Matas, El-Bay Bourennane, Michel Paindavoine, Julien Dubois:
Automatic Hardware Implementation Tool for a Discrete Adaboost-Based Decision Algorithm. EURASIP J. Adv. Signal Process. 2005(7): 1035-1046 (2005) - [c10]Abdessalem Ben Abdelali, Abdellatif Mtibaa, El-Bay Bourennane, Mohamed Abid:
Hardware implementation of content based video indexing algorithms. ICECS 2005: 1-4 - [c9]AbdelHalim Samahi, Sami Boukhechem, El-Bay Bourennane, Nasser E. Idirene:
STARSoC : A C-based platform for rapid prototyping of embedded system. ReCoSoC 2005: 177-182 - 2004
- [c8]Johel Mitéran, Jiri Matas, Julien Dubois, El-Bay Bourennane:
Boosting: From data to hardware using automatic implementation tool. EUSIPCO 2004: 1333-1336 - [c7]Sophie Bouchoux, El-Bay Bourennane, Michel Paindavoine:
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA. ICIP 2004: 2841-2844 - [c6]Sophie Bouchoux, El-Bay Bourennane, Johel Mitéran, Michel Paindavoine:
Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA. ISVLSI 2004: 237-238 - 2003
- [j6]Johel Mitéran, Sebastien Bouillant, El-Bay Bourennane:
SVM approximation for real-time image segmentation by using an improved hyperrectangles-based method. Real Time Imaging 9(3): 179-188 (2003) - [c5]Johel Mitéran, Sebastien Bouillant, El-Bay Bourennane:
Classification Boundary Approximation by Using Combination of Training Steps for Real-Time Image Segmentation. MLDM 2003: 141-155 - 2002
- [j5]El-Bay Bourennane, Claude Milan, Michel Paindavoine, Sophie Bouchoux:
Real Time Image Rotation Using Dynamic Reconfiguration. Real Time Imaging 8(4): 277-289 (2002) - [j4]El-Bay Bourennane, Pierre Gouton, Michel Paindavoine, Frédéric Truchetet:
Generalization of Canny-Deriche filter for detection of noisy exponential edge. Signal Process. 82(10): 1317-1328 (2002) - [c4]El-Bay Bourennane, Sophie Bouchoux, Johel Mitéran, Michel Paindavoine, Sebastien Bouillant:
Cost comparison of image rotation implantations on static and dynamic Reconfigurable FPGAs. ICASSP 2002: 3176-3179 - [c3]Sebastien Bouillant, Johel Mitéran, El-Bay Bourennane, Michel Paindavoine:
Real-time flaw detection on complex part: Study of SVM and hyperrectangle based method. ICASSP 2002: 3596-3599 - 2001
- [j3]El-Bay Bourennane, Christine Bondeau, Michel Paindavoine:
Approches région et bayésienne pour la restauration ďimages dégradées par la turbulence atmosphérique. Ann. des Télécommunications 56(9-10): 538-549 (2001)
1990 – 1999
- 1999
- [j2]Christine Bondeau, El-Bay Bourennane, Michel Paindavoine:
A principal component analysis based method for the Simulation of turbulence-degraded infrared image sequence. Ann. des Télécommunications 54(5-6): 324-330 (1999) - 1998
- [j1]Lionel Torres, El-Bay Bourennane, Michel Robert, Michel Paindavoine:
A Recursive Digital Filter Implementation for Noisy and Blurred Images. Real Time Imaging 4(3): 181-191 (1998) - [c2]Cyril Berthaud, El-Bay Bourennane, Michel Paindavoine, Claude Milan:
Real time image rotation using B-spline interpolation on FPGA's board. EUSIPCO 1998: 1-4 - [c1]Cyril Berthaud, El-Bay Bourennane, Michel Paindavoine, Claude Milan:
Implementation of a Real Time Image Rotation using B-Spline Interpolation on FPGA's Board. ICIP (3) 1998: 995-999
Coauthor Index
Ouassila Labbani-Narsis
aka: Ouassila Labbani
aka: Ouassila Labbani
Gilberto Ochoa-Ruiz
aka: Gilberto Ochoa
aka: Gilberto Ochoa
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