International Conference on Convergence of Technology - 2014

Design & Implementation of FPGA based Adaptive

Filter for Echo Cancellation
Prof. Sashank Shekhar Pujari, Amruta Panda Prof.(Dr.) P K Dash
P.G Department of Embedded Systems Design Multidisciplinary Research Cell
Sambalpur University Institute of Information Technology, S’O’A University, Bhubaneswar, Odisha, India
Sambalpur University, JyotiVihar, Burla, Odisha, India [email protected]
[email protected], [email protected]

Abstract— Filtering data in real-time requires dedicated the input data are known to change with time. The “adaptive
hardware to meet demanding time requirements. If the statistics filter” can be defined as a system which is trying to adjust its
of the signals are not known, then adaptive filtering algorithms parameters so as to respond to some criteria with the aim of
can be implemented to estimate the signals statistics iteratively. meeting some well-defined goal or target which depends upon
Modern field programmable gate arrays (FPGAs) include the the state of the system as well as its surroundings. Adaptive
resources needed to design efficient filtering structures. The filter play an important role according to the following
present work deals with the design and implementation of FPGA properties: first, it can work effectively in unknown
based adaptive filter for echo cancellation. Here LMS algorithm, environment; second, it is used to track the input signal of
which is one of the most popular algorithms to adjust the filter time-varying characteristics.
coefficient of an adaptive filter, is used. A model based design
approach for the adaptive filter scheme is developed by using
MATLAB, SIMULINK and SYSTEM GENERATOR which
provides a virtual FPGA platform. The Filter is implemented The paper is organized as follows; in section –II
using ALTERA Cyclone II FPGA KIT and the complete design Background Theory is covered. Design approach using model
cycle of Verilog Modeling, Coding, Simulation, Synthesis, based design and simulation is described in section-III. System
Implementation; Testing on FPGA Target system is studied and Level Description is covered in section –IV. Section-V covers
practiced through the ADAPTIVE filter implementation. implementation of hardware and firmware, concluding remark
Simulation results of the conventional approach and model based and extending the scope of paper is given in section-VI
design approach are compared for verification purpose. followed by acknowledgement and references.

Keywords— FPGA, adaptive filter, LMS, echo cancellation,

AEC, altera cyclone-II, DSP, sytem generator
II. BACKGROUND THEORY
I. INTRODUCTION In order to understand the content presented in this paper it
Acoustic echo cancellation (AEC) is an occurrence in is first necessary to provide some background information
today’s communication systems. The interferences caused by regarding digital signal theory. It will start out rather
acoustic echo are distracting to the users and reduce the elementary and then progress to more complicated matters.
quality of the voice. In order to attenuate the effects created by Later the theoretical basis in the derivation and
the echo, a Least Mean Square algorithm (LMS) is used. AEC implementation of the adaptive filtering techniques is built in
is one of the most popular applications for adaptive filters. acoustic echo cancellation.
AEC devices are needed for removing the echoes resulting
from the acoustic coupling between the loudspeaker(s) and the A. ADAPTIVE FILTER
microphone(s) in communication systems. The main Unlike analog filters, the characteristics of digital filters
component of the system is the adaptive filter, which can easily be changed simply by modifying the filter
generates at its output a replica of the echo that is further coefficients. This makes digital filters attractive in
subtracted from the microphone signal. One of the most used communications applications such as adaptive equalization,
algorithms for AEC is the LMS algorithm, due to its simplicity echo cancellation, noise reduction, speech analysis and
and low computational complexity. The update for the synthesis, etc. The basic concept of an adaptive filter is shown
coefficient requires a small number of multiplications and in “fig.1”. The objective is to filter the input signal, x(n), with
additions, which makes it suitable for programmable gate an adaptive filter in such a manner that it matches the desired
array design. signal, d(n). The desired signal, d(n), is subtracted from the
Employing adaptive filters overcomes the difficulties and filtered signal, y(n), to generate an error signal. The error
drawbacks associated with the use of a conventional digital signal drives an adaptive algorithm which generates the filter
signal processor, or digital filters for processing data with coefficients in a manner which minimizes the error signal.
inadequate statistics or when the statistical characteristics of Adaptive filters are best used in cases where signal conditions

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or system parameters are slowly changing and the filter is to Where, w(n) are the present filter coefficients,
be adjusted to compensate for this change. Adaptive filters are w(n+1) are the future adaptive filter coefficients ,
widely used in digital communications, control, channel x(n) are the input values ,
equalisation, noise cancellation, echo cancellation, System e(n) is the error value,
identification, medical instrumentation, speech processing. µ is the step size.
The most commonly used algorithm to adapt the coefficients
is the LMS algorithm.
D. STABILITY OF LMS ALGORITHM
• The LMS algorithm is convergent in the mean square
if and only if the step-size parameter satisfy
2
0 < µ <
λ max
• Here λmax is the largest eigen value of the correlation
matrix of the input data.
• More practical test for stability is
2
0 < µ <
input signal power

• Every application will have a different step size that

needs to be adjusted and it should be selected
LMS carefully.
• If µ is large, the filter will converge fast & the
Fig. 1. Block Diagram of Adaptive Filter
adaptation is quick, but if µ is too large, it could
diverge & can lead to instability
B. LEAST MEAN SQUARE ALGORITHM(LMS) • If µ is too small it takes too long to converge.
The LMS algorithm, introduced by Widrow and Hoff in
1959 is an adaptive algorithm. LMS algorithms adjust the E. ECHO CANCELLATION
filter coefficients to minimize the cost function. LMS
algorithm uses the estimates of the gradient vector from the Echo cancellation is the process of removing echo from a
available data. LMS incorporates an iterative procedure that voice communication in order to improve voice quality on a
makes successive corrections to the weight vector in the telephone call. The acoustic echo cancellation problem in
direction of the negative of the gradient vector which hands-free communication is a system identification issue that
eventually leads to the minimum mean square error. can be readily solved via adaptive filtering algorithms. AECs
Compared to other algorithms LMS algorithm is relatively that are employed in hands-free communication systems use
simple; it does not require correlation function calculation nor adaptive filters to model the associated loudspeaker-room-
does it require matrix inversions. The LMS is well suited for a microphone (LRM) transfer function in order to remove
number of applications, including adaptive echo and noise acoustical echo and prevent it from corrupting the hands-free
cancellation, equalization, and prediction. Other variants of conversation as shown in “fig.2”. The performance,
the LMS algorithm have been employed, such as the sign- complexity, and robustness of an AEC is governed by the
error LMS, the sign-data LMS, and the sign-sign LMS. adaptive filtering algorithm that it employs.

C. LMS ALGORITHM STEPS

⎛ updatevalue ⎞ ⎛ old value ⎞ ⎛ learning- ⎞⎛ tap − ⎞

⎜ ⎟ ⎜ ⎟ ⎜ ⎟⎜ ⎟⎛ error ⎞
⎜ of tap- weigth⎟ = ⎜ of tap - weight⎟ + ⎜ rate ⎟⎜ input ⎟⎜⎜ ⎟⎟
⎜ vector ⎟ ⎜ vector ⎟ ⎜ parameter⎟⎜ vector⎟⎝ signal⎠
⎝ ⎠ ⎝ ⎠ ⎝ ⎠⎝ ⎠

]= ∑
M −1
Filter Output: y [n x [n − k ]w *
k [n ] …(1)
k = 0

Estimation Error: e [n ] = d [n ] − y [n ] …(2)

Tap-Weight Adaptation: wk [n +1] = wk [n] + µx[n − k]e*[n] ...(3)

Fig. 2. Block Diagram of Echo Cancellation System

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III. MODEL BASED APPROACH

An ideal approach for embedded system design is model The above “Fig. 4” is the SIMULINK model of adaptive
based design approach. There are many system model tools echo cancellation design. There are three main stages of the
available from various vendors which facilitate the design of Simulink model. They are Audio source file- that reads multi-
hardware & software before actual physical implementation of media files containing audio data. LMS filter- it is an adaptive
the system. MAT lab and SIMULINK tool is used for this filter algorithm witch adjusts the filter coefficients to
project. minimize the cost function. Headphone and speaker- the
headphone block is used here for listening audio output.
A. Echo Cancellation for External Input Signal Different filtered output is observed in scope.

Fig. 3. Top Level Block Diagram of Adaptive Echo Cancellation

The top level block diagram shown in “fig. 3,” comprises Fig. 5. Observation of SIMULINK Model of Echo cancellation
of a sound source module that is any audio data (external
input) and the echo generation module is any environment In the above observation “fig. 5,” the first signal is the
where echo is generated e.g. can be a vacant room. Here the original audio signal, second one is the echoed signal, third
adaptive FIR filter output Y(K) is compared with the desired one is the adapted signal and the last one is the minimized
signal D(K) to yield an error signal E(K), which is fed back to error signal viewed on the scope of the Simulink model.
the adaptive LMS filter. The error signal is input to the
adaptive algorithm which generates the filter coefficients in a
manner which minimizes the error signal. These adaptive B. Model Based Designing Using System Generator
coefficients (Ca) are again used by the adaptive FIR filter to
minimize the echoed signal.
System Generator is a system-level modeling tool that
facilitates FPGA hardware design. It extends Simulink in
many ways to provide a modeling environment that is well
suited to hardware design. The tool provides high-level
abstractions that are automatically compiled into an FPGA at
the push of a button. The tool also provides access to
underlying FPGA resources through low-level abstractions,
allowing the construction of highly efficient FPGA designs. It
also provides code generation facility.
“Fig. 6” is the system generator model of adaptive echo
cancellation design. There are two main stages of this model,
they are echo generation module and echo cancellation. Here
the mux1 is used to generate the echo by adding the sine
signal and the sine half signal. Single order LMS algorithm
module is attached to the echo generation module where mux2
Fig. 4. SIMULINK Model for Adaptive Echo Cancellation is used to cancel out the echoed signal and display the desired

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signal. The step size of the LMS algorithm is variable and can In the system generator observation “fig. 7,” the x(k) is
be adjusted to minimize the error e(k) and to get more accurate the unknown signal, the d(k) is the desired signal. Expected
output y(k). The System Generator WaveScope block used in y(k) signal will be the desired signal d(k) and expected e(k) is
the model provides a powerful and easy-to-use waveform the minimized error signal viewed on the scope. The overlay1
viewer for analyzing and debugging System Generator shows both input x(k) & output y(K) in a single scope.The
designs. Here it allows observing the time-changing values of WaveScope block allows to observe the time-changing
single order LMS after the conclusion of the simulation. The coefficient value in analog format.
signals are viewed in analog format.

IV. SYSTEM LEVEL DESCRIPTION

Fig.6. System Generator Model for Echo Cancellation System using

Single Order LMS Adaptive Filter

.
Fig. 8. The Test Setup on FPGA

The FPGA implementation section shown in “fig.8”

comprises of central cyclone-II FPGA interfaced with
oscilloscope. Here the FPGA uses 27 MHz clock input and
18.432 MHz clock output. Inside the ROM of FPGA a sine
lookup table is there which is required for generating internal
sine wave. This sine look up table is given as input to the
MUX through LMS adaptive filter. Inside FPGA block MUX
are designed using Verilog program and adapted output is
synchronized to sampling clock (48 KHz).The output is finally
displayed on oscilloscope.

The Verilog program is designed in such a way that when

switch13 is ON (“1”) then internal sine wave is generated.
Here switch15 and switch14 are used to display different
adaptive signal output on oscilloscope. When both switch 15
and switch 14 are in OFF (“0”) condition then unknown signal
X(k) is displayed. When switch15 is OFF & switch 14 is ON
Fig.7. Observation of System generator model for echo cancellation then desired signal D(k) is displayed. When switch15 is ON

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and switch 14 is OFF then output signal Y(K) is displayed and

when both switch15 & switch14 are in ON (“1”) condition
then the error signal E(K) is displayed on the oscilloscope.

The total code is designed using Quartus-ii v 7.2, provided

by ALTERA. Here a structural modeling is done by
component instantiation. In the top level i.e. DE2_TV all the
required components are declared such as
VGA_AUDIO_PLL, I2c_AV_Configuration, Audio_DAC
unit and LMS. With the help of ALTERA IP core that is
VGA_AUDIO_PLL a clock of 18.4 MHz is derived. For I2C
clock of 20 KHz , the 50MHz on board clock is used.

The method used in HDL code for echo generation is as

follows: By adding a (sine wave of amplitude 1V to -1V at 1
KHz) + 0V of 1msec + (sine wave of amplitude 0.1V to -0.1V
at 1 KHz) + 0V of 1 msec, which can be used as unknown
Fig. 10. Hardware Implementation Set-Up
signal x(k) , the desired signal d(k) will be (sine wave of
amplitude 1 to -1 at 1 KHz) only. Expected y(k) signal will be
the desired signal d(k) and expected error signal e(k) will be
sine wave of amplitude 0.1V to -0.1V at 1 KHz. VI. TESTING AND OBSERVATION

When the hardware set-up is ready according to the design

then different testing and observation are taken. By switching
ON switch13 internal sine wave is observed and making
changes in both switch 15 and switch 14 filtered sine wave
will be observed. The observations are as follows:

Fig. 9. Internal Testing Pattern on QUARTUS-II

V. HARDWARE IMPLEMENTATION

For the hardware set up in “Fig.10,” an USB blaster is

connected to the laptop in which the required software is pre-
installed. On successful compilation of the program a .SOF
file will be generated. That files needs to be dumped on
ALTERA CYCLONE-II board through this USB cable by the
help of programmer option of the QUARTUS-II. A digital
storage oscilloscope is taken to display the results. The use of
function generator is in future scope for generating an external
signal. Fig. 11. Oscilloscope Output

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REFERENCES
TABLE I. FPGA HARDWARE RESOURCES UTILIZED
[1] Prof. Sashank Shekhar Pujari,Prangya Paramita Muduli,Amruta
RESOURCE USED AVAILABLE PERCENTAGE Panda,Rashmita Badhai,Sofia Nayak and Yougajyoty Sahoo;
Logic elements 888 33216 3% “Design & implementation of fir filters using on-board adc-dac &
fpga” ;ICICES, 2014; in press.
Combinational 816 33216 2% [2] Dr. Raaed Faleh Hassan,AliSubhiAbbood;“Design and
Functions implementation of fpga based adaptive filter”;IJES ,Volume2,
Dedicated Logic 404 33216 1% Issue 6 ,Pages74-80, 2013.
Registers [3] Diggikar, A.B. ; Ardhapurkar, S.S “Design and implementation of
adaptive filtering algorithm for noise cancellation in speech signal
Total Registers 404 on fpga”; ICCEET, 2012.
Total Pins 312 475 66% [4] Rafid Ahmed Khalil; “Adaptive Filter Application in Echo
Embedded 14 17 20% Cancellation System and Implementation using FPGA”; Al-
Multiplier 9-bit Rafidain Engineering ,Vol.16 No.5 Dec. 2008.
elements [5] S. S. Godbole1, P. M. Palsodkar2 and V.P. Raut; “FPGA
Implementation of Adaptive LMS Filter”; Proceedings of SPIT-
Total PLLs 1 4 25% IEEE Colloquium and International Conference, Mumbai, India;
Vol. 2,2 2 6.
[6] C. Stanciu, C. Anghel, C. Paleologu, J. Benesty, F. Albu, and
VII. CONCLUSION AND FUTURE SCOPE S.Ciochina, “FPGA implementation of an efficient proportionate
affine projection algorithm for echo cancellation”, in Proc. 19th
The project is developed with the help of different tools Eur. Signal Process. Conf. (EUSIPCO), Barcelona, Spain, Aug.
and software such as MATLAB, SIMULINK, SYSTEM 29–Sep. 2, 2011,pp. 1284–1288.
GENERATOR and ALTERA QUARTUS-II. The adaptive [7] Bahoura,M; Dept. of Eng., Univ. of Quebec at Rimouski,
echo cancellation system is successfully developed with the Rimouski, QC, Canada ; Ezzaidi, H; “FPGA-implementation of a
LMS algorithm and the system is capable of cancelling echo. sequential adaptive noise canceller using Xilinx System Generator
“; 19-22 Dec. 2009.
The model based design approach is successful for canceling
[8] Juan J. Rodriguez-Andina, Senior Member, IEEE, Maria J. Moure,
the echo of any external audio signal. And finally the single Member, IEEE, and Maria D. Valdes, Member, IEEE; Features,
order adaptive filter Echo Cancellation system is successfully “Design Tools, and Application Domains of FPGAs”; ieee
implemented on ATERA Cyclone II and the experimental transactions on industrial electronics, vol. 54, no. 4, august 2007.
result satisfied the objective of the project. [9] U. Maser, L. Banbse, "Digital Signal Processing with Field
Programmable Gate Arrays",International Signal Processing
Conference, March 28, 2006, Dallas Texas
A method to expand the project would be to use an actual [10] A. H. Sayed, Fundamentals of Adaptive Filtering. Hoboken,
system with real echoes. A microphone and speaker with a NJ,USA: Wiley, 2003.
box in between them could be used to create the echoes. The [11] S. L. Gay and J. Benesty, “Acoustic Signal Processing for
scope of the project can further be extended by increasing the Telecommunication.” Boston, MA, USA: Kluwer Academic, 2000.
order of the filter for better result; also the system can be [12] morris, lu,"adaptive echo cancellation", ieee signal processing
implemented on XILINX platform with different algorithms. magazine,march 1999.
[13] Simon Haykin, Adaptive Filter Theory, Prentice-Hall, Inc.,1996
[14] Windrow, B., and Stearns, S. D., Adaptive Signal Processing,
ACKNOWLEDGMENT Prentice Hall, 1985.
[15] Math Work Help Documentation.
Authors wish to thank Multidisciplinary Research Cell
[16] DE2 User manual.
S‘O’A university for providing advance lab facility. Without
[17] Audio Codec W8731 datasheet.
proper guidance at this lab this project could not have been
completed. Authors indebted to SUIIT, Sambalpur University
for the support in providing development tools and kits.

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