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Merged
merged 10 commits into from
Aug 28, 2021
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Feat: further testing & support for i64 general register use
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Sl1mb0 committed Aug 22, 2021
commit eeb0b52bf852b902b2bd1adaf919c35e2387ce28
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/asm/s390x.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ impl S390xInlineAsmRegClass {
arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<&'static str>)] {
match (self, arch) {
(Self::reg, _) => types! { _: I8, I16, I32; },
(Self::reg, _) => types! { _: I8, I16, I32, I64; },
(Self::freg, _) => types! { _: F32, F64; },
}
}
Expand Down
52 changes: 46 additions & 6 deletions src/test/assembly/asm/s390x-types.rs
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ macro_rules! check { ($func:ident, $ty:ty, $class:ident, $mov:literal) => {
};}

macro_rules! check_reg { ($func:ident, $ty:ty, $reg:tt, $mov:literal) => {

#[no_mangle]
pub unsafe fn $func(x: $ty) -> $ty {
dont_merge(stringify!(func));

Expand All @@ -70,17 +70,57 @@ macro_rules! check_reg { ($func:ident, $ty:ty, $reg:tt, $mov:literal) => {
}
};}

// systemz-LABEL: sym_fn_32:
// systemz: #APP
// systemz: brasl %r14, extern_func@PLT
// systemz: #NO_APP
// CHECK-LABEL: sym_fn_32:
// CHECK: #APP
// CHECK: brasl %r14, extern_func
// CHECK: #NO_APP
#[cfg(s390x)]
#[no_mangle]
pub unsafe fn sym_fn_32() {
asm!("brasl %r14, {}", sym extern_func);
}

// CHECK-LABEL: sym_static:
// CHECK: #APP
// CHECK: brasl %r14, extern_static
// CHECK: #NO_APP
#[no_mangle]
pub unsafe fn sym_static() {
asm!("brasl %r14, {}", sym extern_static);
}

// CHECK-LABEL: reg_i8:
// CHECK: #APP
// CHECK: lgr %r{{[0-9]+}}, %r{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_i8, i8, reg, "lgr");

// CHECK-LABEL: reg_i16:
// CHECK: #APP
// CHECK: lgr %r{{[0-9]+}}, %r{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_i16, i16, reg, "lgr");

// CHECK-LABEL: reg_i32:
// CHECK: #APP
// CHECK: lgr r{{[0-15]+}}, r{{[0-15]+}}
// CHECK: lgr %r{{[0-9]+}}, %r{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_i32, i32, reg, "lgr");

// CHECK-LABEL: reg_i64:
// CHECK: #APP
// CHECK: lgr %r{{[0-9]+}}, %r{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_i64, i64, reg, "lgr");
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Add a test with pointer types. Refer to the other tests for examples.

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This is the test I have for the pointer type, similar to reg_ptr in x86-types.rs :

// CHECK-LABEL: reg_ptr:
// CHECK: #APP
// CHECK: lgr %r{{[0-9]+}}, %r{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_ptr, ptr, reg, "lgr");

and stderr:

/home/linux1/rust/src/test/assembly/asm/s390x-types.rs:128:17: error: CHECK-LABEL: expected string not found in input
// CHECK-LABEL: reg_ptr:
                ^
/home/linux1/rust/build/s390x-unknown-linux-gnu/test/assembly/asm/s390x-types.s390x/s390x-types.s:174:9: note: scanning from here
reg_f64:
        ^
/home/linux1/rust/build/s390x-unknown-linux-gnu/test/assembly/asm/s390x-types.s390x/s390x-types.s:204:9: note: possible intended match here
 .globl reg_ptr

I am not sure why reg_ptr is .globl, nor how to go about resolving this issue.

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Can you paste the full contents of /home/linux1/rust/build/s390x-unknown-linux-gnu/test/assembly/asm/s390x-types.s390x/s390x-types.s?

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	.text
	.file	"s390x_types.63e18542-cgu.0"
	.section	.text.sym_fn_32,"ax",@progbits
	.globl	sym_fn_32
	.p2align	4
	.type	sym_fn_32,@function
sym_fn_32:
	.cfi_startproc
	stmg	%r14, %r15, 112(%r15)
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	#APP
	brasl	%r14, extern_func
	#NO_APP
	lmg	%r14, %r15, 272(%r15)
	br	%r14
.Lfunc_end0:
	.size	sym_fn_32, .Lfunc_end0-sym_fn_32
	.cfi_endproc

	.section	.text.sym_static,"ax",@progbits
	.globl	sym_static
	.p2align	4
	.type	sym_static,@function
sym_static:
	.cfi_startproc
	stmg	%r14, %r15, 112(%r15)
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	#APP
	brasl	%r14, extern_static
	#NO_APP
	lmg	%r14, %r15, 272(%r15)
	br	%r14
.Lfunc_end1:
	.size	sym_static, .Lfunc_end1-sym_static
	.cfi_endproc

	.section	.text.reg_i8,"ax",@progbits
	.globl	reg_i8
	.p2align	4
	.type	reg_i8,@function
reg_i8:
	.cfi_startproc
	stmg	%r13, %r15, 104(%r15)
	.cfi_offset %r13, -56
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	lr	%r13, %r2
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	lgr	%r2, %r13
	#NO_APP
	lmg	%r13, %r15, 264(%r15)
	br	%r14
.Lfunc_end2:
	.size	reg_i8, .Lfunc_end2-reg_i8
	.cfi_endproc

	.section	.text.reg_i16,"ax",@progbits
	.globl	reg_i16
	.p2align	4
	.type	reg_i16,@function
reg_i16:
	.cfi_startproc
	stmg	%r13, %r15, 104(%r15)
	.cfi_offset %r13, -56
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	lr	%r13, %r2
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	lgr	%r2, %r13
	#NO_APP
	lmg	%r13, %r15, 264(%r15)
	br	%r14
.Lfunc_end3:
	.size	reg_i16, .Lfunc_end3-reg_i16
	.cfi_endproc

	.section	.text.reg_i32,"ax",@progbits
	.globl	reg_i32
	.p2align	4
	.type	reg_i32,@function
reg_i32:
	.cfi_startproc
	stmg	%r13, %r15, 104(%r15)
	.cfi_offset %r13, -56
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	lr	%r13, %r2
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	lgr	%r2, %r13
	#NO_APP
	lmg	%r13, %r15, 264(%r15)
	br	%r14
.Lfunc_end4:
	.size	reg_i32, .Lfunc_end4-reg_i32
	.cfi_endproc

	.section	.text.reg_i64,"ax",@progbits
	.globl	reg_i64
	.p2align	4
	.type	reg_i64,@function
reg_i64:
	.cfi_startproc
	stmg	%r13, %r15, 104(%r15)
	.cfi_offset %r13, -56
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -160
	.cfi_def_cfa_offset 320
	lgr	%r13, %r2
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	lgr	%r2, %r13
	#NO_APP
	lmg	%r13, %r15, 264(%r15)
	br	%r14
.Lfunc_end5:
	.size	reg_i64, .Lfunc_end5-reg_i64
	.cfi_endproc

	.section	.text.reg_f32,"ax",@progbits
	.globl	reg_f32
	.p2align	4
	.type	reg_f32,@function
reg_f32:
	.cfi_startproc
	stmg	%r14, %r15, 112(%r15)
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -168
	.cfi_def_cfa_offset 328
	std	%f8, 160(%r15)
	.cfi_offset %f8, -168
	ler	%f8, %f0
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	ler	%f0, %f8
	#NO_APP
	ld	%f8, 160(%r15)
	lmg	%r14, %r15, 280(%r15)
	br	%r14
.Lfunc_end6:
	.size	reg_f32, .Lfunc_end6-reg_f32
	.cfi_endproc

	.section	.text.reg_f64,"ax",@progbits
	.globl	reg_f64
	.p2align	4
	.type	reg_f64,@function
reg_f64:
	.cfi_startproc
	stmg	%r14, %r15, 112(%r15)
	.cfi_offset %r14, -48
	.cfi_offset %r15, -40
	aghi	%r15, -168
	.cfi_def_cfa_offset 328
	std	%f8, 160(%r15)
	.cfi_offset %f8, -168
	ldr	%f8, %f0
	larl	%r2, .L__unnamed_1
	lghi	%r3, 4
	brasl	%r14, dont_merge@PLT
	#APP
	ldr	%f0, %f8
	#NO_APP
	ld	%f8, 160(%r15)
	lmg	%r14, %r15, 280(%r15)
	br	%r14
.Lfunc_end7:
	.size	reg_f64, .Lfunc_end7-reg_f64
	.cfi_endproc

	.type	.L__unnamed_1,@object
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	1
.L__unnamed_1:
	.ascii	"func"
	.size	.L__unnamed_1, 4

	.globl	reg_ptr
	.type	reg_ptr,@function
.set reg_ptr, reg_i64
	.section	".note.GNU-stack","",@progbits


// CHECK-LABEL: reg_f32:
// CHECK: #APP
// CHECK: ler %f{{[0-9]+}}, %f{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_f32, f32, freg, "ler");

// CHECK-LABEL: reg_f64:
// CHECK: #APP
// CHECK: ldr %f{{[0-9]+}}, %f{{[0-9]+}}
// CHECK: #NO_APP
check!(reg_f64, f64, freg, "ldr");
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The tests look good, but you also need tests which use explicit registers like r0 and f0.