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CERN Document Server 45 elementer funnet  1 - 10nesteslutt  gå til element: Søket tok 0.57 sekunder. 
1.
The design and test results of A Giga-Bit Cable Receiver (GBCR) for the ATLAS Inner Tracker Pixel Detector / Zhang, L. (Southern Methodist U. ; Hua-Zhong Normal U.) ; Gong, D. (Southern Methodist U.) ; Liu, T. (Southern Methodist U.) ; Chen, C. (Southern Methodist U.) ; Deng, B. (HBPU, Huangshi) ; Hou, S. (Academia Sinica, Taiwan) ; Huang, G. (Hua-Zhong Normal U.) ; Huang, X. (Southern Methodist U.) ; Liu, C. (Southern Methodist U.) ; Moreira, P. (CERN ; Southern Methodist U.) et al.
This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for the HL-LHC upgrade of the ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, and GBCR3) have been designed in the CERN-identified 65 nm CMOS technology. [...]
arXiv:2301.13399; FERMILAB-PUB-23-069-PPD.- 2023-03-07 - 7 p. - Published in : JINST
Fulltext: 2301.13399 - PDF; b31c20c7db9c702f29204331571c99f1 - PDF; External link: Fermilab Library Server
In : Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C03005
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2.
The clock distribution system for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade Demonstrator / Deng, Binwei (Shandong U. ; Southern Methodist U.) ; Chen, Hucheng (Brookhaven) ; Chen, Kai (Brookhaven) ; Chen, Jinghong (Houston U. ; Southern Methodist U.) ; Gong, Datao (Southern Methodist U.) ; Guo, D. (Southern Methodist U. ; Hefei, CUST) ; Hu, Xueye (Brookhaven) ; Huang, Deping (Southern Methodist U.) ; Kierstead, James (Brookhaven) ; Li, Xiaoting (Southern Methodist U. ; Hua-Zhong Normal U.) et al.
A prototype Liquid-argon Trigger Digitizer Board (LTDB), called the LTDB Demonstrator, has been developed to demonstrate the functions of the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics upgrade. Forty Analog-to-Digital converters and four FPGAs with embedded multi-gigabit-transceivers on each Demonstrator need high quality clocks. [...]
arXiv:2401.15750.- 2015-01-09 - 8 p. - Published in : JINST Fulltext: PDF;
In : Topical Workshop on Electronics for Particle Physics 2014, Aix En Provence, France, 22 - 26 Sep 2014, pp.C01004
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3.
Performance of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector / Agapopoulou, C. (IJCLab, Orsay) ; Beresford, L.A. (CERN) ; Boumediene, D.E. (LPC, Clermont-Ferrand) ; Castillo García, L. (Barcelona, IFAE) ; Conforti, S. (Ec. Polytech., OMEGA) ; de la Taille, C. (Ec. Polytech., OMEGA) ; Corpe, L.D. (CERN) ; de Sousa, M.J. Da Cunha Sargedas (USTC, Hefei) ; Dinaucourt, P. (Ec. Polytech., OMEGA) ; Falou, A. (IJCLab, Orsay) et al.
This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC. This prototype, called ALTIROC1, consists of a 5$\times$5-pad matrix and contains the analog part of the single-channel readout (preamplifier, discriminator, two TDCs and SRAM). [...]
arXiv:2306.08949.- 2023-08-21 - 20 p. - Published in : JINST 18 (2023) P08019 Fulltext: 2306.08949 - PDF; document - PDF;
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4.
An FPGA-based readout chip emulator for the CMS ETL detector upgrade / Zhang, L. (Southern Methodist U. (main)) ; Edwards, C. (Fermilab) ; Gong, D. (Fermilab) ; Huang, X. (Southern Methodist U. (main)) ; Lee, J. (Illinois U., Chicago) ; Liu, C. (Southern Methodist U. (main)) ; Liu, T. (Southern Methodist U. (main)) ; Olsen, J. (Fermilab) ; Sun, Q. (Fermilab) ; Wu, J. (Fermilab) et al.
We present an FPGA-based readout chip emulator board for the CMS Endcap Timing Layer (ETL) detector upgrade. The emulator board uses an Intel Cyclone 10 GX FPGA to emulate the digital functions of four Endcap Layer Readout Chips (ETROCs). [...]
arXiv:2302.01548; FERMILAB-PUB-23-056-PPD.- 2023-02-14 - 8 p. - Published in : JINST Fulltext: 2302.01548 - PDF; ba39c7bfbcc2d4794f67bd4288bd8905 - PDF; External link: Fermilab Library Server
In : Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C02031
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5.
The ATLAS experiment at the CERN Large Hadron Collider: a description of the detector configuration for Run 3 / ATLAS Collaboration
The ATLAS detector is installed in its experimental cavern at Point 1 of the CERN Large Hadron Collider. During Run 2 of the LHC, a luminosity of $\mathcal{L}=2\times 10^{34}\mathrm{cm}^{-2}\mathrm{s}^{-1}$ was routinely achieved at the start of fills, twice the design luminosity. [...]
arXiv:2305.16623; CERN-EP-2022-259.- Geneva : CERN, 2024-05-23 - 233 p. - Published in : JINST 19 (2024) P05063 Fulltext: 2305.16623 - PDF; document - PDF; External link: Previous draft version
In : The Large Hadron Collider and The Experiments for Run 3
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6.
Optical transceivers for event triggers in the ATLAS phase-I upgrade / Zhang, L. (Hua-Zhong Normal U. ; Southern Methodist U.) ; Chen, C. (Southern Methodist U.) ; Cohen, I. (Southern Methodist U.) ; Cruda, E. (Southern Methodist U.) ; Gong, D. (Southern Methodist U.) ; Hou, S. (Taiwan, Inst. Phys.) ; Hu, X. (Michigan U.) ; Huang, X. (Hua-Zhong Normal U. ; Southern Methodist U.) ; Li, J.-H. (Taiwan, Inst. Phys. ; Taiwan, Natl. Taiwan U.) ; Liu, C. (Southern Methodist U.) et al.
The ATLAS phase-I upgrade aims to enhance event trigger performance in the Liquid Argon (LAr) calorimeter and the forward muon spectrometer. The trigger signals are transmitted by optical transceivers at 5.12 Gbps per channel in a radiation field. [...]
arXiv:2009.12096.- 2021-01-01 - 5 p. - Published in : Nucl. Instrum. Methods Phys. Res., A 985 (2021) 164651 Fulltext: PDF;
In : 12th international "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD), Hiroshima, Japan, 14 - 18 Dec 2019, pp.164651
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7.
Book cover lpGBT documentation : release
12 Aug 2024. - 359 p.

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8.
The Phase-I Trigger Readout Electronics Upgrade of the ATLAS Liquid Argon Calorimeters / Aad, G. (Marseille, CPPM) ; Akimov, A.V. (CERN ; LPI, Moscow (main)) ; Al Khoury, K. (Nevis Labs, Columbia U.) ; Aleksa, M. (CERN) ; Andeen, T. (Arizona U.) ; Anelli, C. (Victoria U.) ; Aranzabal, N. (CERN) ; Armijo, C. (Arizona U.) ; Bagulia, A. (Lebedev Inst.) ; Ban, J. (Nevis Labs, Columbia U.) et al.
The Phase-I trigger readout electronics upgrade of the ATLAS Liquid Argon calorimeters enhances the physics reach of the experiment during the upcoming operation at increasing Large Hadron Collider luminosities. The new system, installed during the second Large Hadron Collider Long Shutdown, increases the trigger readout granularity by up to a factor of ten as well as its precision and range. [...]
arXiv:2202.07384.- 2022-05-16 - 56 p. - Published in : JINST 17 (2022) P05024 Fulltext: document - PDF; 2202.07384 - PDF; Publication - PDF;
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9.
A 20 Gbps PAM4 data transmitter ASIC for particle physics experiments / Zhang, L. (Southern Methodist U. ; Hua-Zhong Normal U.) ; Cruda, E.M. (Southern Methodist U.) ; Chao, C-P. (Unlisted, TW) ; Chen, S-W. (Unlisted, TW) ; Deng, B. (HBPU, Huangshi) ; Francisco, R. (CERN) ; Gong, D. (Southern Methodist U.) ; Guo, D. (Southern Methodist U.) ; Hou, S. (Academia Sinica, Taiwan) ; Huang, G. (Hua-Zhong Normal U.) et al.
We present the design and test results of a novel data transmitter ASIC operating up to 20.48 Gbps with 4-level Pulse-Amplitude-Modulation (PAM4) for particle physics experiments. This ASIC, named GBS20, is fabricated in a 65 nm CMOS technology. [...]
arXiv:2202.03509; FERMILAB-PUB-22-110-PPD.- 2022-03-09 - 7 p. - Published in : JINST 17 (2022) C03011 Fulltext: PDF;
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10.
A radiation tolerant clock generator for the CMS Endcap Timing Layer readout chip / Sun, H. (Southern Methodist U. ; Hua-Zhong Normal U.) ; Sun, Q. (Fermilab) ; Biereigel, S. (CERN ; Leuven U.) ; Francisco, R. (CERN) ; Gong, D. (Southern Methodist U.) ; Huang, G. (Hua-Zhong Normal U.) ; Huang, X. (Southern Methodist U.) ; Kulis, S. (CERN) ; Leroux, P. (Leuven U.) ; Liu, C. (Southern Methodist U.) et al.
We present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low-Power Gigabit Transceiver (lpGBT) project. [...]
arXiv:2110.12625; FERMILAB-CONF-21-633-PPD.- 2022-03-23 - 6 p. - Published in : 10.1088/1748-0221/17/03/C03038 Fulltext: 2b8e809fdbeb999e8d3e2f1ac77fa465 - PDF; fermilab-conf-21-633-ppd - PDF; 2110.12625 - PDF; External link: Fermilab Accepted Manuscript
In : TWEPP 2021 Topical Workshop on Electronics for Particle Physics, Online, Online, 20 - 24 Sep 2021, pp.C03038
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CERN Document Server : 45 elementer funnet   1 - 10nesteslutt  gå til element:
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1 Gong, D C
110 Gong, D T
12 Gong, D.
23 Gong, Datao
1 Gong, Dianjun
9 Gong, Dianxuan
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