Digital Pixel Test Structures implemented in a 65 nm CMOS process - CERN Document Server

主頁 > CERN Departments > Physics (PH) > EP-R&D Programme on Technologies for Future Experiments > EP-R&D Programme on Technologies for Future Experiments (EP RDET) > Digital Pixel Test Structures implemented in a 65 nm CMOS process > Citations

Digital Pixel Test Structures implemented in a 65 nm CMOS process - Rinella, Gianluca Aglieri et al - arXiv:2212.08621