Instruction Set Classification of 8085 Microprocessor

INTEL 8085 has a very enriched Instruction Set. Varieties of instructions it can execute. All these instructions can be broadly classified as follows −

Description	No. of opcodes	No. of instruction types	Example
Data transfer Instructions	83	13	MOV, MVI etc.
Arithmetic Instructions	62	14	ADD, SUB etc.
Logical Instructions	43	15	AND, XOR etc.
Stack Instructions	15	9	PUSH, POP etc.
Branch Instructions	36	8	JMP, JZ etc.
I/O Instructions	2	2	IN, OUT etc.
Interrupt Instructions	5	5	RST 0, RST 1 etc.
Total	246	66

Following is the table showing the list of Control instructions with their meanings.

Opcode	Operand	Meaning	Explanation
NOP	None	No operation	No operation is performed, i.e., the instruction is fetched and decoded only.
HLT	None	Halt and enter wait state	The CPU finishes executing the current instruction and stops further execution. An interrupt or reset is necessary to exit from the halt state.
DI	None	Disable interrupts	The interrupt enable flip-flop is reset and all the interrupts are disabled except TRAP.
EI	None	Enable interrupts	The interrupt enable flip-flop is set and all the interrupts are enabled.
RIM	None	Read interrupt mask	This instruction is used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit.
SIM	None	Set interrupt mask	This instruction is used to implement the interrupts 7.5, 6.5, 5.5 and serial data output.

The following table shows the list of Logical instructions with their meanings.

Opcode	Operand	Meaning	Explanation
CMP	R M	Compare the register or memory with the Accumulator	The contents of the operand (register or memory) are M compared with the contents of the Accumulator.
CPI	8-bit data	Compare immediate with the Accumulator	The second Byte data is compared with the contents of the Accumulator.
ANA	R M	Logical AND register or memory with the Accumulator	The contents of the Accumulator are logically AND with M the contents of the register or memory, and the result is placed in the Accumulator.
ANI	8-bit data	Logical AND immediate with the Accumulator	The contents of the Accumulator are logically AND with the 8-bit data and the result is placed in the Accumulator.
XRA	R M	Exclusive OR register or memory with the Accumulator	The contents of the Accumulator are Exclusive OR with M the contents of the register or memory, and the result is placed in the Accumulator.
XRI	8-bit data	Exclusive OR immediate with the Accumulator	The contents of the Accumulator are Exclusive OR with the 8-bit data and the result is placed in the Accumulator.
ORA	R M	Logical OR register or memory with the Accumulator	The contents of the Accumulator are logically OR with M the contents of the register or memory, and result is placed in the Accumulator.
ORI	8-bit data	Logical OR immediate with the Accumulator	The contents of the Accumulator are logically OR with the 8-bit data and the result is placed in the Accumulator.
RLC	None	Rotate the Accumulator left	Each binary bit of the Accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in the Carry flag. CY is modified according to bit D7.
RRC	None	Rotate the Accumulator right	Each binary bit of the Accumulator is rotated right by one position. Bit D0 is placed in the position of D7 as well as in the Carry flag. CY is modified according to bit D0.
RAL	None	Rotate the Accumulator left through carry	Each binary bit of the Accumulator is rotated left by one position through the Carry flag. Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0. CY is modified according to bit D7.
RAR	None	Rotate the Accumulator right through carry	Each binary bit of the Accumulator is rotated right by one position through the Carry flag. Bit D0 is placed in the Carry flag, and the Carry flag is placed in the most significant position D7. CY is modified according to bit D0.
CMA	None	Complement Accumulator	The contents of the Accumulator are complemented. No flags are affected.
CMC	None	Complement carry	The Carry flag is complemented. No other flags are affected.
STC	None	Set Carry	Set Carry

The following table shows the list of Branching instructions with their meanings.

Opcode

Operand

Meaning

Explanation

JMP

16-bit address

Jump unconditionally

The program sequence is transferred to the memory address given in the operand.

Opcode	Description	Flag Status
JC	Jump on Carry	CY=1
JNC	Jump on no Carry	CY=0
JP	Jump on positive	S=0
JM	Jump on minus	S=1
JZ	Jump on zero	Z=1
JNZ	Jump on no zero	Z=0
JPE	Jump on parity even	P=1
JPO	Jump on parity odd	P=0

16-bit address

Jump conditionally

The program sequence is transferred to the memory address given in the operand based on the specified flag of the PSW.

Opcode	Description	Flag Status
CC	Call on Carry	CY=1
CNC	Call on no Carry	CY=0
CP	Call on positive	S=0
CM	Call on minus	S=1
CZ	Call on zero	Z=1
CNZ	Call on no zero	Z=0
CPE	Call on parity even	P=1
CPO	Call on parity odd	P=0

16-bit address

Unconditional subroutine call

The program sequence is transferred to the memory address given in the operand. Before transferring, the address of the next instruction after CALL is pushed onto the stack.

RET

None

Return from subroutine unconditionally

The program sequence is transferred from the subroutine to the calling program.

Opcode	Description	Flag Status
RC	Return on Carry	CY=1
RNC	Return on no Carry	CY=0
RP	Return on positive	S=0
RM	Return on minus	S=1
RZ	Return on zero	Z=1
RNZ	Return on no zero	Z=0
RPE	Return on parity even	P=1
RPO	Return on parity odd	P=0

None

Return from subroutine conditionally

The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW and the program execution begins at the new address.

PCHL

None

Load the program counter with HL contents

The contents of registers H & L are copied into the program counter. The contents of H are placed as the high-order Byte and the contents of L as the low-order Byte.

RST

0-7

Restart

The RST instruction is used as software instructions in a program to transfer the program execution to one of the following eight locations.

Instruction	Restart Address
RST 0	0000H
RST 1	0008H
RST 2	0010H
RST 3	0018H
RST 4	0020H
RST 5	0028H
RST 6	0030H
RST 7	0038H

The 8085 has additionally 4 interrupts, which can generate RST instructions internally and doesn’t require any external hardware. Following are those instructions and their Restart addresses

Interrupt	Restart Address
TRAP	0024H
RST 5.5	002CH
RST 6.5	0034H
RST 7.5	003CH

Following is the table showing the list of Arithmetic instructions with their meanings.

Opcode	Operand	Meaning	Explanation
ADD	R M	Add register or memory, to the Accumulator	The contents of the register or memory are added to the contents of the Accumulator and the result is stored in the Accumulator. Example − ADD B.
ADC	R M	Add register to the Accumulator with carry	The contents of the register or memory & M the Carry flag are added to the contents of the Accumulator and the result is stored in the Accumulator. Example − ADC B
ADI	8-bit data	Add the immediate to the Accumulator	The 8-bit data is added to the contents of the Accumulator and the result is stored in the Accumulator. Example − ADI 55H
ACI	8-bit data	Add the immediate to the Accumulator with carry	The 8-bit data and the Carry flag are added to the contents of the Accumulator and the result is stored in the Accumulator. Example −ACI 55H
LXI	Reg. pair, 16bit data	Load the register pair immediate	The instruction stores 16-bit data into the register pair designated in the operand. Example − LXI H, ABCDH
DAD	Reg. pair	Add the register pair to H and L registers	The 16-bit data of the specified register pair are added to the contents of the HL register. Example − DAD B
SUB	R M	Subtract the register or the memory from the Accumulator	The contents of the register or the memory are subtracted from the contents of the Accumulator, and the result is stored in the Accumulator. Example − SUB B
SBB	R M	Subtract the source and borrow from the Accumulator	The contents of the register or the memory & M the Borrow flag are subtracted from the contents of the Accumulator and the result is placed in the Accumulator. Example − SBB B
SUI	8-bit data	Subtract the immediate from the Accumulator	The 8-bit data is subtracted from the contents of the Accumulator & the result is stored in the Accumulator. Example −SUI 55H
SBI	8-bit data	Subtract the immediate from the Accumulator with borrow	The 8-bit data is subtracted to the contents of the Accumulator and the result is stored in the Accumulator. Example −SBI 55H
INR	R M	Increment the register or the memory by 1	The contents of the designated register or the memory are incremented by 1 and their result is stored at the same place. Example − INR B
INX	R	Increment register pair by 1	The contents of the designated register pair are incremented by 1 and their result is stored at the same place. Example − INX B
DCR	R M	Decrement the register or the memory by 1	The contents of the designated register or memory are decremented by 1 and their result is stored at the same place. Example − DCR B
DCX	R	Decrement the register pair by 1	The contents of the designated register pair are decremented by 1 and their result is stored at the same place. Example − DCX B
DAA	None	Decimal adjust Accumulator	The contents of the Accumulator are changed from a binary value to two 4-bit BCD digits. If the value of the low-order 4-bits in the Accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the Accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example − DAA

Following is the table showing the list of Data-transfer instructions with their meanings.

Opcode	Operand	Meaning	Explanation
MOV	Rd, Sc M, Sc Dt, M	Copy from the source (Sc) to the destination (Dt)	This instruction copies the contents of the source register into the destination register without any alteration. Example − MOV H, L
MVI	Rd, data M, data	Move immediate 8-bit	The 8-bit data is stored in the destination register or memory. Example − MVI B, 55H
LDA	16-bit address	Load the Accumulator	The contents of a memory location, specified by a 16-bit address in the operand, are copied to the Accumulator. Example − LDA 2034H
LDAX	B/D Reg. pair	Load the Accumulator indirect	The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the Accumulator. Example − LDAX B
LXI	Reg. pair, 16-bit data	Load the register pair immediate	The instruction loads 16-bit data in the register pair designated in the register or the memory. Example − LXI B, 3225H
LHLD	16-bit address	Load H and L registers direct	The instruction copies the contents of the memory location pointed out by the address into register L and copies the contents of the next memory location into register H. Example − LHLD 3225H
STA	16-bit address	16-bit address	The contents of the Accumulator are copied into the memory location specified by the operand. This is a 3-Byte instruction, the second Byte specifies the low-order address and the third Byte specifies the high-order address. Example − STA AB00H
STAX	16-bit address	Store the Accumulator indirect	The contents of the Accumulator are copied into the memory location specified by the contents of the operand. Example − STAX 4050H
SHLD	16-bit address	Store H and L registers direct	The contents of register L are stored in the memory location specified by the 16-bit address in the operand and the contents of H register are stored into the next memory location by incrementing the operand. This is a 3-Byte instruction, the second Byte specifies the low-order address and the third Byte specifies the high-order address. Example − SHLD 3225H
XCHG	None	Exchange H and L with D and E	The contents of register H are exchanged with the contents of register D, and the contents of register L are exchanged with the contents of register E. Example − XCHG
SPHL	None	Copy H and L registers to the stack pointer	The instruction loads the contents of the H and L registers into the stack pointer register. The contents of the H register provide the high-order address and the contents of the L register provide the low-order address. Example − SPHL
XTHL	None	Exchange H and L with top of stack	The contents of the L register are exchanged with the stack location pointed out by the contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1). Example − XTHL
PUSH	Reg. pair	Push the register pair onto the stack	The contents of the register pair designated in the operand are copied onto the stack in the following sequence. The stack pointer register is decremented and the contents of the high order register (B, D, H, A) are copied into that location. The stack pointer register is decremented again and the contents of the low-order register (C, E, L, flags) are copied to that location. Example − PUSH B
POP	Reg. pair	Pop off stack to the register pair	The contents of the memory location pointed out by the stack pointer register are copied to the low-order register (C, E, L, status flags) of the operand. The stack pointer is incremented by 1 and the contents of that memory location are copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is again incremented by 1. Example − POP B
OUT	8-bit port address	Output the data from the Accumulator to a port with 8 bit address	The contents of the Accumulator are copied into the I/O port specified by the operand. Example − OUT 01H
IN	8-bit port address	Input data to Accumulator from a port with 8-bit address	The contents of the input port designated in the operand are read and loaded into the Accumulator. Example − IN 04H

Arjun Thakur

Updated on: 2019-07-30T22:30:24+05:30

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