Arithmetic & Logic Unit

Arithmetic & Logic Unit

• 1.
  ARITHMETIC & LOGICUNITS PRESENTED BY M.RAMYA M.sc(CS & IT) NADAR SARASWATHI COLLEGE OF ARTS & SCIENCE, THENI.
• 2.
  ARITHMETIC & LOGICUNITS An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floating-point unit (FPU), which operates on floating point numbers. An ALU is a fundamental building block of many types of computing circuits, including the central processing unit (CPU) of computers, FPUs, and graphics processing units(GPUs). A single CPU, FPU or GPU may contain multiple ALUs.
• 3.
  FUNCTIONS A number ofbasic arithmetic and bitwise logic functions are commonly supported by ALUs. Basic, general purpose ALUs typically include these operations in their repertoires: ‾ Arithmetic operations. ‾ Bitwise logical operations. ‾ Bit shift operations.
• 4.
  ARITHMETIC OPERATIONS • Add:A and B are summed and the sum appears at Y and carry-out. • Add with carry: A, B and carry-in are summed and the sum appears at Y and carry-out. • Subtract: B is subtracted from A (or vice versa) and the difference appears at Y and carry-out. For this function, carry-out is effectively a "borrow" indicator. This operation may also be used to compare the magnitudes of A and B; in such cases the Y output may be ignored by the processor, which is only interested in the status bits (particularly zero and negative) that result from the operation.
• 5.
  • Subtract withborrow: B is subtracted from A (or vice versa) with borrow (carry-in) and the difference appears at Y and carry-out (borrow out). • Two's complement (negate): A (or B) is subtracted from zero and the difference appears at Y. • Increment: A (or B) is increased by one and the resulting value appears at Y. • Decrement: A (or B) is decreased by one and the resulting value appears at Y
• 6.
  BITWISE LOGICAL OPERATIONS •AND: The bitwise AND of A and B appears at Y. • OR: The bitwise OR of A and B appears at Y. • Exclusive-OR: The bitwise XOR of A and B appears at Y. • Ones' complement: All bits of A (or B) are inverted and appear at Y.
• 7.
  BIT SHIFT OPERATIONS •Arithmetic shift: The operand is treated as a two's complement integer, meaning that the most significant bit is a "sign" bit and is preserved. • Logical shift: A logic zero is shifted into the operand. This is used to shift unsigned integers. • Rotate: The operand is treated as a circular buffer of bits so its least and most significant bits are effectively adjacent. • Rotate through carry: The carry bit and operand are collectively treated as a circular buffer of bits.
• 8.
  STACK ORGANIZATION • Astack is a storage device that stores information in such manner that the item stored last is the first item retrieved. • The register that holds the address for the stack is called stack pointer. • The two operation of a stack are the insertion and deletion of item: • The operation of insertion is called push because it can be thought of as the result of pushing a new item on top. • The operation of deletion is called pop because it can be thought of as the result of removing a one item so the stack pops up.
• 9.
  REGISTER STACK • Astack can be placed in a portion of a large memory or it can be organized as a collection of a finite number of memory words or registers. • The stack pointer register SP contains a binary number whose value is equal to the address of the word that is currently on top of the stack. SP SP+1 Increment stack pointer M[SP] DR Write item on top of the stack if (SP=0)then (FULL 1) Check if stack is full EMTY 0 Mark the stack not empty
• 10.
  MEMORY STACK • Astack can exit as a stand-alone unit or can be implemented in a random-access memory attached to a CPU. • Portion of computer memory partitioned into three segments: – Program – Data – stack
• 11.
  INSTRUCTION FORMATS • Theformat of an instructions is usually depicted in a rectangular box symbolizing the bits of the instruction as they appear in memory words or in a control register. • The bits of the instruction are divided into groups called fields. • The most common fields found in instruction formats are: ‾ An operation code field that specifies the operation to be performed. ‾ An address field that designates a memory address ‾ A mode field that specifies the way the operand is determined.
• 12.
  • The operationcode field of an instruction is a group of bits that define various processor operations , such as add , subtract , complement and shift. • CPU with 16 processor register R0 through R15 will have a register address field of four bits . The binary number 0101. • The number of address fields in the instruction format of a computer depends on the internal organization of its registers.
• 13.
  • Most computersfall into one of three types of CPU organizations: Single accumulator organization. General register organization. Stack organization. • Single The instruction that specifies an arithmetic addition is defined by an assembly language instruction as ADD X where X is the address of the operand.
• 14.
  • ZERO-ADDRESS INSTRUCTIONS Astack-organized computer does not use an address field for the instructions ADD and MUL . The PUSH and POP instructions. PUSH A TOS A PUSH B TOS B • ONE-ADDRESS INSTRUCTIONS One-address instructions use an implied accumulator(AC) register for all data manipulation . Multiplication and Division there is a need for a second register. MUL T AC AC*M[T] LOAD A AC M[A]
• 15.
  • TWO-ADDRESS INSTRUCTIONS Two-addressinstructions are the most common in commercial computers . Again each address field can specify a processor register or a memory word. MOV R1, A R1 M[A] ADD R1, B R1 R1+M[B] • THREE-ADDRESS INSTRUCTIONS computers with three-address instructions formats can use each address field to specify either a processor register or a memory operand. ADD R1, A, B R1 M[A]+M[B] ADD R2, C, D R2 M[C]+M[D]
• 16.
  ADDRESSING MODES • Theoperation field of an instruction specifies the operation to be performed. • The addressing mode specifies a rule for interpreting or modifying the address field of the instruction before the operand is actually referenced. • Computers use addressing mode techniques for the purpose of accommodating one or both of the following: – The user by providing such facilities as pointer to memory , counters for loop control , indexing of data and program relocation. – To reduce the number of bits in the addressing field of the instruction.
• 17.
  • The controlunit of a computer is designed to go through an instruction cycle that is divided into three major phases: – Fetch the instruction from memory. – Decode the instruction. – Execute the instruction. • The instruction may have more than one address field , and each address field may be associated with its own particular addressing modes. • There are two modes that need no address field at all . There are the implied mode and immediate mode.
• 18.
  • IMPLIED MODE: Inthis mode the operands are specified implicitly in the definition of the instruction . The instruction “complement accumulator” is an implied-mode instruction. • IMMEDIATE MODE: In this mode the operand is specified in the instruction itself . An immediate-mode instruction has an operand field rather than an address field. • REGISTER INDIRECT MODE: In this mode the operands are in registers that reside within the CPU . The particular register is selected from a register in the instruction.
• 19.
  • REGISTER INDIRECTMODE: In this mode the instruction specifies a register in the CPU whose content give the address of the operand in memory . The advantage of a register indirect mode instruction is that the address field of the instruction. • AUTOINCREMENT OR AUTODECREMENT MODE: This is similar to the register indirect mode except that the register is incremented or decremented after its value is used to access memory. • DIRECT ADDRESS MODE: In this mode the effective address is equal to the address part of the instruction . The operand resides in memory and its address is given directly by the address field of the instruction
• 20.
  • INDIRECT ADDRESSINGMODE: In this mode the address field of the instruction gives the address where the effective address is stored in memory. effective address = address part of instruction + content of CPU register • RELATIVE ADDRESS MODE: In this mode the content of the program counter is added to the address part of the instruction in order to obtain the effective address . The address part of the instruction is usually a signed number which can be either positive or negative.
• 21.
  • RELATIVE ADDRESSMODE: In this mode the content of the program counter is added to the address part of the instruction in order to obtain the effective address . The address part of the instruction is usually a signed number which can be either positive or negative. • INDEXED ADDRESSING MODE: In this mode the content of an index register is added to the address part of the instruction to obtain the effective address . • BASE REGISTER ADDRESSING MODE: In this mode the content of a base register is added part of the instruction to obtain the effective address . This is similar to the indexed addressing mode except that the register is now called a base register instead of an index register.