Real Time Systems
Real Time Systems
BANSIDHAR JOSHI
[email protected]
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6/19/2012
Response time: The time duration from the occurrences of the event generating the task to the time the task produces its result
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Task Precedence
A task is said to precede another task, if the first task must complete before the second task can start If task Tis output is needed as input by task Tj, then task Tj is constrained to be precede by task Ti Precedence constraints can be represented by means of a precedence graph
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Scheduling Algorithms
Uniprocessor, Multiprocessor Scheduling Ability to obtain a feasible multiprocessor schedule is directly linked to developing a feasible Uniprocessor schedule Uniprocessor: Rate Monotonic, Earliest Deadline First, Deadline Monotonic etc.
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RM- Example
T1(4,1), T2(5,1), T3(10,1), Ui = 1/4 + 1/5 + 1/10 = 0.55 3 (21/3-1) 0.78 Thus, {T1, T2, T3} is schedulable under RM
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t = 0:
t = 4:
t = 5:
T1 T2 T3 0 4 5
T3 arrives, waits
10 3 10 30 10
t = 17:
25
t = 23:
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Schedulability Test
U=
P = lcm (P1Pn) hT(t) be the sum of the execution times of all tasks in set T whose absolute deadlines are less than t.
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DM Algorithm Contd.
When the relative deadline of every task is proportional to its period, RM and DM algorithms are identical When the relative deadlines are arbitrary, DM algorithm performs better DM can produce a feasible schedule when RM algorithm fails, While RM algorithm always fails when the DM algorithm fails
E.g. Consider a set of tasks with a precedence graph, which are released at time 0
T1 T2 T4 T6
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T3 T5
Example Contd.
Ti 1 2 Ei 3 3 Di 6 7
3 4
27 6
2 5
6 6
20 21
27 28
Assumption:
Deadline is specified for each task, such that there will be enough time to execute its children in the task graph by their deadlines even if a task completes at its deadline
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Algorithm PREC
Tasks are numbered so that D1 D2 D3 Dn 1. 2. Schedule task Tn in the interval , [Dn-en, Dn] While ( all the tasks have not been scheduled), let A be the set of as-yet-unscheduled tasks all of whose successors if any, have been scheduled Schedule task Tk , k max { m/ m A} as late as possible enddo 3. Move the tasks forward to the extent possible keeping their order of of execution as specified in step 2
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Handling CriticalContd.
Assumptions
Once a task starts, it continues until it finishes
It is preempted by some higher priority task It is blocked by lower priority task that holds the lock on a critical section that it needs
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Priority Inversion
Lower Priority task (TL)blocking Higher priority task(TH) Can occur in any priority-based preemptive scheduling scheme Occurs when circumstances within the system force a higher priority task to wait for a lower priority task
Example T1 T2 T3 are tasks ( Descending order of priority which share a processor) S critical section used by T1 and T3 t0 - T3 begins execution t1 - T3 enters CS
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Priority Inversion
t2 - T1 released t3 - T1 wants to enter CS, S is locked by T3 which is suspended, T1 is blocked and T3 continues in S t4 - T2 is released which preempts T3 t5 - T2 completes, T3 resumes t6 - T3 exits CS; T1 preempts T3
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Solution:
Use of Priority Inheritance Protocol: If THigh is blocked by TLow , TLow temporarily inherits the priority of THigh. When blocking ceases TLow resumes its original priority Disadvantages: It can lead to deadlock It is possible for the highest priority task to be blocked once by every other task executing on the same processor
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Example Contd.
S1 S2 T1 T4 T2, T4, T5 P(T1) P(T2)
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