Scribd
Upload
1 views25 pages

Ch-8-Input Output Interrupt DMA

The document discusses the interfacing of processors and peripherals, focusing on buses that connect I/O devices to processors and memory. It outlines the types of buses, their advantages and disadvantages, and the concept of handshaking, interrupts, and Direct Memory Access (DMA) for efficient data transfer. Additionally, it covers the evolution of I/O methods and the role of I/O channels in processing data without CPU intervention.

Uploaded by

Meharun Mukta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
1 views25 pages

Ch-8-Input Output Interrupt DMA

The document discusses the interfacing of processors and peripherals, focusing on buses that connect I/O devices to processors and memory. It outlines the types of buses, their advantages and disadvantages, and the concept of handshaking, interrupts, and Direct Memory Access (DMA) for efficient data transfer. Additionally, it covers the evolution of I/O methods and the role of I/O channels in processing data without CPU intervention.

Uploaded by

Meharun Mukta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 25

Interfacing Processors

and Peripherals
interrupt DMA
Chapter - 8
Introduction
8.4 Buses: Connecting I/O Devices to
Processor and Memory
• A bus is a shared communication link, which
uses one set of wires to connect multiple
subsystems.
• Bus: set of control lines + set of data lines
• Two major advantages:
– Versatility
– Low cost
• The major disadvantage:
– Creates a communication bottleneck.
8.4 Buses: Connecting I/O Devices to
Processor and Memory
• A bus transaction includes two parts: sending
the address and receiving or sending the data.
• Input operation: inputting data from the
device to memory.
• Output operation: outputting data to a device
from memory.
8.4 Buses: Connecting I/O Devices
to Processor and Memory
• a) 1st step initiates a read from memory.
• Control line signals a read request to memory
• Data line contains the address
b)2nd step memory is accessing data
• C)3rd step memory transfers data using the
data lines
• Control lines signals that data is available in
I/O device
Types of Buses
• Traditionally classified as:
– Processor-memory buses
– I/O buses
– Backplane buses

• Classification depending on communication


schemes:
– Synchronous buses
– Asynchronous buses
Types of Buses
• Processor-memory buses are
– Short
– Generally high speed
– Matched to the memory system
Types of Buses
• I/O buses can be
– Can be lengthy
– Can have many types of devices connected to
them
– Often have a wide range of data bandwidth
– Typically do not interface directly to the memory
(use processor-memory / backplane buses)
Types of Buses
• Backplane buses allow processor, memory
and I/O devices to coexist on a single bus
Handshaking
Handshaking
Handshaking
Interrput
• Virtually all computers provide a mechanism by which other
module may interrupt normal processing of the processor
Instruction cycle with interrupt
DMA
• When large volume of data are to be moved a
more effiecient technique is DMA(direct
memory access)
DMA Configurations
Single Bus, Detached DMA controller
DMA works as surrogate processor...
Inexpensive and inefficient

20
DMA Configurations (continued)
Single Bus, DMA controller integrated into I/O module
– Controller may support one or more devices
– Each transfer uses bus once – DMA to memory
– CPU is suspended once

21
DMA Configurations (continued)
Separate I/O Bus
– Bus supports all DMA enabled devices with single DMA
controller
– Each transfer uses bus once – DMA to memory
– CPU is suspended once

22
Evolutions of I/O Methods
Growth of more sophisticated I/O devices
1. Processor directly controls device
2. Processor uses Programmed I/O
3. Processor uses Interrupts
4. Processor uses DMA
5. Some processing moved to processors in I/O module
that access programs in memory and execute them on
their own without CPU intervention (I/O Module
referred to as an I/O Channel)

23
I/O Channels (continued)
• I/O Channel is extension of DMA concept
• CPU instructs the I/O channel to execute a program
in memory
• Following these instructions, the I/O channel does
the transfer of data itself

24
I/O Channels
(continued)

Architecture
Selector – one device
transferring block of data at
a time
Multiplexor – TDM can use
more device

25

You might also like