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GROUP 1 Alvie and MR

The document provides an overview of computer architecture, detailing its three main aspects: computer hardware, instruction set architecture, and computer organization. It explains the functional units of a computer, the steps to execute an instruction, and the bus structures used for communication within the system. Additionally, it discusses performance metrics, the role of the processor clock, and the basic performance equation for optimizing execution time.

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0% found this document useful (0 votes)
11 views16 pages

GROUP 1 Alvie and MR

The document provides an overview of computer architecture, detailing its three main aspects: computer hardware, instruction set architecture, and computer organization. It explains the functional units of a computer, the steps to execute an instruction, and the bus structures used for communication within the system. Additionally, it discusses performance metrics, the role of the processor clock, and the basic performance equation for optimizing execution time.

Uploaded by

Melyang Intong
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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GROUP 1

MODULE 1: BASIC

STRUCTURE OF
COMPUTERS
Alvie Maylon
Mary Rose Cajocon
Aivell Agapay
Jekyll Franz Cubresis
Jerell Lugadi
BASIC
CONCEPTS

 Computer Architecture (CA) is concerned with the structure and behaviour of the computer.
 CA includes the information formats, the instruction set and techniques for addressing
memory.
 In general covers, CA covers 3 aspects of computer-design namely: 1) Computer Hardware, 2)
Instruction set Architecture and 3) Computer Organization.
1. Computer Hardware
 It consists of electronic circuits, displays, magnetic and optical storage media and
communication facilities.
2.Instruction Set Architecture
 It is programmer visible machine interface such as instruction set, registers, memory
organization and exception handling.
 Two main approaches are 1) CISC and 2)RISC.
(CISC Complex Instruction Set Computer, RISC Reduced Instruction Set
Computer)
3.Computer Organization
 It includes the high level aspects of a design, such as
→ memory-system
→ bus-structure &
→ design of the internal CPU.
 It refers to the operational units and their interconnections that realize the
architectural
specifications.
 It describes the function of and design of the various units of digital computer
that store and
process information.
Basic Operational Concepts
FUNCTIONAL UNITS

 A computer consists of 5 functionally independent main parts:


1. Input
2. Memory
3. ALU
4. Output&
5. Control units.
BASIC OPERATIONAL CONCEPTS

 An Instruction consists of 2 parts, 1) Operation code (Opcode) and 2)Operands.


 The data/operands are stored in memory.
 The individual instruction are brought from the memory to the processor.
 Then, the processor performs the specified operation.
 Let us see a typical instruction
ADD LOCA R0
 This instruction is an addition operation. The following are the steps to execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the processor.
Step 3: Add the memory operand (i.e. fetched contents of LOCA) to the contents of register
R0.
Step 4: Store the result (sum) in R0.
 The same instruction can be realized using 2 instructions as:
Load
LOCA, R1
Add R1, R0
 The following are the steps to execute the instruction:
Step 1: Fetch the instruction from main-memory into the processor.
Step 2: Fetch the operand at location LOCA from main-memory into the
register R1.
Step 3: Add the content of Register R1 and the contents of register R0.
Step 4: Store the result (sum) in R0.
COMPUTER
MAIN PARTS OF PROCESSOR
 The Proccessor contains ALU, control circuitry and many registers.
 The processor contains ‘n’ general-purpose registers R0 through Rn-1.
 The IR holds the instruction that is currently being executed.
 The control-unit generates the timing-signals that determine when a given
action is to take place.
 The PC contains the memory- address of the next- instruction to be fitched and
executed.
 During the execution of an action instruction, the contents of PC are updated to
point to next instruction.
 The MAR holds the address of the memory-location to be accessed.
 The MDR contains the data to be written into or read out of the addressed
location.
 MAR and MDR facilitates the communication with memory INSTRUCTION
REGISTER (IR), PROGRAM COUNTER (PC), MEMORY ADDRESS REGISTER
(MAR),
MEMORY DATA REGISTER (MDR).
STEPS TO EXECUTE AN INSTRUCTION

1. The addressed of first instruction (to be executed) gets loaded into PC.
2. The contents of PC (i.e address) are transferred to the MAR and control-unit issues
Red signal to memory.
3. After certain amount od elapsed time, the first instruction is read out of memory
and placed into MDR.
4. Next, the content of MDR are transferred to IR. At this point, the instruction can be
decoded and executed.
5. To fetch an operand, its address is placed into MAR and control-unit issues Red
signal. As a result, the operand transferred from memory into MDR, and then it is
transferred from MDR to ALU.
6. Likewise required number of operands is fetched into processor.
7. Finally, ALU performs the desired operation.
8. If the result of this operation is to be stored in the memory, the result is send to
the MDR.
9. The address of the location where the result is to stored is send to the MAR and a
Write cycle is initiated.
10. At some point during execution, contains of PC or incremented to point to next
BUS STRUCTURE

 A bus is a group of lines that serves as a connecting path for several devices.
 A bus may be lines or wires.
 The lines carry data or address or control signal.
 There are 2 types of Bus structures: 1) Single Bus Structure and 2) Multiple Bus
Structure.
1) Single Bus Structure
Because the bus can be used for only one transfer at a time, only 2 units can
actively use the
bus at any given time.
Bus control lines are used to arbitrate multiple requests for use of the bus
Advantages:
1. Low cost&
2. Flexibility for attaching peripheral devices.

2) Multiple Bus Structure


 Systems that contain multiple buses achieve more concurrency in operations.
 Two or more transfers can be carried out at the same time.
 Advantage: Better performance.
 Disadvantage: Increased cost.
• The devices connected to a bus vary widely in their speed of operation.
• To synchronize their operational-speed, buffer-registers can be used.
• Buffer Registers
→ are included with the devices to hold the information during transfers.
→ prevent a high-speed processor from being locked to a slow I/O device during data
transfers.
PERFORMANCE
• The most important measure of performance of a computer is how quickly it can execute
programs.
• The speed of a computer is affected by the design of
1) Instruction-set.
2) Hardware & the technology in which the hardware is implemented.
3) Software including the operating system.
• Because programs are usually written in a HLL, performance is also affected by the compiler
that
translates programs into machine language. (HLL High Level Language).
• For best performance, it is necessary to design the compiler, machine instruction set and
hardware in a
Computer
 Let us examine the flow of program instructions and data betweeb
the memory and the processor.
 At the start of execution, all program instructions are stored in the
main-memory.
 As execution proceeds, instructions are fetched into the processor,
and copy is placed in the cache.
 Later, if the same instruction is needed as second time, it is read
directly from the cache.
 A program will be executed faster if movement of instruction/ data
between the main-memory and the processor is minimized which is
achieved by using the cache.
PROCESSOR CLOCK

 Processor circuits are controlled by a timing signal called a Clock.


 The clock defines regular time intervals called Clock Cycle.
 To execute a machine instruction, the processor divides the action to be
performed into a sequence of basic step such that each step can be completed
in a clock cycle.
 Let P=length of one clock
cycle R=Clock rate.
 Relation between P and R is given by R=1/P.
 R is measured in cycle per second.
 Cycle per second is also called Hertz (Hz).
BASIC PERFORMANCE EQUATION

 Let T=Processor time required to executed a program.


 N= Actual number of instruction executions.
S=Average number of basic steps needed to execute one machine
instruction.
R=Clock rate in cycle per second.
 The program execution time is given by
 Equl is referred to as the basic performance equation.
 To achieve high performance,the computer designer must reduce the value
of T, which means reducing N and S and increasing R.
 The value of N is reduced if source program is compiled into fewer machine
intructions.
 The value of S is reduce if instructions have a smaller number basic steps to
perform.
 The value of R can be increased by using a higher frequency clock.
 Care has to be taken while modifying values since changes in one parameter
may affect the other.
CLOCK RATE

 There are 2 possibilities for increasing the clock rate R.


1. Improving the IC technology makes logic-circuits faster.
This reduces the time needed to compute a basic step.(IC-integrated circuits).
This allows the clock period P to be reduced and the clock rate R to be increased.
2. Reducing the amount of the processing in one basic step also reduces the clock period
P.
• In presence of cache, the percentage of accesses to the main-memory is small.
Hence, much of performance- gain expected from the use of faster technology can be
realized.
The value of T will be reduced by same factor as R is increased “.” S and N
are not affected.

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