BY SHERYL WAUDI & RODGERS WANYOYI SIMIYU

A processor is simply the brain or

computing part of a computer that takes
instructions and data as inputs.
The instructions tell the processor what to
do with the data.
Each processor has an instruction set ,a
collection of instructions that can be
performed by the processor.
Computer architecture can be classified
into two types based on the instruction
sets;
CISC - Complex Instruction Set Computer
RISC – Reduced Instruction Set Computer
 Brief History
• Before 1970,the RAM was slow and expensive.
• Programs were mainly written in high level
languages(HLL) cause they were more user friendly.
• A compiler was used to translate HLL to Low level
language for execution by a processor.
• With time HLL’s complexity increased and therefore
designing a compiler was difficult.
• Compact low level instructions were made to bridge the
gap which simplified the work of designing a compiler.
These instructions occupied less code space.
• Compact Instructions allow you to get more done with
less ,however the silicon or hardware underneath takes
the burden of execution which makes it complex.
• The more diverse the instructions are the more complex
the processor was which lead to large & expensive
processors, increased power consumptions and heat
dissipation.
• CISC thus naturally developed this way.
Simple
20%
Instructions Brief History
• Later in early 1980’s it was discovered that
only a small percentage of the instructions
were used 80% of the time in any given
program.
• This led to the creation of instructions sets
consisting of simple and most commonly
used instructions which was called RISC.
Complex • Simple and less number of instructions
80%
made the hardware a lot less complicated
Program • RISC instructions are simpler and usually of
Complex the same length thus require a few short
clock cycles for completion resulting in
faster execution speed.
• RISC needs more than one instruction as
compared to CISC to get desired result thus
needs more memory/RAM to store this
instructions.

Simple
 CISC
The main objective of a CISC processor is to minimize Its characterized by a large set of complex instructions,
the program size by reducing the number of allowing a single instruction to perform multiple low-level
instructions in a program. This is done by ’embedding operations.
some of the low-level instructions in a single complex CISC processors can execute instructions that combine
instruction’. Later when decoded this instruction multiple operations, like loading data, performing calculations,
generates several microinstructions to execute. and storing results, all within a single instruction.
BLOCK DIAGRAM; Example;
/ ADD 1800, 1801

The ADD instruction picks up numbers from memory locations

1800 and 1801,adds them and then stores the added value in
memory location 1800.
Here a single ADD instruction perfoms multiple low level
operations such as loading numbers from memory,perfoming
arithmetic add operation and then storing the result.
 CISC
CHARACTERICTIC ADVANTAGES DISADVANTAGES
S
o A large number of oExecutes complex
instructions(100-250). instructions. o High power
o Some instructions that perform oEasier for compilers as
specialized tasks are used fewer instructions are consumption
infrequently. needed o Slower execution
o A large variety of addressing oLess RAM is required to
modes(5-20). store instructions. time
o Variable length instruction
oBackward compatability
formats
o Instructions that can - they can run older
software without the
manipulate operands in
need for modifications.
memory.
o Instruction set is complex.
o Compound instructions take
more than a single clock cycle
in their execution.
 Applications
Personal Computers (PC’s) -
Dominated by x86 CPU’s (Intel/AMD)
for general purpose tasks
Servers and Data Centers – Used in
cloud computing, databases and
virtualization.

High-performance computing –
Scientific simulations

Embedded Systems – Industrial,

medical and automotive devices

Gaming & Multimedia –

Consoles( Playstation/Xbox ) and
video processing software.

Legacy systems – Banking and

older software requiring
backward compatability.
 RISC
It utilizes small highly optimized instructions.
RISC architecture operates on load store basis.
It is implemented using hardwired control unit which produces
Considering a similar add instruction.
control signals that regulate the working of processor hardware.
/Load X, 1600
RISC architecture emphasizes on use of registers rather than
/Load Y, 1601
memory.RISC instructions operate on the operands present in
/ADD X, Y
processor’s registers.
/Store 1600, X
BLOCK DIAGRAM;
In this example the ‘Load’ instruction loads data at
memory location 1600 into register X.The second
‘Load’ instruction picks up data from 1601 and loads it
into register Y.The values in register X and Y are then
added.Lastly the result X of addition is stored at
memory location 1600.
 PIPELINING
Pipelining is a mechanism used by RISC processors to execute instruction by fetching the
instruction while other instructions are being decoded and executed simultaneously.
This speeds up the execution and allows the memory system and processor to work continuously.
 RISC
CHARACTERICTIC ADVANTAGES DISADVANTAGES
S
o Relatively few instructions o Has simple addressing modes. o Length of program is increased
o Relatively few addressing o Instructions are simpler since the instruction size is
modes. machine instructions reduced but more instructions
o Memory access limited to load o Instructions are hardwired to are required to perform an
and store instruction fasten execution. operation.
o All operations done within the o Lower sized instructions in o Modification of instruction is
registers of the CPU. RISC instruction set. costly as instructions are
o Fixed length,easily decoded o Instructions execute faster hardwired.
instruction formart. o Its easy to pipeline RISC o There is difficulty in processing
o Single cycle execution. instruction as all instructions complex instruction and
o Hardwired rather than are of fixed size and the addressing mode.
microprogrammed control. opcode and operand are o Doesn’t allow direct memory to
o Use of overlapped register located in the same position in memory transfer,it requires load
windows to speed up the word. and store instruction to do so.
procedure call and return
o Efficient instruction pipeline
APPLICATIONS
Mobile devices – Smart phones and tablets(ARM
processors in iphones & Android devices e.g
snapdragon,exynos)
Smart gadgets – Fitnessbands ,smartwatches, wi-fi
routers.
Cloud & AI – Amazons Graviton servers,Googles AI
chips
Future tech – Self driving cars,robots, drones and IoT
sensors
Laptops – MacBooks(M1/M2/M3 chips) & some
windows laptops (ARM-based),Qualcomm
Snapdragon X Elite.
 COMPARISON BETWEEN CISC AND RISC
CISC PROCESSOR RISC PROCESSOR
Complex instruction set Computer Reduced Instruction Set Computer
Flexible e.g It can perform any trype of add Rigid e.g Cant add a register and contents of a
instruction with just one instruction memory location directly

Slow execution; more than one cycle execution Fastor execution; one cycle execution
Has more addressing modes Less addressing modes
More memory based Register based
Less registers More registers
Poor pipelining Excellent pipelining
Have variable execution times Fixed execution times
Use microprogrammed control unit Use hardwired control unit
Easy to program More complex to program
Used in microprocessors, i.e 8085,8086, e.t.c Used in microcontrollers i.e ARM,PIC etc
 MODERN PROCESSORS

• Pentium Pro uses CISC instructions which are broken down

internally into RISC like instructions(RISC Core)
• Instruction decoders in modern x86 break down CISC
instructions into RISC like operations.
• RISC processors have many complex instructions (multiple
clock cycles for execution)
• Mordern processors are more like hybrid of RISC and CISC.