Jump & Call

Chapter 3
 Topics
 Introduction to jump and call
 Jump
 Call
 Stack
 Calling a function
 Time Delay

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 Jump and Call
 CPU executes instructions
one after another.
1 void main ()
 For example in the following 2 {
C program, CPU first 3 a = b + c;

executes the instruction of 4 c -= 2;

5
line 3 (adds b and c), then d = a + c;
6 }
executes the instruction of
line 4.

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 Jump and Call (Continued)
 But sometimes we need the CPU to
execute, an instruction other than the next
instruction. For example:
 When we use a conditional instruction (if)
 When we make a loop
 When we call a function

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 Jump and Call (Continued)
 Example 1: Not executing
the next instruction,
because of condition. 1 void main ()
 In the following example, 2 {
3
the instruction of line 6 is
int a = 2;
4 int c = 3;
not executed. 5 if (a == 8)
6 c = 6;
7 else
8 c = 7;
9 c = a + 3;
}

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 Jump and Call (Continued)
 Example 2: In this
example the next
instruction will not be
1 void main ()
executed because of loop. 2 {

 In the following example, 3

4
int a, c = 0;
for(a = 2; a < 4; a++)
the order of execution is 5 c += a;

as follows: 6 a = c + 2;
7 }

Line 4 8

Line 5 9


Again, line 4

Again line 5

Line 6

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 Jump and Call (Continued)
 Example 3: Not
executing the next
instruction, because of 1
Code

void func1 ();

calling a function. 2 void main ()
3 {
 In the following example, 4 int a = 2, c = 3;

the instruction of line 6 5 func1 ();

is not executed after line 6

7 }
c = a + 3;

5. 8 void func1 (){

9 int d = 5 / 2;
10 }
11

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 Jump and Call (Continued)
 In the assembly language, there are 2
groups of instructions that make the CPU
execute an instruction other than the next
instruction. The instructions are:
 Jump: used for making loop and condition
 Call: used for making function calls

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 Jump
 Jump changes the Program Counter
(PC) and causes the CPU to execute an
instruction other than the next
instruction.

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 Jump
There are 2 kinds of Jump
 Unconditional Jump: When CPU executes an
unconditional jump, it jumps unconditionally
(without checking any condition) to the target
location.

Example: RJMP and JMP instructions
 Conditional Jump: When CPU executes a
conditional jump, it checks a condition, if the
condition is true then it jumps to the target location;
otherwise, it executes the next instruction.

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 Unconditional Jump in AVR
 There are 3 unconditional
jump instructions in AVR:
RJMP, JMP, and IJMP Code
 We label the location where 1 LDI R16, 0
2
we want to jump, using a 3 L1:
L1:
LDI R17, 2
ADD R16, R17
unique name, followed by ‘:’ 4 L1
RJMP L1
 Then, in front of the jump 5 SUB R10,R15

instruction we mention the

name of the label.
 This causes the CPU to jump
to the location we have
labeled, instead of executing
the next instruction.

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 Ways of specifying the jump target
 There are 3 ways to provide the jump
address:
 JMP (jump)
 RJMP (relative jump)
 IJMP (indirect jump)

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 JMP
 JMP PC = operand
1001 010X XXXX 110X XXXX XXXX XXXX XXXX XXXX XXXX

 Example:
1001 0100 0000 1100 0000 0000 0000 0110


Operand = 0000000000000000000110

22 bits target address, so it can cover entire address space.

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 JMP

Addres Code
 In JMP, the operand, PC: 0007
0002
0001
0000 s
contains the 0000 .ORG 0

address of the 0000 LDI R16, 15

destination Machine
code:
0001 LDI R17, 5
 When an JMP is 940C 0006
0006 0002 JMP LBL_NAME
executed: opCod operan 0004 LDI R18, 4
e d
 PC is loaded 0005 ADD R18, R17

with the 0006

0006 LBL_NAME:

operand value Machine

code:
0006 ADD R16,R17

940C 0006
0006 0007 JMP LBL_NAME
opCod operan 0009
e d

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 RJMP (Relative jump)
 RJMP PC = PC + operand
1100 XXXX XXXX XXXX

 Example: 1100 0000 0000 0110


Operand = 000000000110

PC = PC + 000000000110

12 bit (2048 address locations ahead/before the PC)

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 RJMP
 When RJMP is
executed:
PC: 0003
0007
0006
0002
0001
0000 Addres Code
 The +0
+F
s
0000 .ORG 0
operand 0005 0000 LDI R16, 15

will be Machine
code:
0001 LDI R17, 5
002
C002 0002 RJMP LBL_NAME
added to opCod operan 0003 LDI R18, 4
e d
the current 0004 ADD R18, R17
0005
0005 LBL_NAME:
value of PC Machine
0005 ADD R16,R17
code:
CFFE
FFE 0006 RJMP LBL_NAME
opCod operan 0007
e d

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 IJMP (Indirect jump)
 IJMP PC = Z register
1001 0100 0000 1001

 The instruction has no operand.

 the Program counter is loaded

with the contents of Z register.

 For example, if Z points to location 100, by executing IJMP, the CPU jumps to
location 100.

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 Conditional Jump in AVR
SREG: I T H S V N Z C
 The conditional jump instructions in AVR are as follows:
Instruction Abbreviation of Comment
BREQ lbl Branch if Equal Jump to location lbl if Z = 1,
BRNE lbl Branch if Not Equal Jump if Z = 0, to location lbl
BRCS lbl Branch if Carry Set Jump to location lbl, if C = 1
BRLO lbl Branch if Lower
BRCC lbl Branch if Carry Cleared Jump to location lbl, if C = 0
BRSH lbl Branch if Same or Higher
BRMI lbl Branch if Minus Jump to location lbl, if N = 1
BRPL lbl Branch if Plus Jump if N = 0
BRGE lbl Branch if Greater or Equal Jump if S = 0
BRLTlbl Branch if Less Than Jump if S = 1
BRHS lbl Branch if Half Carry Set If H = 1 then jump to lbl
BRHC lbl Branch if Half Carry Cleared if H = 0 then jump to lbl
BRTS Branch if T flag Set If T = 1 then jump to lbl
BRTC Branch if T flag Cleared If T = 0 then jump to lbl
BRIS Branch if I flag set If I = 1 then jump to lbl
BRIC Branch if I flag cleared If I = 0 then jump to lbl

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 Usages of Conditional jump
 Conditions
 Loop

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 Conditions
 When b is subtracted from a:
 The result is zero, when a is equal to b a
 Carry will be set when a < b -b

SREG: I T H S V N Z C

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 Example 1
 Write a program that if R20 is equal to R21
then R22 increases.

 Solution: R20 == R21

No

SUB R20,R21 ;Z will be set if R20 == R21

Yes
BRNE NEXT ;if Not Equal jump to next
INC R22
increment R22
NEXT:

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 Example 2
 Write a program that if R26 < R24 then
R22 increases.

 Solution: R26 < R24

No

SUB R26,R24 ;C will be set when R26 < R24

Yes
BRCC L1 ;if Carry cleared jump to L1
INC R22
increment R22
L1:

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 Example 3
 Write a program that if R26 >= R24 then
R22 increases.

No
 Solution: R26 >= R24

SUB R26,R24 ;C will be cleared when R26 >= R24

Yes
BRCS L1 ;if Carry set jump to L1
INC R22 increment R22
L1:

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 Example 4: IF and ELSE
int main ( )
{ R17 = 5
R17 = 5;
if (R20 > R21)
R22++;
No
else R20 > R21
R22--;
R17++; Yes
}

increment R22

LDI R17,5
SUB R21, R20 ;C is set when R20>R21 decrement R22

BRCC ELSE_LABEL ;jump to else if cleared

INC R22
JMP NEXT
ELSE_LABEL:
increment R17
DEC R22
NEXT:
INC R17

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 Loop
 Write a program that executes the
instruction “ADD R30,R31” 9 times.
R16 = 9

 Solution:
.ORG 00 R30 = R30 + R31

LDI R16,9 ;R16 = 9

L1: ADD R30,R31
R16 = R16 - 1
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever
Yes
R16 > 0

No

END

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 Loop
 Write a program that calculates the result
of 9+8+7+…+1
R16 = 9
R17 = 0
 Solution:
.ORG 00 R17 = R17 + R16

LDI R16, 9 ;R16 = 9

LDI R17, 0 ;R17 = 0
R16 = R16 - 1
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
Yes
L2: RJMP L2 ;Wait here forever R16 > 0

No

END

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 Loop
 Write a program that calculates the result
of 20+19+18+17+…+1
R16 = 20
R17 = 0
 Solution:
.ORG 00 R17 = R17 + R16

LDI R16, 20 ;R16 = 20

LDI R17, 0 ;R17 = 0
R16 = R16 - 1
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
Yes
L2: RJMP L2 ;Wait here forever R16 > 0

No

END

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 Loop
for (init; condition; calculation) init

{
do something
Do something

} calculation

Yes
Condition

No

END

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 Loop
 Write a program that calculates 1+3+5+…
+27
R20 = 0
 Solution: R16 = 1

LDI R20,0
LDI R16,1 R20 = R20 + R16

L1:ADD R20,R16
R16 = R16 + 2
LDI R17,2
ADD R16,R17 ;R16 = R16 + 2
LDI R17,27 ;R17 = 27
Yes
R16 <= 27
SUB R17,R16
BRCC L1 ;if R16 <= 27 jump L1 No

END

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Example

30
Example

31
Example

32
Looping 100,000 times

33
Example

34
Example

35
 Call Topics
 Stack, Push and Pop
 Calling a function

36
 Subroutine
 It is often needed to perform a particular
sub-task many times on different data
values.
 We split the program into smaller units
which solve a particular part of the
problem. These task specific subunits are
termed as functions, procedures or
subroutines.
 In assembly language, we use the word
subroutine for all subprograms to
distinguish between functions used in other
programming languages.
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Subroutines

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 C function Example
 How can your CPU handle the calls? (Either you write Assembly
code by yourself, or C compiler obtains it for you.)

.ORG 0
MAIN:
LDI R17,1
LDI R18, 2
…
…
CALL SWAP
HERE: RJMP HERE

SWAP:
…
…
RET

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 Calling and Returning
 How does caller function jump and jump
back to right place in function?

SWAP:
MAIN: …
… RET
CALL SWAP
…
…
…
HERE: RJMP HERE

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 Calling and Returning
 Solution: PUSH the PC to the stack when
CALL, and POP that address from the stack
when RET.
 Stack is in RAM (usually at the end of RAM).

SWAP:
MAIN: …
… RET
CALL SWAP
…
…
…
HERE: RJMP HERE

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 Stack – PUSH and POP
 PUSH Rr  POP Rd
[SP] = Rr
SP = SP + 1
SP = SP - 1
Rd = [SP]

S
P In your RAM,
pointed by Stack
Stac Pointer (SP).
k

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SPH and SPL

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 Example - PUSH and POP
 You can use Stack to store data
temporarily using PUSH and POP.
Addres Code
s
ORG 0
0000 LDI R16,HIGH(RAMEND)
0001 OUT SPH,R16
R20: $10
$00 R22 $30
$00
0002 LDI R16,LOW(RAMEND)
:
R21 $00
$20 R0: $00 0003 OUT SPL,R16
: 0004 LDI R20,0x10
0005 LDI R21, 0x20
0006 LDI R22,0x30
SP 0000 0007 PUSH $10
R20
0008 PUSH $20
R21
0009 PUSH $30
R22
000A POP R21
000B POP R0
000C POP R20
000D L1: RJMP L1

Memor
y
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 Calling a Function
 Address of the next instruction is
saved. (PUSH)
 PC is loaded with the appropriate value
used when RET (POP) Addres Code
 CALL AND RET automatically executes s
0000 LDI R16,HIGH(RAMEND)
PUSH AND POP.
0001 OUT SPH,R16
0002 LDI R16,LOW(RAMEND)
0003 OUT SPL,R16
0004 LDI R20,15
Machine 0005 LDI R21,5
code:
940E 000A
000A 0006
0006 CALL FUNC_NAME
opCod operan 00 08
0008 INC R20
e d
0009 L1: RJMP L1
000A FUNC_NAME:
000A ADD R20,R21
S 000B SUBI R20,3
P Stac
PC: 000C
000B
0006
0005
0004
0009
0008 000C RET
k 000D

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 Time delay
28 pin
(PCINT14/RESET) PC6 1 28 PC5 (ADC5/SCL/PCINT13)
(PCINT16/RXD) PD0 2 27 PC4 (ADC4/SDA/PCINT12)
(PCINT17/TXD) PD1 3 26 PC3 (ADC3/PCINT11)
(PCINT18/INT0) PD2 4 MEGA328 25 PC2 (ADC2/PCINT10)
(PCINT19/OC2B/INT1) PD3 5 24 PC1 (ADC1/PCINT9)
(PCINT20/XCK/T0) PD4 6 23 PC0 (ADC0/PCINT8)
VCC 7 22 GND
GND 8 21 AREF
(PCINT6/XTAL1/TOSC1) PB6 9 20 AVCC
(PCINT7/XTAL2/TOSC2) PB7 10 19 PB5 (SCK/PCINT5)
(PCINT21/OC0B) PD5 11 18 PB4 (MISO/PCINT4)
(PCINT22/OC0A/AIN0) PD6 12 17 PB3 (MOSI/OC2A/PCINT3)
(PCINT23/AIN1) PD7 13 16 PB2 (SS/OC1B/PCINT2)
(PCINT0/CLKO/ICP1) PB0 14 15 PB1 (OC1A/PCINT1)

RAM EEPROM Timers

1 PROGRAM
TMachine cycle = Flash ROM
FXTAL Program Data
Bus Bus
CPU

1
TMachine cycle = = 62.5 ns
16MHz Interrupt Other
OSC Ports
Unit Peripherals

I/O
PINS
46
Example

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 Single Cycle Operation
 One machine cycle consists of one oscillator clock.

Some instructions
are long and
takes more than
1 cycle to execute.

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 Time delay
machine cycle
LDI R16, 19 1
LDI R20, 95 1
LDI R21, 5 1
ADD R16, R20 1
ADD R16, R21 1
5

Delay = 5 x T = 5 x 62.5 ns = 312.5 ns

machine cycle

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Example

50
 Branch Penalty
 Depending on the conditional branch instruction result, the
next line to be executed changes. CPU does not know which
line to fetch.

 BRNE will jump if Z = 0 (two machine cycles, discard the

already fetched instruction and fetch again, branch penalty)

 BRNE will not jump if Z = 1 (one machine cycle)

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 Branch Penalty
 While on average 80% of the time a branch
is taken, the AVR always guesses that the
branch will not be taken. This guess is
made simply because it is the simplest to
implement.
 The program counter automatically points
at the next instruction to be executed.

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Example

53
 Time delay

machine cycle
LDI R16, 100
1
AGAIN: ADD R17,R16 *100
1
*100
DEC R16 1
BRNE AGAIN 1/2 *100

Branch penalty

NOP : no operation but takes 1 machine cycle

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 Time delay

machine cycle
LDI R16, 50
1
AGAIN: NOP 1 *50
NOP 1 *50

DEC R16 1 *50

BRNE AGAIN 1/2 *50

NOP : no operation but takes 1 machine cycle

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 Time delay

machine cycle
LDI R17, 20
1
L1: LDI R16, 50
1 *20
L2: NOP
1 *20 * 50
NOP 1 *20 * 50
DEC R16 1 *20 * 50
BRNE L2 1/2 *20 * 50
DEC R17 1 *20
BRNE L1 1/2 *20

NOP : no operation but takes 1 machine cycle

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 Notes on Intel Pentium Processors
 Branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else
structure) will go before this is known definitively. The purpose of the branch predictor is to improve
the flow in the instruction pipeline.
 Branch predictors play a critical role in achieving high performance in many
modern pipelined microprocessor architectures

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