Computer Organization MCA 6105 Session 5 Block2 Part 2
Computer Organization MCA 6105 Session 5 Block2 Part 2
JAN’2024 SESSION
Semester :- 1
Class No. :- 5
Chapter No :- 5
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Block II
Basic Organization
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Micro-programmed control units are slower than hardwired control units because they require an
extra step of decoding the microcode to generate control signals, but they are more flexible and
easier to modify. They are commonly used in modern CPUs because they allow for easier
implementation of complex instruction sets and better support for instruction set extensions.
To execute an instruction, the control unit of the CPU must generate the required control signal
in the proper sequence. There are two approaches used for generating the control signals in
proper sequence as Hardwired Control unit and the Micro-programmed control unit.
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Hardwired Control Unit: The control hardware can be viewed as a state machine that changes
from one state to another in every clock cycle, depending on the contents of the instruction
register, the condition codes, and the external inputs. The outputs of the state machine are the
control signals. The sequence of the operation carried out by this machine is determined by the
wiring of the logic elements and hence named “hardwired”.
• Fixed logic circuits that correspond directly to the Boolean expressions are used to generate
the control signals.
• Hardwired control is faster than micro-programmed control.
• A controller that uses this approach can operate at high speed.
• RISC architecture is based on the hardwired control unit
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Types of Micro-programmed Control Unit – Based on the type of Control Word stored in the
Control Memory (CM), it is classified into two types :
1. Horizontal Micro-programmed Control Unit :
The control signals are represented in the decoded binary format that is 1 bit/CS. Example: If 53
Control signals are present in the processor then 53 bits are required. More than 1 control signal
can be enabled at a time.
• It supports longer control words.
• It is used in parallel processing applications.
• It allows a higher degree of parallelism. If degree is n, n CS is enabled at a time.
• It requires no additional hardware(decoders). It means it is faster than Vertical
Microprogrammed.
• It is more flexible than vertical microprogrammed
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Addressing Modes
An instruction format is a collection of bits that defines the type of instruction, operands, and
the type of operation. The instruction format is represented by a rectangular box, and a basic
instruction format includes the following fields: Opcode, Mode, and Address.
• Opcode: Defines the type of operation to be performed, such as add, subtract, complement,
and shift.
• Address field: Defines the address of operands.
• Mode (or addressing mode) field: Defines the method by which operands are fetched,
modifying the address field of the instruction to determine the actual address of the data.
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3. Register Addressing Mode: Used when data is stored in processor registers, and the address
part of the instruction contains the address of the processor register.
For example: SUB R1, R2.
4. Register Indirect Addressing Mode: The instruction has the address of a processor register,
which contains the address of the operand in memory.
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5. Direct Address Mode: The instruction has the address of a memory cell where the data is
stored, and the effective address is the address stored in the instruction.
6. Indirect Address Mode: The address field of the instruction has a memory address where the
data is stored.
7. Autoincrement or Autodecrement Address Mode: Used when fetching a series of data, and
the address part of the instruction gives the starting address, which is incremented or
decremented to fetch the next data from memory.
8. Relative Address Mode: The content of the program counter is added to the address part of
the instruction to obtain the effective address of data.
9. Indexed Addressing Mode: The content of an index register is added to the address part of
the instruction to obtain the effective address, useful for accessing data arrays in memory.
10.Base Register Addressing Mode: Similar to indexed addressing mode, the content of a base
register is added to the address part of the instruction to obtain the effective address.
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Data transfer instructions facilitate the movement of data from one location to another within the
computer system. These instructions are essential for controlling the flow of information,
including:
• Data transfer between memory and processor registers
• Data transfer between processor registers and input or output devices
• Data transfer between different processor registers
The table below presents a list of eight common data transfer instructions widely utilized across
various computer architectures:
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Arithmetic Instructions
Arithmetic instructions encompass fundamental
operations such as addition, subtraction,
multiplication, and division. The table below
provides a list of typical arithmetic instructions:
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Shift Instructions
Shift instructions move bits within a register either to the left or right. Logical shifts insert 0 to the
end bit position. The table below illustrates various types of shift instructions:
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I/O Organization
Input/Output Subsystem
The I/O subsystem of a computer provides an efficient mode of communication between the
central system and the outside environment. It handles all the input-output operations of the
computer system.
Peripheral Devices
Input or output devices that are connected to computer are called peripheral devices. These
devices are designed to read information into or out of the memory unit upon command from
the CPU and are considered to be the part of computer system. These devices are also called
peripherals.
For example: Keyboards, display units and printers are common peripheral devices.
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Interfaces
Interface is a shared boundary between two separate components of the computer system which
can be used to attach two or more components to the system for communication purposes.
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Input-Output Interface
Peripherals connected to a computer need special communication links for interfacing with CPU.
In computer system, there are special hardware components between the CPU and peripherals to
control or manage the input-output transfers. These components are called input-output
interface units because they provide communication links between processor bus and
peripherals. They provide a method for transferring information between internal system and
input-output devices.
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The Input/output Interface is required because there are exists many differences between the
central computer and each peripheral while transferring information. Some major differences
are:
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Data transfer between the central unit and I/O devices can be handled in generally three types of
modes which are given below:
1. Programmed I/O
2. Interrupt Initiated I/O
3. Direct Memory Access
Programmed I/O
Programmed I/O instructions are the result of I/O instructions written in computer program.
Each data item transfer is initiated by the instruction in the program.
Usually the program controls data transfer to and from CPU and peripheral. Transferring data
under programmed I/O requires constant monitoring of the peripherals by the CPU.
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Bus Architecture
bus.
There are three main part of bus. They are described below:
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1. Control Bus:
It carries the control signal. The control signal is used for controlling and
coordinating the various activities of the computer. It is generated from
the control unit of the CPU. Different architectures result in a different
number of lines within the control bus, as each line is used to perform a
specific task. For instance, different specific lines are used for each of
read, write and reset requests. These are not a group of lines like address
bus and data bus, but individual lines that provide a pulse to indicate a
microprocessor operation. The control unit generates a specific control
signal for every operation, such as memory read or input/output
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2. Address Bus:
Address bus carries memory address within the device. It allows the CPU to reference
memory locations within the device. It connects the CPU and other peripherals and
carries only memory address. In a computer system, each peripheral or memory
location is identified by a numerical value, called an address and the address bus is
used to carry this numerical value as well as it also contains a few control lines to carry
control commands. The address bus is unidirectional, bits flow in one direction from
the processor to peripherals. The processor uses the address bus to perform the first
function of identifying a peripheral or a memory location. The address bus contains the
connections between the processor and memory that carry the signals relating to the
address which the CPU is processing at that time, such as the locations that the CPU is
reading from or writing to. The processor uses the address bus to perform, identifying
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When the address bus carries 8 bit at a time, the CPU could address
only 256 (i.e. 28) bytes of RAM. Most of the early PCs had 20 bit
address buses. So, CPU could address 220bytes of data. Now, with 32-
bit address buses, CPU can address 4GB of RAM. If there is wider bus
path, more information can be processed at a time and hence, it also
affects the processing speed of a computer.
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3. Data Bus:
Data bus transfer data from one location to another across the computer. On these
lines, the meaningful data which is to be retrieved from a device is placed. Data bus
is used by CPU to transfer data. It may be 16-bit or 32-bit data bus. It is an electrical
path that connects the CPU, memory and other hardware devices on the
motherboard. These lines are bidirectional in which the data flows in both directions
between the processor and memory and peripheral devices. The number of wires in
the bus affects the speed at which data can be travel between hardware components
just as the number of lanes on a highway affects the time it takes people to reach
their destination. Each wire can transfer 1 bit of data at a time and 8 wire bus can
move 8 bit at a time, which is 1-byte data at a time. A 16-bit bus can transfer 2 bytes.
32 bits can transfer 4 bytes and so on. Intel 80286 microprocessor used16 bit data
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The transmission of the data on bus lines takes place between approximately 1M baud
for the microcomputer to about 1000 M baud or more for the large more expensive
computers (1 baud = 1 bit/sec). Communication between the different units of a
processing system is carried out along address and data bus and also along various
control lines. All control operations are governed by the master timing source and
clock.
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• In addition to the address and data buses, the 8085 microprocessor has various control
signals that are used to manage data transfer and other operations. These control signals
include the read (RD), write (WR), and hold (HLDA) signals, among others. The RD and WR
signals are used to control data transfer to and from memory or other devices, while the
HLDA signal is used to indicate that the microprocessor is in a hold state and cannot
execute instructions.
• Bus is a group of conducting wires which carries information, all the peripherals are
connected to microprocessor through Bus. Diagram to represent bus organization system of
8085 Microprocessor.
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There are several reasons why bus organization is used in the 8085 microprocessor:
1. Memory access: The bus organization is used for accessing memory by transferring the
address of the memory location through the address bus and the data to be stored or retrieved
through the data bus. This enables the microprocessor to read and write data to and from
memory, which is essential for executing instructions and storing data.
2. I/O operations: The bus organization is used for performing input/output (I/O) operations by
transferring the input/output device address through the address bus and the data to be input or
output through the data bus. This enables the microprocessor to communicate with peripheral
devices such as keyboards, displays, and sensors.
3. Interrupt handling: The bus organization is used for interrupt handling, where the
microprocessor uses the address bus to fetch the interrupt vector and the data bus to fetch the
interrupt service routine. This enables the microprocessor to respond to external events and
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4. DMA operations: The bus organization is used for performing Direct Memory Access
(DMA) operations, where the data transfer between the memory and I/O devices takes
place without the intervention of the microprocessor. This enables high-speed data transfer
between devices and reduces the load on the microprocessor.
5. Control signal transfer: The bus organization is used for transferring control signals
between the microprocessor and other components of the system. This enables the
microprocessor to control the operation of devices and coordinate the execution of
instructions.
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Advantages:
• Flexibility: The bus organization used in the 8085 microprocessor allows it to communicate
with a wide range of devices. This flexibility makes it well-suited for use in a variety of
computer systems, including embedded systems, personal computers, and other devices.
• Modularity: The bus organization makes it easy to add or remove devices from a computer
system. This modularity allows system designers to customize the system to meet the needs of
specific applications.
• Scalability: The bus organization used in the 8085 microprocessor is scalable, which means
that it can be used in systems of varying sizes and complexity. This scalability makes it well-
suited for use in systems that require a wide range of performance levels.
• Low Cost: The bus organization used in the 8085 microprocessor is relatively simple and
inexpensive to implement. This makes it an attractive option for low-cost, embedded
applications.
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Disadvantages:
• Limited Bandwidth: The bus organization used in the 8085 microprocessor has a limited
bandwidth, which can limit the performance of the processor in high-performance
applications.
• Latency: The bus organization can introduce latency, which is the delay between the time a
command is issued and the time the response is received. This latency can be a problem in
real-time applications that require immediate responses.
• Data Integrity: The bus organization used in the 8085 microprocessor is vulnerable to data
corruption due to electromagnetic interference and other sources of noise. This can lead to
errors in data transmission and processing.
• Complexity: The bus organization used in the 8085 microprocessor can be complex to
implement and troubleshoot, which can increase the cost and time required to develop and
maintain computer systems.
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Some of the main issues with bus organization in the 8085 microprocessor are:
1.Limited data transfer rate: The 8085 microprocessor has an 8-bit data bus, which
means that it can transfer only 8 bits of data at a time. This limited data transfer rate can
be a bottleneck in systems that require faster data transfer.
2.Limited address range: The 8085 microprocessor has a 16-bit address bus, which
limits the addressable memory to 64 KB. This can be a limitation in systems that require
larger memory addressing.
3.Bus contention: Bus contention occurs when two or more devices try to use the bus
at the same time. This can cause data corruption and other errors in the system.
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4. Timing issues: The bus organization requires precise timing for the signals to be
transmitted correctly. Any timing errors can cause data corruption or other errors in the
system.
5. Limited number of devices: The bus organization of the 8085 microprocessor can support a
limited number of devices due to its limited bus width and address range. This can be a
limitation in systems that require more devices to be connected.
6. Noise interference: The signals on the bus can be affected by noise interference, which can
cause errors in the system.
7. Power consumption: The bus organization can consume significant power, especially when
many devices are connected to the bus. This can be a limitation in portable or low-power
systems.
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Programming Registers
In Computer Organization, the register is utilized to acknowledge, store, move information
and directions that are being utilized quickly by the CPU. There are different kinds of
registers utilized for different reasons. Some of the commonly used registers are:
• AC ( accumulator )
• DR ( Data registers )
• AR ( Address registers )
• PC ( Program counter )
• MDR ( Memory data registers )
• IR ( index registers )
• MBR ( Memory buffer registers )
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These registers are utilized for playing out the different operations. When we perform some
operations, the CPU utilizes these registers to perform the operations. When we provide input
to the system for a certain operation, the provided information or the input gets stored in the
registers. Once the ALU arithmetic and logical unit process the output, the processed data is
again provided to us by the registers.
5 Program counter PC These registers are utilized in keeping the record of a program
that is being executed or under execution. These registers consist
of the memory address of the next instruction to be fetched.
PC points to the address of the next instruction to be fetched from
the main memory when the previous instruction has been
completed successfully. Program Counter (PC) also functions to
count the number of instructions.
The incrementation of PC depends on the type of architecture
being used. If we use a 32-bit architecture, the PC gets
incremented by 4 every time to fetch the next instruction.
6 Instructions registers IR Instruction registers hold the information about to be executed.
The immediate instructions received from the system are fetched
and stored in these registers.
Once the instructions are stored in registers, the processor starts
executing the set instructions, and the PC will point to the next
instructions to be executed
7 Condition code These have different flags that depict the status of operations.
registers These registers set the flags accordingly if the result of operation
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12 Memory buffer MBR MBR - Memory buffer registers are used to store data content or
register memory commands used to write on the disk. The basic
functionality of these is to save called data from memory.
MBR is very similar to MDR
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13 Stack control SC Stack is a set of location memory where data is stored and retrieved in
registers R a certain order. Also called last in first out ( LIFO ), we can only
retrieve a stack at the second position only after retrieving out the first
one, and stack control registers are mainly used to manage the stacks
in the computer.
SP - BP is stack control registers. Also, we can use DI, SI, SP, and BP
as 2 byte or 4-byte registers.
EDI, ESI, ESP, and EBP are 4 - byte registers
14 Flag register FR Flag registers are used to indicate a particular condition. The size of
the registered flag is 1 - 2 bytes, and each registered flag is
furthermore compounded into 8 bits. Each registered flag defines a
condition or a flag.
The data that is stored is split into 8 separate bits.
Basic flag registers -
Zero flags
Carry flag
Parity flag
Sign flag
Overflow flag.
15 Segment register SR Hold address for memory
16 Data register DX Hold memory operand
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End of Session
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