Microprocessors and

Microcontrollers
Generic block diagram of a
microcomputer
Microcontroller
 The Watchdog

• WDT consists of an oscillator and a binary counter of N bits.

• The output of the counter is connected to the reset input for the
microcontroller.
• The counting process can never be stopped, although the program
being executed can periodically reset the counter to its initial value.
• Every pulse at the output of the oscillator becomes an input to the
counter.
• When the counter reaches its maximum value, the output of the
counter becomes active and gives a reset signal to the microcontroller.
• The goal of the designer is to avoid having the counter in the WDT
reach its maximum value.
• Because, once started, the WDT cannot be stopped; the only way to
avoid the reset signal is by setting the counter back to zero from the
program that is being executed.
 Von Neumann and Harvard
Architectures

von Neumann

The von Neumann architecture uses a single memory connected to the CPU
by using a single address bus (ADDR B), a single data bus (DATA B), and a
single control bus (CNTR B).
 Harvard architectures

Harvard architecture uses different memories for data and instructions connected to
the CPU by an instruction address bus (I-ADDR B), a data address bus (D-ADDR B), an
instruction bus (INST B), a data bus (DATA B), an instruction control bus (I-CNTR B),
and a data control bus (D-CNTR B).
 CISC and RISC Architectures
• Complex set instruction computer (CISC) and reduced instruction set
computer (RISC) are two different computer models classified
according to their set of instructions. A CISC has a complex instruction
set, whereas a RISC has a reduced instruction set.
CISC
• In CISC architecture the instructions increased in complexity to the
point that the instruction set was a combination of very simple
instructions (moving data from memory to the accumulator, for
example), and very complex instructions, such as moving a chain of
data between memory locations. The length of the instructions was
different, the addressing mode became more complex, and in turn all
this increased the complexity of the CPU and its size in the chip.
 RISC
• The CPU in RISC architectures has a short set of simple instructions.
• Each instruction carries out a very simple task (for example, moving
data between CPU and memory), but it can be done very fast.
• Also, all the instructions have the same length.
• There are few addressing modes and all of them can be applied to any
cell.
• This means that the CPU will be less complex, resulting in it being
possible to increase the frequency of the oscillator in order to
increase the speed at which operations are executed.
• Furthermore, as the CPU contains fewer transistors, they are less
expensive to design and manufacture.
• PIC microcontrollers have RISC architecture.
 PIC16F877A
Microcontroller
Introduction and Features
• The PIC microcontroller PIC16f877a is one of the most renowned microcontrollers
in the industry.
• One of the main advantages is that it can be write-erase as many times as possible
because it uses FLASH memory technology.
• It has a total number of 40 pins and there are 33 pins for input and output.
• An EEPROM is also featured in it which makes it possible to store some of the
information permanently like transmitter codes and receiver frequencies and
some other related data.
• It has a smaller 35 instructions set.
• It can operate up to 20MHz frequency.
• The operating voltage is between 4.2 volts to 5.5 volts. If you provide it voltage
more than 5.5 volts, it may get damaged permanently.
• It does not have an internal oscillator like other PIC18F46K22, PIC18F4550.
• The maximum current each PORT can sink or source is around 100mA. Therefore,
the current limit for each GPIO pin of PIC16F877A is 10 mili ampere.
• It is available in four IC packaging such as 40-pin PDIP 44-pin PLCC, 44-pin TQFP,
44-pin QFN
• PLCC, or Plastic Leaded Chip Carrier, is a type of SMD package
designed to house integrated circuits in a square or rectangular form.
• PDIP full form is the Plastic Dual In-line Package, one of the prevalent
packaging options within the DIP Package category. It leverages plastic
materials, such as epoxy resin or phenolic resin, known for their
commendable electrical insulation properties.
• TQFP (Thin Quad Flat Package) is a compact, low-profile version of the
regular quad flat package. This reduced thickness makes TQFPs ideal
for designs where space and portability are critical, such as compact
PCBs used in portable electronics and miniature devices.
• QFN (Quad Flat No-lead) package is probably the most popular
semiconductor package today because of four reasons: low cost, small
form factor and good electrical and thermal performance.
 PIN configuration and PIN description of
PIC16F877A microcontroller
• There are 40 pins of this microcontroller IC.
• It consists of two 8 bit and one 16 bit timer.
• Capture and compare modules, serial ports, parallel ports and five
input/output ports are also present in it.
 PIN 1: /MCLR:
• The first pin is the master clear pin of this IC.
• It resets the microcontroller and is active low, meaning that it should
constantly be given a voltage of 5V and if 0 V are given then the
controller is reset.
• Resetting the controller will bring it back to the first line of the
program that has been burned into the IC.
• A push button and a resistor is connected to the pin.
• The pin is already being supplied by constant 5V.

• When we want to reset the IC we just have to push the button which
will bring the MCLR pin to 0 potential thereby resetting the controller.
 PIN 2: RA0/AN0
• PORTA consists of 6 pins, from pin 2 to pin 7, all of these are bidirectional
input/output pins.
• Pin 2 is the first pin of this port.
• This pin can also be used as an analog pin AN0. It is built in analog to digital
converter.
PIN 3: RA1/AN1
• This can be the analog input 1.
PIN 4: RA2/AN2/Vref-
• It can also act as the analog input2. Or negative analog reference voltage can
be given to it.
PIN 5: RA3/AN3/Vref+
• It can act as the analog input 3. Or can act as the analog positive reference
voltage.
 PIN 6: RA4/T0CKI
To timer0 this pin can act as the clock input pin, the type of output is open
drain.
PIN 7: RA5/SS/AN4
This can be the analog input 4. There is synchronous serial port in the controller
also and this pin can be used as the slave select for that port.
PIN 8: RE0/RD/AN5
PORTE starts from pin 8 to pin 10 and this is also a bidirectional input output
port. It can be the analog input 5 or for parallel slave port it can act as a ‘read
control’ pin which will be active low.
PIN 9: RE1/WR/AN6
It can be the analog input 6. And for the parallel slave port it can act as the
‘write control’ which will be active low.
PIN 10: RE2/CS/AN7
It can be the analog input 7, or for the parallel slave port it can act as the
‘control select’ which will also be active low just like read and write control pins.
 PIN 11 and 32: VDD
These two pins are the positive supply for the input/output and logic pins.
Both of them should be connected to 5V.
PIN 12 and 31: VSS
These pins are the ground reference for input/output and logic pins. They
should be connected to 0 potential.
PIN 13: OSC1/CLKIN
This is the oscillator input or the external clock input pin.
PIN 14: OSC2/CLKOUT
This is the oscillator output pin. A crystal resonator is connected between
pin 13 and 14 to provide external clock to the microcontroller. ¼ of the
frequency of OSC1 is outputted by OSC2 in case of RC mode. This indicates
the instruction cycle rate.
 PIN 15: RC0/T1OCO/T1CKI
PORTC consists of 8 pins. It is also a bidirectional input output port. Of them,
pin 15 is the first. It can be the clock input of timer 1 or the oscillator output
of timer 2.
PIN 16: RC1/T1OSI/CCP2
It can be the oscillator input of timer 1 or the capture 2 input/compare 2
output/ PWM 2 output.
PIN 17: RC2/CCP1
It can be the capture 1 input/ compare 1 output/ PWM 1 output.
PIN 18: RC3/SCK/SCL
It can be the output for SPI or I2C modes and can be the input/output for
synchronous serial clock.
 PIN 23: RC4/SDI/SDA
It can be the SPI data in pin. Or in I2C mode it can be data input/output pin.
PIN 24: RC5/SDO
It can be the data out of SPI in the SPI mode.
PIN 25: RC6/TX/CK
It can be the synchronous clock or USART Asynchronous transmit pin.
PIN 26: RC7/RX/DT
It can be the synchronous data pin or the USART receive pin.
PIN 19,20,21,22,27,28,29,30
All of these pins belong to PORTD which is again a bidirectional input and
output port. When the microprocessor bus is to be interfaced, it can act as the
parallel slave port.
PIN 33-40: PORT B
All these pins belong to PORTB. Out of which RB0 can be used as the external
interrupt pin and RB6 and RB7 can be used as in-circuit debugger pins.
• As we have studied 5 input and output ports namely PORTA, PORTB,
PORTC, PORTD and PORTE which can be digital as well as analog.
• We will configure them according to our requirements.
• But in case of analog mode, the pins or the ports can only act as
inputs. There is a built in A to D converter which is used in such cases.
• Multiplexer circuits are also used.
• But in digital mode, there is no restriction. We can configure the ports
as output or as input. This is done through programming.
• There is a register named as ‘TRIS’ which controls the direction of
ports. For different ports there are different registers such as TRISA,
TRISB etc.
• If we set a bit of the TRIS register to 0, the corresponding port bit will
act as the digital output.
• If we set a bit of the TRIS register to 1, the corresponding port bit will
act as the digital input.
• For example to set the whole portb to output we can write the
program statement as:
TRISB=0;
• Now the port will act as the output port and we can send any value
on the output such as
PORTB=0xFF;
• FF represents all 1’s in binary i.e. FF=11111111, now all the pins of
port b are high. If we connect LEDs at all the pins then they will all
start glowing in this condition.
• If we want to negate the values of the port b we can use the
statement:
PORTB~=PORTB;
 Main features of PIC16F877A
microcontroller
• Like all other microcontroller, PIC16F877A also provide built-in useful
features as mentioned in this list:
• Analog to digital converter module : It has 8 bit ADC module which
consists of 8 channels. We can use 8 analog sensors with this
microcontroller.
• Timers: It provides three timers timer0, timer1 and timer2. All these
timers can be used either in timer mode or in counter mode. These
timers are used to generate delays, pulse width modulation, counting
external events and timer interrupts. TIMER0 is a 8 bit timer and it
can operate with internal or external clock frequency. When we use
Timer0 in timer mode, we usually operate it with internal frequency
and in counter mode, we trigger it with external clock source.
Similarly, TIMER1 is a 16-bit timer and it can also operate in both
modes. TIMER2 is also of 8-bit. It is used with PWM as a time base for
CCP module.
• EEPROM : It also has built-in Electrically erasable read only memory
256 x 8 bytes which can used to store data permanently even if the
microcontroller is switched off, data will remain there. It is usually
used with electronics lock related projects.
• PWM modules : It also provide 2 CCP modules. CCP stands for
capture compare PWM modules. We can easily generate two PWM
signals with this microcontroller. The maximum resolution it supports
is 10 bits.
• Serial or UART communication pins : It support one UART channel.
UART pins are used for serial communication between digital devices.
RC7 pin is a transmitter or RX pin which is pin number 26. RC6 is a
receiver or Tx pin which is pin number 25.
• I2C Communication : PIC16F877A also support I2C communication
and its has one module for I2C communication. Pin#18/RC3 and
23/RC4 are SCL and SDA pins respectively. SCL is a serial clock line and
SDA is serial data line.
• Interrupts : Interrupts have wonderful applications in embedded
systems field. PIC16F877A microcontroller provides 8 types of
interrupts viz. External interrupts, timer interrupts, PORT state change
interrupts, UART interrupt, I2C, PWM interrupts.
• Comparator module : It has a comparator module which composed of
two comparators. They are used for comparison of analog signal
similar to comparators in electronics circuits. Input pins for these
comparators are RA0, RA1, RA2 and RA3 and output can measured
through RA4 and RA5.
• Watchdog timer : WDT is a on chip separate oscillator which runs freely.
It is a separate oscillator from OSC1/CLKI. WDT will also work even if
the device is in sleep mode. It is used to wake up device from sleep
mode and also used to generate watchdog timer reset.
• Sleep mode : PIC16F877A also provide sleep mode operation. In this
mode, device operates at very low power. All peripherals draws
minimum current.
• Brown out detection : It also has a brown out detection circuit which
detects the significant drop in power supply voltage. If supply voltage
drop from a certain limit, it will generate a interrupt signals. This
configuration bit (BODEN) is used to disable or enable this circuitry.
• Brown out reset : This option reset the device upon detection of brown
out interrupt signal from BODEN signal. if supply voltage goes below
threshold for more than 100 micro seconds, Programmable code
protection, Brown out reset will occur and device will remain reset until
the voltage raise to its nominal value. Device checks for voltage after
every 72ms. amount of current.
The following points summarizes the features supported by
PIC 16F877.
•High performing RISC architecture
•Only 35 instructions to make the life of programmer easier.
•Almost all the instructions are single cycle instructions. Very
few program branching Instructions are two cycled.
•Operating speed: Clock input (20 MHz), instruction cycle (200
Nano seconds).
•Huge amount of memory up to 368 x 8 bit of RAM (data
memory), 256x8 of EEPROM (data memory) and 8 k x 14 of
flash memory.
•Eight level hardware stack which is unique.
•Clear support for interrupts.
•Support for multiple addressing modes.
•Power on reset and power up timers.
•Brown out reset and separate oscillator start up circuits.
•Designed for industrial usage.
•Highly flexible and low power consumption microprocessor.
•Inbuilt ADC which converts analog input to 10 bit digital output.
•Three timers built in, and they are available with following
specifications.
• Timer 0-Can be configured as an 8 bit timer/counter with pre-scalar.
• Timer 1-16 bit timer/counter bit timer mode with pre-scalar.
• Timer 2-8 bit timer/counter with pre-scalar and post-scalar support.
•Two CCP modules. C-Capture, C-Compare and P-PWM are supported.
•Synchronous serial port with having facility to be configured as Serial Peripheral
Interface (SPI) and I2C (I square C)
•Multiple input and output ports (5) with control signals for Read and Write.
•Universal Synchronous Asynchronous Receiver Transmitter (USART) support.
•Maximum operating frequency can be extended up to 20 MHz.
•In-circuit serial programming and in-circuit debugging capability,
which is very handy For the programmers in trouble shooting.
•Power saving modes as sleep mode which can help in saving power.
•Watchdog timer, which is helpful in industrial applications and
safety critical Applications.
•Instruction decoder and Program counter: Instruction register is a
temporary storage Area for the current instruction before it is being
executed. Decoder will take the Instruction and then will decode the
same. Decoded instruction will be then moved To the next stage.
Whereas program counter will hold the address of the next
instruction To be executed.
•Flag registers for reading the status of the operations.
•W register, equivalent of accumulator register is available which will
be the most used Register.
HARVARD ARCHITECTURE AND PIPELINING
• The PIC16C6x/7x family of microcontrollers use what
is called a Harvard architecture to achieve an
exceptionally fast execution speed for a given clock
rate.
• instructions are fetched from program memory using
buses that are distinct from the buses used for
accessing variables in data memory, I/O ports, etc.
• Every instruction is coded as a single 14-bit word and
fetched over a 14- bit-wide bus.
• Consequently, as instructions are fetched from
successive program memory locations, a new
instruction is fetched every cycle.
• The CPU executes each instruction during the
cycle following its fetch, pipelining instruction
fetches and instruction executions to achieve
the execution of one instruction every cycle.
• This is illustrated in Figure 2-2a. It can be seen
that while each instruction requires two cycles
(a fetch cycle followed by an execute cycle),
the overlapping of the execute cycle of one
instruction with the fetch cycle of the next
instruction leads to the execution of a new
instruction every cycle.
• Each member of the PIC16C6x/7x family of
microcontrollers has either 2K (e., 2048) or 4K (i.e.,
4096) addresses of program memory.
• As shown in Figure a program memory of 2K
addresses needs only an 11-bit program counter to
access any address (2^11 = 2048 = 2K).
• A program memory of 4K addresses needs a 12-bit
program counter, as shown in Figure.
• This PIC family actually uses a 13-bit program
counter, allowing for extending the family to an 8K
program memory without changing the CPU
structure.
• For the 4K and 2K parts, the upper bit or bits are
• Two addresses in the program memory address
space are treated in a special way by the CPU.
• When the CPU starts up from its reset state, its
program counter is automatically cleared to zero.
• This is illustrated in Figure with the content of
address H’000’ being a goto Mainline instruction.
• The second special address, H’004’, is
automatically loaded into the program counter
when an interrupt occurs.
• As shown in Figure a goto IntService instruction
can be assigned to this address, to cause the CPU
to jump to the beginning of the interrupt service
routine, located elsewhere in the memory space.
• when we deal with tables, the program code
can be simplified some-what if any tables that
are created are assigned to addresses in the
range H’005’-H’0FF’. For most applications,
these 250 locations provide more than enough
room.
• Mainline program begins immediately following
the tables. A microcontroller mainline program
typically has the structure
• The mainline program begins execution when
the PIC comes out of reset.
• It continues running until one of the PIC’s
interrupt sources requests service.
• At that point the execution of the mainline code
is temporarily suspended.
• The CPU begins the execution of the interrupt
service routine by automatically loading the
program counter with H’004’.
• At the completion of the interrupt service
routine, the CPU returns to where it left off in the
mainline program.
• Program writing is somewhat simplified if all the
program code for the tables, the mainline
program and its subroutines, and the interrupt
service routine and its subroutines take up less
than 2K words of instruction.
• It is a result of having a one-word subroutine
call instruction.
• As shown in Figure 2-5, bits 10 . . . 0 of the call
instruction are loaded into the program counter.
• At the same time, bits 4 and 3 of a special
register called PCLATH (“program counter latch’)
are loaded into bits 12 and 11 of the program
counter.
Addressing used by
subroutine calls.
• As long as the program memory is less
than 2048 (i.e., 2K) words, bits 4 and 3 of
PCLATH can be left initialized to H’00’, and
then the 11 address bits in the call
instruction will uniquely identify the
starting address of any subroutine located
up to address H’7FF’.
• For programs larger than this, it is
necessary to ensure that bit 3 of PCLATH is
set or cleared appropriately each time a
subroutine is called.
 REGISTER FILE STRUCTURE
• Register file is PIC terminology used to
denote the locations that an instruction can
access via an address.
• The register file consists of two components
• General-purpose register file
• Special-purpose register file
• The general-purpose register file is another
name for the microcontroller’s RAM. Data
can be written to each 8-bit location,
updated, and retrieved any number of times.
• The special-purpose register file contains input and
output ports as well as the control registers used to
establish each bit of a port as either an input or an
output.
• It contains registers that provide the data input and
data output to the variety of resources on the chip,
such as the timers, the serial ports, and the analog-
to-digital converter.
• It has registers that contain control bits for selecting
the mode of operation of a chip resource as well as
enabling or disabling its operation.
• It has registers containing status bits, which denote
the state of one of these chip resources (e.g., “serial
data transfer complete’).
• The register file structure is illustrated in
Figure, with addresses that span the 8-bit
range from 00h to FFh.
• Because the direct addressing mode
employed by many instructions uses only 7
bits of the instruction to identify a register
file address, the eighth bit of the register
file address must come from a separate
register bank select bit, RP0.
• Figure shows the register file divided into
these two banks, defined by the direct
addressing mode.
Register
File
Structure
• Figure illustrates direct addressing being
used to access register file address 14h or
94h depending on the value of RP0.
Direct
Addressing
Mode
• Every instruction that can employ the direct
addressing mode can, as an alternative,
employ the indirect addressing mode.
• In this alternative mode, the full 8-bit register
file address is first written into FSR, a special-
purpose register that serves as an address
pointer to any address throughout the entire
register file.
• A subsequent direct access of INDF will
actually access the register file using the
content of FSR as a pointer to the desired
location of the operand. This is illustrated in
Figure.
Indirect
Addressing
Mode
• To use indirect addressing, the desired 8-bit address must first be written
into FSR using direct addressing.
• To make this possible regardless of the value of the register bank select
bit, RP0, the FSR register is accessed at either address H'04’ or H’84’.
• Looking at these two addresses as binary numbers
H’04’=B’0000 0100’2
H’84’=B’1000 0100’
• it can be seen that they differ only in the bit controlled by RP0 during
direct addressing. Consequently, a write to either H’04’ or H’84’ will
write into the FSR register.
• Several key registers (including INDF) have this feature of being
accessible at either of two addresses differing only in bit 7, which allows
these key registers to be accessed with direct addressing regardless of
the value of the RP0 bit.
• The CPU registers, shown in Figure, are
used in the execution of the instruction set.
W
• The working register, is used by many
instructions as the source of an operand.
• It may also serve as the destination for the
result of the instruction execution.
• It serves a function similar to that of the
accumulator in many other microcontrollers.
Status Register
• The STATUS register contains the C, or carry, bit.
• When two 8-bit operands are added together, a 9-
bit result can occur.
• The ninth bit is placed in the carry bit.
• The DC, or digit carry, bit signals that a carry from
the lower 4 bits occurred during an 8-bit addition.
• DC = 1 as a result of the carry from the bit 3 to the
bit 4 position.
• This digit carry bit is useful when adding binary-
coded-decimal (BCD) encoded numbers in which
each 8-bit byte contains two 4- bit binary-coded-
decimal digits.
• The Z, or zero, bit is affected by the execution of
many (but not all) arithmetic and logic
instructions.
• Before testing the Z bit following an instruction, it
should be ascertained whether the instruction is
indeed one of the group that affects the Z bit.
• For example, the instruction decf can be used to
decrement a variable in RAM, setting the Z bit if
the result is zero and clearing it otherwise.
• In contrast, the instruction decfsz can be used to
decrement the same variable in RAM and skip over
the next instruction if the result is zero but leave
the Z bit unchanged.
• The reset status bits, NOT_TO and NOT_PD,
are used in conjunction with the PIC’s sleep
mode.
• The microcontroller can put itself to sleep
to save power during intervals when it has
nothing to do.
• It can be awakened by the occurrence of
any of three kinds of events.
• Upon wakeup, the CPU can check these two
reset status bits to determine which kind of
event awakened it and then respond
accordingly.
• The register bank select bit, RP0, used in
conjunction with the direct addressing
mode.
• Bank 0 can be selected for direct
addressing by clearing the RP0 bit with
bcf STATUS, RP0 ; Select Bank 0
In like manner, Bank 1 can be selected by
setting the RP0 bit with
bsf STATUS, RP0 ; Select Bank 1
• Bits 7 and 6 of the STATUS register are
unused by the family of PIC
microcontrollers.
• These bits are reset to zero as the chip
comes out of reset.
• Microchip Technology suggests that these
bits should be left in the reset state so code
written for these PIC parts will be upward
compatible with other PIC parts.
• FSR is the pointer used for indirect
addressing.
The role of PCL and PCLATH.
• PCL is actually the lower 8 bits of the 13-bit
program counter.
• It can be read, just like any other register.
• PCLATH is not the upper 5 bits of the program
counter.
• PCLATH can be read from or written to without
affecting the program counter.
• The upper 3 bits of PCLATH remain zero (and
serve no purpose).
• It is only when PCL is written to that PCLATH is
automatically written into the program counter
at the same time.
• The program counter is supported by an eight-
level stack.
• When an interrupt occurs, the program counter
is automatically pushed onto the stack.
• Since PIC microcontroller programs are
normally designed so further interrupts remain
disabled while any interrupt source is being
serviced, only one of the eight stack locations is
needed to deal with the interrupt return
address.
• The other seven levels can be divided between
nested subroutines within the interrupt service
routine and nested subroutines within the
mainline program.
• Each time a subroutine is called by a call instruction
located at address n in the program memory, the
return address (i.e., n+1) is pushed onto the stack.
• If from within this subroutine another sub-routine is
called, its return address is pushed onto the stack.
• This can be repeated as this subroutine calls another,
which calls another, which calls another, etc.
• As each subroutine terminates, its return address is
popped off the stack and loaded into the program
counter.
• The return addresses that were pushed onto the stack
are popped off of the stack in reverse order.
• If the deepest nesting of subroutines in the
mainline code is M levels and if the deepest
nesting of subroutines in the interrupt
service routine is I levels, then the eight-
level stack of Figure supports
M+1+I <= 8
 INSTRUCTION SET
• The byte-oriented instructions that require two
parameters
e.g., xorwf f,F(W)]
• expect the f to be replaced by the name of a special-
purpose register (e.g) PORTA) or the name of a RAM
variable (e.g., TEMP1), which serves as the source of
the operand.
• The F(W) parameter is the destination of the result of
the operation.
• It should be replaced by
F if the destination is to be the source register
W if the destination is to be the working register
• Single-bit manipulation
bef PORTB, 0 ;Clear bit 0 of
PORTB
bsf STATUS,C ;Set the carry bit
• Clear/move
clrw ;Clear the working register, W
clrf TEMP1 ;Clear temporary variable TEMP1
movlw 5 ;Load 5 into W
movlw 10 ; Load D’ 10 ‘ or H’10’or B’10’ into W
;depending upon default representation
movwf TEMP1 ;Move W into TEMP1
movwf TEMP1,F ;Incorrect Syntax
movf TEMP1,W ;Move TEMP1 into W
swapf TEMP1,F ;Swap 4-bit nibbles of TEMP1
swapf TEMP1,W ;Move TEMP1 to W, swapping nibbles
;and leave TEMP1 unchanged
 Increment/decrement/complement
incf TEMP1,F ;Increment TEMP1
incf TEMP1,W ;W <- TEMP1 + 1; TEMP1
Unchanged
decf TEMP1,F ;Decrement TEMP1
comf TEMP1, F ;Change 0’S to 1’s and 1’s to
0’s
 Multiple-bit manipulation

andlw B’00000111’ ;Force upper 5 bits of W to zero

andwf TEMP1,F ;TEMP1 <- TEMP1 AND W
andwf TEMP1,W ;W <- TEMP1 AND W
Lorlw B’00000111’ ;Force lower 3 bits of W to one
iorwf TEMP1,F ;TEMP1 <- TEMP1 OR W
xorlw B’00000111’ ;Complement lower 3 bits of W
xorwf TEMP1,W ;W <- TEMP1 XOR W
 Addition/subtraction
addlw 5 ;Add 5 to W
addwf TEMP1,F ;;TEMP1 <- TEMP1 + W
sublw 5 ;W <- 5 - W (not W <- W — 5!)
subwf TEMP1,F ;TEMPL <- TEMP1 - W
 Rotate
• rlf TEMP1,F ;Nine-bit left rotate through C
;(C <- TEMP1,7 ; TEMP1,i+1 <-
TEMP1,i
;TEMP1,0 <- C)
• rrf TEMP1,W ;Leave TEMP1 unchanged
;copy to W and rotate W right
through C
 Conditional branch
btfsc TEMP1,0 ;Skip the Next Instruction if bit
0 of
;TEMP1 equals zero
btfss STATUS,C ; skip if c=1
decfsz TEMP1,F ;Decrement TEMP1; skip if zero
incfsz TEMP1,W ;Leave TEMP1 unchanged; skip
if
;TEMP1 = H’FF’; W <- TEMP1 + 1
 Goto/call/return/return from
interrupt
goto There ;Next instruction to be executed
is ;labeled “There”
call Task1 ;Push return address; next instruction
;to be executed is labeled “Task1”
return ;Pop return address off of stack
retlw 5 ;Pop return address; W <- 5

Retfie ;Pop return address; reenable interrupts

 Miscellaneous
clrwdt ;I£ watchdog timer is enabled, this
;instruction will reset it (before it resets the
CPU)
sleep ;Stop clock; reduce power; wait
;for watchdog timer or external signal
Nop ;Do nothing; wait one clock cycle