ARM MICROCONTROLLER & EMBEDDED

SYSTEMS (17EC62)

RTOS and IDE for Embedded System Design

(Lecture-4)
(Lecture-6)
Integration and Testing of
Embedded Hardware and
Firmware
 Integration and Testing of
Embedded Hardware and Firmware
• Integration and testing of the embedded hardware and firmware is the immediate
step following the embedded hardware and firmware development.
• Embedded hardware and firmware are developed in various steps.

• The final embedded hardware constitute of a PCB with all necessary

components affixed to it as per the original schematic diagram.
• Embedded firmware represents the control algorithm and configuration data
necessary to implement the product requirements on the product.
• The target embedded hardware without embedding the firmware is a dumb device
and cannot function properly.
• If you power up the hardware without embedding the firmware, the device
may behave in an unpredicted manner.
 Integration and Testing of Embedded
Hardware and Firmware

• Both embedded hardware and firmware should be independently tested (Unit

Tested) to ensure their proper functioning.
• Functioning of individual hardware sections can be done by writing small utilities
which checks the operation of the specified part.
• As far as the embedded firmware is concerned, its targeted functionalities can
easily be checked by the simulator environment provided by the embedded
firmware development tool's IDE (Integrated Development Environment).
 Integration of Hardware and Firmware
• Integration of hardware and firmware deals with the embedding of firmware into
the target hardware board.
• It is the process of 'Embedding Intelligence' to the product.

• For non-operating system based embedded products, if the processor/controller

contains internal memory and the total size of the firmware is fitting into the code
memory area, the code memory is downloaded into the target
controller/processor.
• If the processor/controller does not support built in code memory or the size of the
firmware is exceeding the memory size supported by the target
processor/controller, an external dedicated EPROM/FLASH memory chip is used
for holding the firmware.
• This chip is interfaced to the processor/controller.
 Out-of-Circuit Programming
• Out-of-circuit programming is performed
outside
the target board.
• The processor or memory chip into which
. Fig.: Firmware Embedding Tool –
the firmware needs to be embedded is taken Device Programmer: LabTool-48UXP

out of the target board and it is programmed with the help of a

programming device (also called Programmer)

• The programming device is a dedicated unit which contains the necessary

hardware circuit to generate the programming signals.
 Out-of-Circuit Programming
• The programmer contains a ZIF socket with
locking pin to hold the device to be
programmed.
• The programming device will be under the
control of a utility program running on a PC.
• Usually the programmer is interfaced to the
PC through RS-232C/USB/Parallel Port
Interface.
• The commands to control the programmer Fig.: Universal Programmer

are sent from the utility program to the

programmer through the interface.
Out-of-Circuit Programming

DB-9 COM/USB
connector

PC COM/USB port Device programmer

RS-232/USB cable

Fig.: Interfacing of Device Programmer with PC

 Out-of-Circuit Programming
• The sequence of operations for embedding the firmware with a
programmer is listed below:

1. Connect the programming device to the specified port of PC (USB/COM

port/parallel port).
2. Power up the device (Ensure that the power indication LED is ON).

3. Execute the programming utility on the PC and ensure proper connectivity is

established between PC and programmer. In case of error, turn off device
power and try connecting it again.
4. Unlock the ZIF socket by turning the lock pin.
5. Insert the device to be programmed into the open socket.
6. Lock the ZIF socket.
 Out-of-Circuit Programming
7. Select the device name from the list of supported devices.
8. Load the hex file which is to be embedded into the device.
9. Program the device by 'Program' option of utility program.
10. Wait till the completion of programming operation (Till busy LED of
programmer is OFF).
11. Ensure that programming is successful by checking the status LED on the
programmer (Usually 'Green' for success and 'Red' for error condition) or by
noticing the feedback from the utility program.
12. Unlock the ZIF socket and take the device out of programmer.
 Out-of-Circuit Programming
• Once the firmware is successfully embedded into the device, insert the device
into the board, power up the board and test it for the required functionalities.
• If you want the firmware to be protected against unwanted external access, and
if the device is supporting memory protection, enable the memory protection on
the utility before programming the device.
• The programmer usually erases the existing content of the chip before
programming the chip.
• Only EEPROM and FLASH memory chips are erasable by the programmer.

• Some old embedded systems may be built around UVEPROM chips and
such chips should be erased using a separate 'UV Chip Eraser' before
programming.
 Out-of-Circuit Programming
• Drawbacks
• The major drawback of out-of-circuit programming is the high development time.
• Whenever the firmware is changed, the chip should be taken out of the development
board for re-programming.
• This is tedious and prone to chip damages due to frequent insertion and removal.

• The programmer facilitates programming of only one chip at a time and it is not
suitable for batch production.
• Can be resolved using a 'Gang Programmer', which contains multiple ZIF sockets
(4 to 8) and capable of programming multiple devices at a time.
• But it is bit expensive compared to an ordinary programmer.

• Another big drawback of out-of-circuit programming is that once the product is deployed
in the market in a production environment, it is very difficult to upgrade the firmware .
Out-of-Circuit Programming

Fig.: Gang Programmer

 Out-of-Circuit Programming

• Applications
• The out-of-system programming technique is used for firmware
integration for low end embedded products which runs without an
operating system.
• Out-of-circuit programming is commonly used for development of
low volume products and Proof of Concept (PoC) product
Development.
 In System Programming (ISP)
• Here, the programming is done 'within the system', meaning the firmware is
embedded into the target device without removing it from the target board.
• It is the most flexible and easy way of firmware embedding.

• The only pre-requisite is that the target device must have an ISP support.

• Apart from the target board, PC, ISP cable and ISP utility, no other additional
hardware is required for ISP.
• The target board can be interfaced to the utility program running on PC through
Serial Port/Parallel Port/USB.
• The communication between the target device and ISP utility will be in a serial
format.
• The serial protocols used for ISP may be 'Joint Test Action Group (JTAG)' or
'Serial Peripheral Interface (SPI)' or any other proprietary protocol.
 In System Programming (ISP)
• In order to perform ISP operations, the target device should be powered up in
a special 'ISP mode'.
• ISP mode allows the device to communicate with an external host, such as a
PC or terminal, through a serial interface.
• The device receives commands and data from the host, erases and reprograms
code memory according to the received command.
• Once the ISP operations are completed, the device is re-configured so that it
will operate normally by applying a reset or a re-power up.
 In System Programming (ISP)
• Devices with SPI - In System Programming support contains a built-in SPI
interface (Serial Peripheral Interface) and the on-chip EEPROM or FLASH
memory is programmed through this interface.
• The primary I/O lines involved in SPI - In System Programming are:
• MOSI - Master Out Slave In
• MISO - Master In Slave Out
• SCK - System Clock
• RST - Reset of Target Device
• GND -Ground of Target Device
 In System Programming (ISP)
• PC acts as the master and target device acts as the slave in ISP.

• The program data is sent to the MOSI pin of target device and the device
acknowledgement is originated from the MISO pin of the device.
• SCK pin acts as the clock for data transfer.

• Since the target device works under a supply voltage less than 5V (TTL/CMOS),
it is better to connect these lines of the target device with the parallel port of the
PC.
• Since parallel port operations are also at 5V logic, no need for any other
intermediate hardware for signal conversion.
• Standard SPI-ISP utilities are feely available on the internet and there is no need
for going for writing own program.
 In System Programming (ISP)
• For ISP operations, target device needs to be powered up in a pre-defined sequence.
• The power up sequence for In System Programming for Atmel's AT89S series
microcontroller family is listed below:
1. Apply supply voltage between VCC and GND pins of target chip.
2. Set RST pin to "HIGH" state.
3. If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 24
MHz clock to XTAL1 pin and wait for at least 10 milliseconds.
4. Enable serial programming by sending the Programming Enable serial instruction
to pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs
to be less than the CPU clock at XTAL1 divided by 40.
5. The Code or Data array is programmed one byte at a time by supplying the
address and data together with the appropriate Write instruction. The selected
memory location is first erased before the new data is written. The write cycle is
self-timed and typically takes less than 2.5 ms at 5V.
6. Any memory location can be verified by using the Read instruction, which returns
the content at the selected address at serial output MISO/P1 .6.
7. After successfully programming the device, set RST pin low or turn off the chip
power supply and turn it ON to commence the normal operation.
 In System Programming (ISP)
• The key player behind ISP is a factory programmed memory (ROM) called
'Boot ROM'.
• The Boot ROM normally resides at the top end of code memory space and it
varies in the order of a few Kilo Bytes.
• It contains a set of Low-level Instruction APIs and these APIs allow the
processor/controller to perform the FLASH memory programming, erasing and
reading operations.

• By default the Reset vector starts the code memory execution at location 0000H.
• If the ISP mode is enabled through the special ISP Power up sequence, the
execution will start at the Boot ROM vector location.
 In System Programming (ISP)

• In System Programming technique is the best advised programming

technique for development work since the effort required to
reprogram the device in case of firmware modification is very little.
• Firmware upgrades for products supporting ISP is quite simple.
 In Application Programming
• In Application Programming (IAP) is a technique used by the
firmware running on the target device for modifying a selected
portion of the code memory.
• It is not a technique for first time embedding of user written
firmware.
• It modifies the program code memory under the control of the
embedded application.
• Updating calibration data, look-up tables, etc., which are stored in
code memory, are typical examples of IAP.
 In Application Programming
• The Boot ROM resident API instructions which perform various functions such as
programming, erasing, and reading the Flash memory during ISP-mode, are
made available to the end-user written firmware for IAP.
• Thus, it is possible for an end-user application to perform operations on the
Flash memory.
• A common entry point to these API routines is provided for interfacing them to
the end-user's application.
• Functions are performed by setting up specific registers as required by a specific
operation and performing a call to the common entry point.
• Like any other subroutine call, after completion of the function, control will
return to the end-user's code.
 In Application Programming
• The Boot ROM is shadowed with the user code memory in its address range.
• This shadowing is controlled by a status bit.

• When this status bit is set, accesses to the internal code memory in this
address range will be from the Boot ROM.
• When cleared, accesses will be from the user's code memory.

• Hence the user should set the status bit prior to calling the common entry
point for IAP operations.
 Use of Factory Programmed Chip
• It is possible to embed the firmware into the target processor/controller memory
at the time of chip fabrication itself.
• Such chips are known as 'Factory programmed chips'.

• Once the firmware design is over and the firmware achieved operational stability,
the firmware files can be sent to the chip fabricator to embed it into the code
memory.
• Factory programmed chips are convenient for mass production applications and
it greatly reduces the product development time.
• It is not recommended to use factory programmed chips for development
purpose where the firmware undergoes frequent changes.
• Factory programmed ICs are bit expensive.
 Firmware Loading for Operating
System Based Devices
• The OS based embedded systems are programmed using the In System
Programming (ISP) technique.
• OS based embedded systems contain a special piece of code called 'Boot loader'
program which takes control of the OS and application firmware embedding
and copying of the OS image to the RAM of the system for execution.
• The boot loader for such embedded systems comes as pre-loaded or it can be
loaded to the memory using the various interface supported like JTAG.
• The boot loader contains necessary driver initialisation implementation for
initialising the supported interfaces like UART, TCP/IP etc.
 Firmware Loading for Operating System
Based Devices
• Boot loader implements menu options for selecting the source for OS image to
load.
• E.g. Load from FLASH ROM, Load from Network, Load through UART etc.

• In case of the network based loading, the boot loader broadcasts the target's
presence over the network and the host machine on which the OS image resides
can identify the target device by capturing this message.
• Once a communication link is established between the host and target
machine, the OS image can be directly downloaded to the FLASH memory of
the target device.
Thank You