Combinational Logic

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Combinational Logic: Definition
Definition:
A combinational circuit consists of logic gates whose outputs at any
time are determined directly from the present combination of inputs
without regard to previous inputs.

A combinational circuit consists of –

i. Input variables
ii. Logic gates
iii. Output variables Fig: Block diagram of a combinational circuit

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Combinational Logic: Block Diagram of a
Combinational Circuit
A combinational circuit consists of –
i. Input variables
ii. Logic gates
iii. Output variables
Fig: Block diagram of a combinational circuit

For each possible input combination, there is one and only one possible
output combination. A combinational circuit can be described by m
Boolean functions, one for each output variable. Each output function
is expressed in terms of the n input variables.
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Combinational Logic: Design Procedure
The design procedure of a combinational circuit involves the following
steps:
1. The problem is stated.
2. The number of available input variables and required output
variables is determined.
3. The input and output variables are assigned letter symbols
4. The truth table that defines the required relationships between
inputs and outputs is derived.
5. The simplified Boolean function for each output is obtained.
6. The logic diagram is drawn.
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Combinational Logic: Design Procedure
Constraints
A practical design method would have to consider following
constraints:
1. Minimum number of gates
2. Minimum number of inputs to a gate
3. Minimum propagation time of the signal through the circuit
4. Minimum number of interconnections
5. Limitations of the diving capabilities of each gate

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Combinational Logic: Adders

The most basic arithmetic operation is the addition of two binary digits.
This simple addition consists of four possible elementary operations,
namely, 0+0=0, 0+1=1, 1+0=1, 1+1=10.

The first three operation s produce a sum whose length is one digit.
When augend and addend bits are equal to 1, the binary sum consists
of two digits. The higher significant bit of this result is called a carry.
1+1=10.

Carry 6
Combinational Logic: Adders
Half Adder:
A combinational circuit that performs the addition of two bits is called a
half adder.
Full Adder:
A combinational circuit that performs the addition of three bits (two
significant bits and a previous carry) is called a full adder.
Two half adders can be employed to implement a full adder.

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Combinational Logic: Half - Adders
Half Adder:
The circuit needs two binary inputs and two binary outputs. The input
variables designate the augend (x) and addend (y) bits.
The output variables produce the sum (S) and carry (C).
The truth table is shown below:
x y C S
0 0 0 0 • The carry output is 0 unless both inputs are 1
0 1 0 1 • The S output represents the least significant bit of
1 0 0 1 the sum.
1 1 1 0
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Combinational Logic: Half – Adders (Cont’)
The Simplified Boolean functions two outputs can be obtained directly
form the truth table. The simplified sum of products expressions are:
S = x’y + xy’
C = xy

The half adder can be implemented with an

exclusive-OR and an AND gate as shown in the
figure.

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Combinational Logic: Full Adders
A full-adder is a combinational circuit that forms the arithmetic sum of
three input bits. It consists of three inputs and two outputs.
- Two of the input variables denoted by x and y, represent the two
significant bits to be added. The third input z represents the carry
from the previous lower significant position.
- Two outputs are necessary because the arithmetic sum of three
binary digits ranges in value from 0 to 3, and binary 2 or 3 needs two
digits. The two outputs are designated by the symbols S for sum and C
for carry.

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Combinational Logic: Full Adders
The truth table of the full-adder is as follows:
x y z C S
0 0 0 0 0 • The eight rows under the input variables designate
0 0 1 0 1 all possible combinations of 1’s and 0’s that these
0 1 0 0 1
variables may have.
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

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 Combinational Logic: Full Adders (Cont’)
The Simplified Boolean functions two outputs can be obtained directly
form the truth table. The simplified sum of products expressions are:
S = x’y’z + x’yz’ + xy’z’ + xyz
C = xy + xz + yz
x
y
Fig: Implementation of a full-adder
with two half-adders and an OR
gate

z
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Combinational Logic: Full Adders (Cont’)
x
y

S = z ⊕ (x ⊕ y)
= z’ (xy’ + x’y) + z (xy’ +x’y)’ C = z (xy’ + x’y) + xy
= z’ (xy’ + x’y) + z (xy +x’y’) = xy’z + x’yz + xy
= x’y’z + x’yz’ + xy’z’ + xyz
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Combinational Logic: Subtractors
The subtraction of two binary numbers is accomplished by taking the
complement of the subtrahend and adding it to the minuend.
By this method the subtraction operation becomes an addition
operation requiring full-adders for its machine implementation.
Two types of subtrators are there –
1. Half-Subtractor: A half-subtractor is a combinational circuit that
subtracts two bits and produces their difference.
2. Full-Subtractor: A full-subtractor is a combinational circuit that
performs a subtraction between two bits taking into account that a
1may have been borrowed by a lower significant stage.
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Combinational Logic: Binary Parallel Adder
A single Full Adder performs the addition of two one bit numbers and
also the carry input. For performing the addition of binary numbers
with more than one bit, more than one full adder is required and the
number of Full Adders depends on the number bits. Thus, a Parallel
Adder, is a combination of Multiple Full Adders and is used for adding
all bits of the two numbers simultaneously.

Binary Parallel Adder: A binary parallel adder is a digital function that

produces the arithmetic sum of two binary numbers in parallel.
It consists of full-adders connected in cascade, with the output carry
from one full-adder connected to in input carry of the next full adder. 15
Combinational Logic: Binary Parallel Adder
It consists of full-adders connected in cascade, with the output carry
from one full-adder connected to in input carry of the next full adder.

Fig: n bit full-adders

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Combinational Logic: Multiplexers
Multiplexing is the generic term used to describe the operation of
sending one or more analogue or digital signals over a common
transmission line at different times or speeds and as such, the device
we use to do just that is called the multiplexer.
Multiplexer: A digital multiplexer is a combinational circuit that selects
binary information from one of many input lines and directs it to a
single output line.

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Combinational Logic: Multiplexers
A 4-line to 1-line multiplexer is shown in the
figure.
Each of the four input lines A,B,C,D is
applied to one input of an AND gate.

Selection lines a and b are decoded to

select a particular AND fate. The function
table in the figure lists the input-to-
output path for each possible but
combination of the selection lines.
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Combinational Logic: Multiplexers
The truth table of a multiplexer is given here.

1. When the selectors b and a both are 0 then

the input bit A will go to the output Q.
2. When the selector combination is 0 1 for b
and a respectively the input bit B will go to
the output Q.
3. When the selector combination is 1 0 for b
and a respectively the input bit C will go to
the output Q.
4. When the selectors b and a both are 1 then
the input bit D will go to the output Q. 19
Combinational Logic: Demultiplexers
Demultiplexer: The demultiplexer is a combinational logic circuit
designed to switch one common input line to one of several separate
output lines.
The demultiplexer converts a serial data signal at the input to a parallel
data at its output lines as shown below:

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 Combinational Logic: Demultiplexers
4 Channel Demultiplexer using Logic Gates

The demultiplexer takes one single input

data line and then switches it to any one of a
number of individual output lines one at a
time.

Fig: Symbol of a demultiplexer Fig: 4 Channel

Demultiplexer using
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Logic Gates
Combinational Logic: Programmable Logic
Devices
Programmable Logic Devices
A programmable Logic device refers to any type of integrated circuit that a
logic design can be implemented and reconfigured in the field by the end
user.
The PLD provides flexibility for designers to implement many different
designs in varying complexities for many different applications.
Types:
There are three kinds of PLDs –
1. Programmable Read Only Memory
2. Programmable Array Logic
3. Programmable Logic Array 22
Combinational Logic: Programmable Logic
Devices
1. Programmable Read Only Memory: Read Only Memory is a memory
device, which stores the binary information permanently. That
means, we can’t change that stored information by any means
later. If the ROM has programmable feature, then it is called as
Programmable ROM.
PROM is a programmable logic device that has fixed AND array & Programmable OR
array. The block diagram of PROM is shown in the following figure.

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Combinational Logic: Programmable Logic
Devices
2. Programmable Array Logic
PAL is a programmable logic device that has Programmable AND
array & fixed OR array.
The advantage of PAL is that we can generate only the required product terms of
Boolean function instead of generating all the min terms by using programmable
AND gates. The block diagram of PAL is shown in the following figure.

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Combinational Logic: Programmable Logic
Devices
3. Programmable Logic Array
PLA is a programmable logic device that has both Programmable
AND array & Programmable OR array. Hence, it is the most flexible PLD.

The block diagram of PLA is shown in the following figure.

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