Computer Architecture and Organization
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Logic Gates and truth tables
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NAND GATE
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OR GATE
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NOR Gate
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XOR GATE
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XNOR and NOT GATE
XNOR GATE
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Design AND ,OR and NOT gate Using NAND GATES
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Design AND ,OR and NOT gate Using NOR GATES
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What is character representation in computer architecture?
All characters, whether they are
letters, punctuation or digits, are stored
as binary numbers.
All the characters that a computer can
use are called a character set .
A representation of a character as a
distinctive bit string that is defined by
some character encoding.(ASCII)
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Memory Operation
A memory unit consists of
Memory Unit data lines, address
selection lines, and
control lines.
Data Lines
Address Lines Control Lines
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Data Lines
• It represent data input / output
lines in a memory chip.
• Ex:
• 2M x 8 of memory has 8-data
lines and 21 address lines since,
• 2M= 2 x = 221
• M= Mega
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Address Lines
To identify number of memory locations in the chip according to the
following relation:
n- Address line = memory locations
Ex:
if n=9 then the chip contains = 512 locations.
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Control lines
• Control lines: memory chips are provided two control lines, / and
line is used to specify the required operation about read or write.
The (Chip Select) line is required to select a given chip in a multi- chip memory
system.
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Memory locations and addresses
Memories are made up of registers (silicon chip )
Each register in the memory is one storage location
Storage location is also called as memory location
Memory locations are identified using Address
The data in a memory are stored and retrieved by the process called writing and reading respectively
The total number of bit a memory can store is its capacity
A word or word length is a group of n bits where a memory unit stores binary information.
The word length of the computer has evolved from 8, 16, 24, 32 to 64 bits.
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Memory locations
and addresses
Holds both instructions
and data
With k address bits
n bits per
location(8,16,32)
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Problem
A memory with 64k words and a word size of 1 byte.
Find Out
1.The Memory location?
2. Address of these locations varies from?
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Solution
A memory with 64k words and a word size of 1 Kbyte.
Find Out
1.Memory unit has 64 * 1024 = 65536 memory locations
2. Address of these locations varies from 0 to 65535.
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Problem
memory device has 16 address lines and 64 data lines.
Calculate the storage capacity of the memory in bits.
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Solution
2^address lines = addressable locations 2^16 = 65,536
addressable locations.
Addressable locations * data lines = accessible storage
65,536 * 64 = 4194304 bits.
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Problem
Calculate the number of address lines and data lines needed to access all
stored data in each of the following sizes of memory:
a. 64K × 8 b. 128K × 16
c. 128K × 32 d. 256K × 16
Calculate the total bit capacity of each
memory.
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Solution
64K × 8
The no. of address lines required = = 64K
The no. of data lines required = 8 bits
Total storage capacity = 64K X 8
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Problem
How many address lines and data lines are necessary to make
a. 4× 8 memory b. 8 × 8 memory
c. 16 × 8 memory
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Solution
For a memory device, n number of address lines are required for
memory locations.
An 4x8 memory can be expressed as . It requires 8 data lines and 2
address lines.
An 8x8 memory can be expressed as . It requires 8 data lines and 3
address lines.
An 16x8 memory can be expressed as . It requires 8 data lines and 4
address lines.
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Consider 32-bit long word in each location which can store
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Addressing Modes
The different ways in which the location of an operand is specified in an
instruction are addressing modes.
Operation code field defines the
operation to be performed.
Mode field is used to locate the operands
needed for the operation.
Address field designate a memory
address or a register .
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Modes that need no address field
There are two modes that need no address field at all.
These are
Implied mode
Immediate mode
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Implied mode:
In this mode the operands are specified
implicitly in the definition of the instruction.
example: zero address instruction in stack
organized CPU the operation type instruction do
not need an address field.
The instruction.
ADD,CLC (used to reset Carry flag to 0)
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Immediate Addressing Mode
An immediate mode instruction has an operand rather
than an address field . The operand field contain the actual
operand to be used.
Example
MOV AL, 35H (move the data 35H into AL register)
This instruction is used to initialize a register to a
constant.
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Register Direct Mode
When the address field specify a processor register the instruction is said
to be in the register mode. In the register mode the operands are in
registers that resides inside the CPU.
Example
MOV AX,CX (move the
contents of CX register to AX
register)
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Register Indirect Mode
The selected register
contain the address of
the register rather than
operand itself .
Example
MOV AX, [BX](move the contents
of memory locations addressed by the
register BX to the register AX)
• Used in pointers.
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Auto-increment/Auto-decrement Mode
In this mode E.A of the operand is the content of register specified in instruction , after /
before accessing the operand the content of the register are automatically
incremented/decremented to the step sized.
This mode is like the register indirect
mode except that the register is incre
/decr after its value is used.
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Direct Addressing Mode/Absolute addressing Mode
In this mode E.A / address of operand directly given in instruction.
In this mode the effective address is equal to the address part of the instruction the operand
resides in memory and its address is given directly by the address field of the instruction.
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Indirect Addressing Mode
In this mode address field of an instruction give the address where the E.A is stored in memory .
Control fetch the instruction from memory and uses its address part to access memory again to read the E.A.
Example:
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A few addressing modes require that the address field of the instruction
be added to the content of a specific register in the CPU the effective
address in these modes is obtained from the following computation:
E.A = address part of the instruction + content of CPU register
The CPU register used in the computation may be the PC(program
counter),Index register , Base register
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In either case we have different addressing modes.
These modes are:
1.Relative Address Mode
2.Indexed Addressing Mode
3.Base Register Addressing Mode
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Relative Address mode
•In this mode the content of the PC
is added to the address part of
instruction in order to obtain the
effective address.
PC= PC + Relative value
EA= PC + Address field value
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Index Addressing Mode (SI,DI)
•In this mode the content of an
index register is added to the
address part of the instruction to
obtain the effective address.
Example:
MOV AX, [SI +05]
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Based Indexed Addressing
Base Indexed Register:
The operand’s offset is sum of the content of a base register BX or BP and
an index register SI or DI.
Example:
ADD AX, [BX+SI]
•
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Why Addressing Modes are used
Computer use addressing mode techniques for the purpose of giving programming
versatility to the user by providing such facilities:
1-As pointer to memory.
2-As counters for loop controls.
3-Indexing of data.
4-Program relocation.
5-To reduce the number of bits in the addressing field of the instruction.
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Problem
• Match each of the high- level language statements given on the left -hand side with the
most natural addressing mode from those listed on the right- hand side.
1. A[1] = B[J]; a. Indirect addressing
2. while [*A++]; b. Indexed addressing
3. int temp = *x; c. Autoincrement
(A) (1, c), (2, b), (3, a)
(B) (1, a), (2, c), (3, b)
(C) (1, b), (2, c), (3, a)
(D) (1, a), (2, b), (3, c)
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Solution
• List 1 List 2
• 1) A[1] = B[J]; b) Index addressing
Here indexing is used
• 2) while [*A++]; c) auto increment
• The memory locations are automatically incremented
• 3) int temp = *x; a) Indirect addressing
• Here temp is assigned the value of int type stored
at the address contained in X
• (C) is correct solution.
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Problem
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Solution
X-2,Y-3,Z-1
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Problem
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Solution-Address bus
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Problem
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Solution-Accumulator
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Problem
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Solution
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Problem
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Solution-Address modification
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Problem
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Solution- STA
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Problem
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Solution
1.A-3,B-4,C-2,D-1
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Problem
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Solution
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