Computer Architecture and Organization

(CSE2003)

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Contents

 Instruction Set Architecture (ISA)

 Elements of an Instruction
 Instruction Types
 Instruction Formats
 Instruction Length
 Addressing Modes
 Numerical Problems

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Session Objectives

After this session students will be able to:

 understand the Instruction Set Architecture (ISA)
 understand Instruction formats
 understand Instruction types
 List and explain various addressing modes

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Instruction Set Architecture (ISA)

What is Computer instruction?

 A computer instruction is a binary code that specifies a sequence of microoperations for the
computer.
 Every digital computer has its own instruction set .

What is Instruction code?

 The instruction code is the group of bits that instruct the computer that performs a specific
operation. It is divided into parts, each having its own interpretation.

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 Instruction Set Architecture (ISA)
2The ISA serves as the boundary between software and hardware. We will briefly describe the
instruction sets found in many of the microprocessors used today.
 The ISA of a processor can be described using 5 categories:
Operand Storage in the CPU
 Where are the operands kept other than the memory?
Number of explicit operands
 How many operands are named in a typical instruction.
Operand location
 Can any ALU instruction operand be located in memory? Or all operands be kept internally in the
CPU?
Operations
 What operations are provided in the ISA.
Type and size of operands
 What is the type and size of each operand and how is it specified?

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Instruction Set Architecture (ISA)
 All of the above the most distinguishing factor is the first.
 The 3 most common types of ISAs are:
1. Stack - The operands are implicitly on top of the stack.
2. Accumulator - One operand is implicitly the accumulator.
3. General Purpose Register (GPR) - All operands are explicitly mentioned, they are either
registers or memory locations.

We will look at the assembly code of

C = A + B;
in all 3 architectures:

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Instruction Set Architecture (ISA)
 Lets look at the assembly code of
C = A + B;
in all 3 architectures:

Stack Accumulator GPR

PUSH A LOAD A LOAD R1, A
PUSH B ADD B ADD R1, B
ADD STORE C STORE C, R1
POP C

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Advantages
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and disadvantages of each of these approaches
Stack
Advantages: Simple Model of expression evaluation (reverse polish). Short instructions.
Disadvantages: A stack can't be randomly accessed This makes it hard to generate efficient code.
The stack itself is accessed every operation and becomes a bottleneck.

Accumulator
Advantages: Short instructions.
Disadvantages: The accumulator is only temporary storage so memory traffic is the highest for this
approach.

GPR
Advantages: Makes code generation easy. Data can be stored for long periods in registers.
Disadvantages: All operands must be named leading to longer instructions.

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and disadvantages of each of these approaches

 Earlier CPUs were of the first 2 types but in the last 15 years all CPUs made are GPR processors.

 The 2 major reasons are that registers are faster than memory.

 The more data that can be kept internally in the CPU, the faster the program will run.

 The other reason is that registers are easier for a compiler to use.

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Advantages
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and disadvantages of each of these approaches
 As we mentioned before most modern CPUs are of the GPR (General Purpose
Register) type. A few examples of such CPUs are the IBM 360, DEC VAX, Intel 80x86 and Motorola
68xxx.

 But while these CPUS were clearly better than previous stack and accumulator based CPUs they
were still lacking in several areas:

 Instructions were of varying length from 1 byte to 8 bytes. This causes problems with the prefetching
and pipelining of instructions.

 ALU (Arithmetic Logical Unit) instructions could have operands that were memory locations.
Because the number of cycles it takes to access memory varies so does the whole instruction. This isn't
good for compiler writers, pipelining and multiple issues.

 Most ALU instructions had only 2 operands where one of the operands is also the destination. This
means this operand is destroyed during the operation or it must be saved before somewhere.
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ISA
 The ISA defines the functions performed by the CPU. The instruction set is the programmer's
means of controlling the CPU. Thus programmer requirements must be considered in designing the
instruction set.

Most important and fundamental design issues

 Operation repertoire (Operation Collection): How many and which operations to provide,
and how complex operations should be.
 Data Types: The various type of data upon which operations can be performed.
 Instruction format: Instruction length (in bits), number of address bit, size of various fields and
so on.
 Registers: Number of CPU registers that can be referenced by instructions and their use.
 Addressing: The mode or modes by which the address of an operand is specified.

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ISA - Elements of an Instruction
Each instruction must contain following information required by the CPU for execution.
Operation Code
 Specifies the operation to be performed (e.g., add, move etc.). The operation is specified by a
binary code, know as the operation code or opcode.
Source operand reference
 The operation may involve one or more source operands; that is, operands that are inputs for the
operation.
Result operand reference
 The operation may produce a result.
Next instruction reference
 This tells the CPU where to fetch the next instruction after the execution of the current
instruction.

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ISA
Operation Code
 Most basic part of instruction, it is operation part aka operation code.
 Operation code defines operations such as ADD, SHIFT etc.
 No. of bits in opcode depends on available operations for that particular computer.
 Opcode with n-bits can specify 2n instructions.

Source and result operands can be in one of the three areas

 main or virtual memory.
 CPU register.
 I/O device.

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 Instruction Types
1.2 Data Processing
 Arithmetic and Logic instructions provide computational capabilities for processing numeric
data.
 Logic (Boolean) instructions operate on the bits of a word as bits rather than as numbers.
 Logic instructions thus provide capabilities for processing any other type of data.
 These operations are performed primarily on data in CPU registers.
2. Data Storage
 Memory instructions are used for moving data between memory and CPU registers.
3. Data Movement
 I/O instructions are needed to transfer program and data into memory from storage device or
input device and the results of computation back to the user.
4. Control
 Test and branch instructions are used to test the value of a data word or the status of a
computation.
 Branch instructions are used to branch to a different set of instructions depending on the decision
made.
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Instruction Format

 Size and meaning of fields within the instruction.

 Layout of the bits of an instruction.
 Example: A simple instruction format

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Instruction Format

 An instruction format must include an opcode and, implicitly or explicitly, zero or more
operands.

 Each explicit operand is referenced using one of the addressing mode that is available for that
machine.

 The format must, implicitly or explicitly, indicate the addressing mode of each operand.

 For most instruction sets, more than one instruction format is used.

 Four common instruction format are there.

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4 Common Instruction Formats

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3 Address Instructions
 Y= (A + B) / (C * D)

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3 Address Instructions
 X = (A + B) * (C + D)

ADD R1, A, B R1 ← M[A] + M[B]

ADD R2, C, D R2 ← M[C] + M[D]
MUL X, R1, R2 M[X] ← R1 x R2

 X = (A + B) * (C + D)

ADD R1, A, B R1 ← A +B
ADD R2, C, D R2 ← C + D
MUL X, R1, R2 M[X] ← R1 x R2

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2 Address Instructions
 Y= (A + B) / (C * D)

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1 Address Instructions
 Y= (A + B) / (C * D)

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0 Address Instructions
 X = (A + B) * (C + D)

LOAD A AC ← A
PUSH A TOS ← A
PUSH B TOS ← B
ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) x (A + B)
POP X M[X] ← TOS

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0 Address Instructions
 X = (A + B) * (C + D)

PUSH A TOS ← A
PUSH B TOS ← B
ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) x (A + B)
POP X M[X] ← TOS

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Instruction Length

 We already discussed.

 In most of the case there is a correlation between memory transfer length and word length of the
machine.

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Instruction Length

Variable-Length Instructions
 Designer may choose to provide a variety of instructions formats of different lengths.
 Hence large collection of opcodes, with different opcode lengths.
 Addressing can be more flexible.
 An increase in the complexity of the CPU.

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Addressing Modes

The most common addressing techniques are

 Immediate
 Direct
 Indirect
 Register
 Register Indirect
 Displacement
 Stack

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Addressing Modes

 All computer architectures provide more than one of these addressing modes.

The question arises as to how the

 Control unit can determine which addressing mode is being used in a particular instruction.
 Several approaches are used.
 Often, different opcodes will use different addressing modes.
 Also, one or more bits in the instruction format can be used as a mode field.
 The value of the mode field determines which addressing mode is to be used.

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Addressing Modes

To explain the addressing modes, we use the following notation

 A = contents of an address field in the instruction that refers to a memory

 R = contents of an address field in the instruction that refers to a register
 EA = actual (effective) address of the location containing the referenced operand
 (X) = contents of location X

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 Addressing Modes
Instruction

Opcode A or R

Memory
EA Operand /(X)

Presentation by: Prof. Anand Motwani, Faculty, SCSE,

VIT Bhopal University 31
 Immediate Addressing
2 The simplest form of addressing is immediate addressing, in which the operand is actually
present in the instruction.
 Operand = A
 Example: MOV R1, #10
 The operand is #10, a constant.
 There is no memory address to fetch this value from.
 The effective address is just the constant 10 itself, because that is the value being used in the
operation.
 This mode can be used to define and use constants or set initial values of variables.
 The advantage of immediate addressing is that no memory reference other than the instruction
fetch is required to obtain the operand.
 The disadvantage is that the size of the number is restricted to the size of the address field, which
is small compared with the world length in most instruction sets.

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Direct Addressing
 A very simple form of addressing is direct addressing, in which the address field contains
the effective address of the operand.
 EA = A
 It requires only one memory reference and no special calculation.

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Indirect Addressing
 With direct addressing, the length of the address field is usually less than the word length, thus
limiting the address range.
 One solution is to have the address field refer to the address of a word in memory, which in turn
contains a full length address of the operand. This is know as indirect addressing.
 EA = (A) = M(A)

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Register Addressing
 Register addressing is similar to direct addressing. The only difference is that the address
field refers to a register rather than a main memory address.
 EA = R
 The advantages of register addressing are that only a small address field is needed in the
instruction and no memory reference is required.
 The disadvantage of register addressing is that the address spaces are very limited.

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Register Indirect Addressing
 Register indirect addressing is similar to indirect addressing, except that the address field refers
to a register instead of a memory location. It requires only one memory reference and no special
calculation.
 EA = (R) = M(R)
 Register indirect addressing uses one less memory reference than indirect addressing. Because,
the first information is available in a register which is nothing but a memory address. From that
memory location, we use to get the data or information. In general, register access is much
more faster than the memory access.

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Displacement Addressing
 A very powerful addressing mode combines the capabilities of direct addressing and register
indirect addressing, which is broadly categorized as displacement addressing.
 EA = A + (R) = A + M(R)
 Displacement addressing requires that the instruction have two address fields, at least one of
which is explicit.
 The value contained in one address field (value = A) is used directly. The other address field, or
an implicit reference based on opcode, refers to a register whose contents are added to A to produce
the effective address.

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Displacement Addressing

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Displacement Addressing
Three of the most common use of displacement addressing are:
Depending upon the use and implementation this addressing scheme may be known as

 Relative addressing
 Base-register addressing
 Indexing

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 Displacement Addressing
1.2 Relative Addressing
 For relative addressing, the implicitly referenced register is the program counter (PC).
 That is, the current instruction address is added to the address field to produce the EA.
 Thus the effective address is a displacement relative to the address of the instruction.

2. Base-Register Addressing
 The reference register contains a memory address, and the address field contains a displacement
from that address.
 The register reference may be explicit or implicit.
 In some implementation, a single segment/base register is employed and is used implicitly.
 In others, the programmer may choose a register to hold the base address of a segment, and the
instruction must reference it explicitly.
 This addressing mode is commonly used in systems where memory is divided into segments
(like in segmentation schemes).
 It is also used in stack operations or in accessing local variables in function calls.

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 Displacement Addressing
3.2 Indexing
 Indexing is a special case of displacement addressing, typically used in array or table
operations.
 Here, the base address points to the starting address of the array (or a similar structure), and the
displacement represents the index multiplied by the size of an element (e.g., for an array of
integers, the displacement would be the index multiplied by the size of an integer).
 This is particularly useful when working with arrays, tables, or vectors, where elements are
stored contiguously in memory.

Example
Let’s say the base address of an array is 1000, and the displacement represents the index of the 4th
element in an array of 4-byte integers.
Displacement = 3 (index) * 4 (size of an integer)
Effective Address = Base Address + Displacement = 1000 + 12 = 1012
This enables efficient access to any element in the array by just modifying the index.

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Displacement Addressing
In general-purpose-register (GPR) machines, the ones we are concerned at most, an addressing
mode that may specify.

 a constant.
 a register.
 a memory location.

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 Addressing Modes
2

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 Addressing Modes
2

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 Addressing Modes
2

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 Addressing Modes
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why so many addressing modes?

 The addressing modes significantly reduce instruction count of programs (keep in mind that
this comes with the increased hardware complexity).

which are the minimum necessary addressing modes?

 The answer depends upon the architecture, for a load-store architecture, register,
immediate, and register transferred are sufficient.
 From this three we can create the equivalent of others addressing modes.

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1. Numerical Problem

 An instruction is stored at location 350 with its address field at location 301. The address field
has the value 400. A processor Register R1 contains the number 200. Evaluate the EA if the
addressing mode of the instruction is:
1. Immediate
2. Direct
3. Register Indirect
4. Relative
5. Index with R1 as the index register.

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 1. Immediate
2

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 2. Direct
2

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 3. Register Indirect
2

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4. Relative

 EA = PC + address part in the instruction

 EA = 302 + 400 = 702

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4. Relative

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5. Index

 EA = R1 + Address part of the instruction.

 EA = 200 + 400 = 600

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2. Numerical Problem

A computer has 32 bit instruction and 12 bit address. If there are 252 address instructions.
 Draw instruction format.
 How many address instructions can be formed?

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Solution

 Instruction is two address instruction format

 Total number of address instructions = 212 = 4096 unique addresses.

 Solution will contain all possible instruction format.

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Instruction Cycle: Fetch

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Instruction Cycle: Fetch

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Instruction Cycle: Fetch

 After completion of 1 fetch cycle,

PC = 0001

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Instruction Cycle: Decode

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Instruction Cycle: Execute

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Instruction Cycle: Execute

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Instruction Cycle: Execute

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Instruction Cycle: Execute

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Instruction Cycle
 Completion of 2nd cycle.

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Instruction Cycle: Execute

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Instruction Cycle: Execute

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Practice some more questions of Addressing modes and effective address.

Describe the working of all phases of Instruction Cycle, i.e., Fetch, Decode, and Execution.

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