lecture 1-Introduction
lecture 1-Introduction
Architecture
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Course Objective
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Grading System
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What is a computer?
Memory
Arithmetic
Input
Instr1 & Logic
Instr2
Instr3
Data1
Output Data2 Control
I/O Processor
Stores
information: Control unit coordinates
Output unit sends various actions
•Instructions,
results of processing: •Input,
•To a monitor display, •Data
•Output
•To a printer •Processing
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Information in a computer -- Instructions
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Information in a computer -- Data
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Input unit
Binary information must be presented to a computer in a specific format. This
task is performed by the input unit:
- Interfaces with input devices.
- Accepts binary information from the input devices.
- Presents this binary information in a format expected by the computer.
- Transfers this information to the memory or processor.
Real world Computer
Memory
Keyboard
Audio input
Input Unit
……
Processor
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Memory unit
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Memory unit (contd..)
Processor reads/writes to/from memory based on the
memory address:
Access any word location in a short and fixed amount of
time based on the address.
Random Access Memory (RAM) provides fixed access time
independent of the location of the word.
Access time is known as “Memory Access Time”.
Memory and processor have to “communicate” with
each other in order to read/write information.
In order to reduce “communication time”, a small amount
of RAM (known as Cache) is tightly coupled with the
processor.
Modern computers have three to four levels of RAM units with
different speeds and sizes:
Fastest, smallest known as Cache
Slowest, largest known as Main memory.
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Memory unit (contd..)
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Output unit
•Computers represent information in a specific binary form. Output units:
- Interface with output devices.
- Accept processed results provided by the computer in specific binary form.
- Convert the information in binary form to a form understood by an
output device.
Memory Printer
Graphics display
Speakers
……
Output Unit
Processor
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Control unit
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How are the functional units connected?
Bus
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Organization of cache and main memory
Main Cache
memory memory Processor
Bus
Why is the access time of the cache memory lesser than the
access time of the main memory?
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Thank you for Listening!
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