CSE0611201

Computer Architecture
Presented by
Chapter 3 Tariq Bin Amir

Top-level view of Computer Lecturer

Function & Interconnection

Department of CSE
Uttara University
 Computer Components
❑ Contemporary computer designs are based on concepts developed by John
von Neumann

 Such design is based on three key concepts:

i. Data and instructions are stored in a single read-write memory
ii. The contents of this memory are addressable by location, without
regard to the type of data contained there
iii. Execution occurs in a sequential fashion (unless explicitly modified)
from one instruction to the next

05/02/2025 2
 Hardware & Software Approaches
❑ Hardware Approach
▪ If there is a particular computation to be performed, a configuration of logic
components designed specifically for that computation could be constructed.
▪ The process of connecting the various components in the desired configuration
as a form of programming
▪ The resulting “program” is in the form of hardware and is termed a hardwired
program

❑ Software Approach
▪ Construct a general-purpose configuration of arithmetic and logic functions. This
set of hardware will perform various functions on data depending on control
signals applied to the hardware
▪ A sequence of codes or instructions
▪ Part of the hardware interprets each instruction and generates control signals
▪ Provide a new sequence of codes for each new program instead of rewiring the
hardware
05/02/2025 3
Hardware & Software Approaches

05/02/2025 4
 Register
 Registers are a type of computer memory used to quickly

accept, store, and transfer data and instructions that are

being used immediately by the CPU.
 A Register is a group of flip-flops with each flip-flop capable

of storing one bit of information. An n-bit register has a

group of n flip-flops and is capable of storing binary
information of n-bits.
 The transfer of new information into a register is referred to

as loading the register.

05/02/2025 5
 Types of Registers
 Accumulator: This is the most common register, used to store data taken
out from the memory.
 General Purpose Registers: This is used to store data intermediate results
during program execution. It can be accessed via assembly programming.
 Special Purpose Registers: Users do not access these registers. These
registers are for computer system.
 MAR: Memory Address Register are those registers that holds the
address for memory unit. When the CPU wants to fetch an instruction or
data, the address is first loaded into MAR before accessing memory.
 MBR: Memory Buffer Register temporarily stores instruction and data
received from the memory and sent from the memory. When reading from
memory, MBR stores the retrieved data before passing it to the CPU. When
writing to memory, MBR holds the data before it is sent to the memory
unit.
 PC: Program Counter points to the next instruction to be executed.
05/02/2025 6
 IR: Instruction Register holds the instruction to be executed.
 Types of Registers

Memory Memory
address buffer
register register
(MAR) (MBR)
• Specifies the • Contains the data
address in to be written into
memory for the memory or
next read or write receives the data
read from
memory

I/O address I/O buffer

register register
(I/OAR) (I/OBR)
• Specifies a • Used for the
particular I/O exchange of data
device between an I/O
module and the
CPU
05/02/2025 7
 Computer Function
 The basic function performed is execution of a program
 Program consists of a set of instructions stored in memory
 The processor does the actual work by executing instructions specified in the
program
 In its simplest form, instruction processing consists of two steps:
 The processor reads (fetches) instructions from memory one at a time
 Executes each instruction.
 Program execution consists of repeating the process of instruction fetch and
instruction execution
 The instruction execution may involve several operations and depends on the
nature of the instruction
 The processing required for a single instruction is called an instruction cycle
05/02/2025 8
 Instruction Cycle
 A program residing in the memory unit of a computer consists of
a sequence of instructions.
 These instructions are executed by the processor by going
through a cycle for each instruction.
 In a basic computer, each instruction cycle consists of the
following phases:
 Fetch instruction from memory
 Decode the instruction
 Read the effective address from memory
 Execute the instruction

05/02/2025 9
 Fetch Cycle
 At the beginning of each instruction cycle the processor fetches an

instruction from memory

 The program counter (PC) holds the address of the instruction to be fetched

next

 The processor increments the PC after each instruction fetch so that it will

fetch the next instruction in sequence

 The fetched instruction is loaded into the instruction register (IR)

 The processor interprets the instruction and performs the required action

05/02/2025 10
 Execute Cycle
• Data transferred • Data transferred
 Processor-memory from processor to or from a
to memory or peripheral
 Data transfer between CPU from memory to device by
and main memory processor transferring
between the
processor and
 Processor I/O Processo an I/O module
Processo
r-
 Data transfer between CPU r-I/O
memory
and I/O module

 Data processing
 Some arithmetic or logical Data
operation on data Control processi
ng
 Control • An instruction • The processor
may specify that may perform
 Alteration of sequence of the sequence of some arithmetic
execution be or logic
operations such as: jump altered operation on
data

05/02/2025 11
 Instruction
 Computer instructions are a set of machine language instructions that a
particular processor understands and executes. A computer performs tasks
on the basis of the instruction provided.

 An instruction comprises of groups called fields. These fields include:

 The Operation code (Opcode) field which specifies the operation to be
performed. The Opcode of an instruction refers to a group of bits that
define arithmetic and logic operations such as add, subtract, multiply,
shift, and compliment.
 The Address field which contains the location of the operand such as:
register or memory location.
 The Mode field which specifies how the operand will be located.

05/02/2025 12
Instruction Cycle State Diagram

05/02/2025 13
 Instruction Cycle State Diagram
 Instruction address calculation (IAC):
 Compute the next instruction’s address by adding a fixed value to the
current address
 Instruction fetch (IF):
 Retrieve the instruction from memory
 Instruction operation decoding (IOD):
 Decode the instruction to determine the operation and operand(s)
 Operand address calculation (OAC):
 Calculate the memory or I/O address for the operand, if needed
 Operand fetch (OF):
 Fetch the operand from memory or I/O
 Data operation (DO):
 Execute the operation specified by the instruction
 Operand store (OS):
 Store the result in memory or send it to I/O

05/02/2025 14
 Interrupt
 Interrupt

 A signal generated by either hardware devices or software components to

interrupt the normal execution of a program and request immediate
attention from the operating system
 Allows to communicate with the OS & notify about specific events or
requests
 When an interrupt occurs, it causes the processor to suspend the current
program execution and transfer control to a specific interrupt handler or
interrupt service routine (ISR)

05/02/2025 15
Classes of Interrupt

05/02/2025 16
Instruction Cycle with Interrupt

05/02/2025 17
Instruction Cycle State Diagram, with Interrupts

05/02/2025 18
 Instruction Cycle State Diagram, with Interrupts
 Instruction address calculation (IAC): Calculates the next
instruction’s address by adding a fixed value to the current address
 Instruction fetch (IF): The processor retrieve the instruction from
memory
 Instruction operation decoding (IOD): Decodes the fetched

instruction to determine the operation and operands

 Operand address calculation (OAC): Determines the address of the
operands needed for the instruction
 Operand fetch (OF): Retrieves the operands from memory or registers
 Data operation (DO): Performs the actual computation or operation
specified by the instruction
 Operand store (OS):: Stores the result of the operation in memory or a
register.
 Interrupt: : If an interrupt is detected, the processor handles it before
resuming the instruction cycle 05/02/2025 19

 Bus Interconnection
 A bus is a communication pathway connection two or more devices
 A shared transmission medium. If two devices transmit during the same
time, their signals will overlap and become garbled
 A bus that connects major computer components (processor, memory, I/O) is
called a system bus

 On any bus the lines can be classified into three functional groups:
 Data bus
 Address bus
 Control bus

05/02/2025 20
Bus Interconnection

Figure: Bus Interconnection Scheme

05/02/2025 21
 Data Bus
 A data bus is a computer subsystem that allows for the transferring of data
from one component to another on a motherboard or between two
computers.

 This can include transferring data to and from the memory, or from the
central processing unit (CPU) to other components.

 The amount of data a data bus can handle is called bandwidth.

 A typical data bus is 64-bits wide. This means that up to 64 bits of data can
travel through a data bus every cycle.

 Nearly every computer contains internal and external data buses.

 The internal data bus, also known as a local bus, connects all components
that are on the motherboard, like the CPU and memory.

 The external data bus connects all peripheral devices to the motherboard.
05/02/2025 22
 Address Bus
 An address bus is a computer bus which is used to address the main
system memory. For example, if the processor wishes to read a word
(8, 16, or 32 bits) of data from memory, it puts the address of the
desired word on the address lines. Clearly, the width of the address
bus determines the maximum possible memory capacity of the
system.

 Most desktop and server motherboards include the address bus in the
memory bus between the memory controller chip and the system
memory.

 The address bus is used by a processor to indicate the memory

location that it is about to read data from or write data to.

 Some processors may also use it to indicate an input/output port that

is about to be read or written.
05/02/2025 23
 Control Bus
 The control lines are used to control the access to and the use
of the data and address lines. Because the data and address lines
are shared by all components, there must be a means of
controlling their use.

 CPU uses control bus to communicate with other devices inside

the machine over a set of physical connections like cables or
printed circuits.

 It is a diverse collection of signals, including read, write, and

interrupt, that allow the CPU to direct and monitor what the 05/02/2025 24
 Control Bus
 The control lines are used to control the access to and the use of the data and
address lines. Control signals transmit both command and timing information.
Typical control lines includes:

05/02/2025 25
 Bus Types
 Dedicated
 Separate data & address lines

 Multiplexed
 Shared lines
 Address valid or data valid control line

 Advantage

• Fewer lines
 Disadvantages

• More complex control

• Affects performance 05/02/2025 26
 Reference Book
 Computer Architecture and Organization by William Stallings-10th
Edition
 Computer Architecture and Organization by John P. Hayes-3rd Edition

Thank You

05/02/2025 27