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8086 Processor

The document provides an overview of computer organization and architecture, focusing on digital computers, their components, and the Intel 8086 microprocessor. It explains the distinction between hardware and software, the importance of understanding computer organization for effective programming, and details the features and working principles of the 8086 microprocessor. Additionally, it covers memory segmentation, register organization, and the architecture of the 8086, including the Bus Interface Unit and Execution Unit.
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0% found this document useful (0 votes)
18 views62 pages

8086 Processor

The document provides an overview of computer organization and architecture, focusing on digital computers, their components, and the Intel 8086 microprocessor. It explains the distinction between hardware and software, the importance of understanding computer organization for effective programming, and details the features and working principles of the 8086 microprocessor. Additionally, it covers memory segmentation, register organization, and the architecture of the 8086, including the Bus Interface Unit and Execution Unit.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Computer

Organization and
Architecture
Digital Computers
It is a digital system that performs various
computational tasks.
First electronic digital computers introduced in
the year 1940’s
were primarily used for the numerical
computations.
Digital computer uses the binary number system,
which has two digits, 0 & 1.
A Binary digit is called a bit.
In computers, information is represented in ‘Group
9/9/202 PRESENTATION 2
4 of bits’. TITLE
Computer
A System:
computer system is subdivided into 2 functional
units:
1.Hardware: Consists of electronic components
and electromechanical devices that comprise the
physical entity of the system.
2.Software: Consists of instructions and data
that the computer manipulates to perform various
data processing tasks.
Program: It is a sequence of instructions for the
computer
9/9/202 PRESENTATION 3
4 TITLE
System Software:
Consists of collection of programs whose purpose is
to make more effective use of computer.
The programs included in the system software are
referred to as operating system.
The system software is an indispensable part of a
computer.
Application Software is a software that performs
specific tasks for an end-user.

9/9/202 PRESENTATION 4
4 TITLE
WHY STUDY COMPUTER
ORGANIZATION?
It gives an insight of how a computer executes
programs internally and can help programmer to
write more effective programs.
For system programmers, a good knowledge of
Computer Organization is essential because they
need to program the bare hardware without the
support of an operating system.

9/9/202 PRESENTATION 5
4 TITLE
Relation between Computer
Architecture, Organization, System
program and Application program

9/9/202 PRESENTATION 6
4 TITLE
Computer Architecture:
It gives the external view of the computer. It is
concerned with the structure and behavior of the
computer.
An Assembly level programmer needs to be
aware of Specific Instruction supported by the
processor, the instruction formats, the specific
registers, and their roles, the way to perform
input or output data.

9/9/202 PRESENTATION 7
4 TITLE
Computer Organization:
CO is concerned with the way the hardware
components operate and the way they are
connected to form the computer system.
The various components are assumed to be in
place and the task is to investigate the
organizational structure to verify that computer
parts operate as intended.
CO gives an internal view of a computer and the
roles that internal components play during
execution of a program.
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4 TITLE
Block Diagram of a Digital
Computer:

9/9/202 PRESENTATION 9
4 TITLE
INTEL
8086
8086 Microprocessor
Intel 8086 microprocessor is the enhanced version of
Intel 8085 microprocessor.
It was designed by Intel in 1976.
The 8086 microprocessor is a16-bit, N-channel,
HMOS microprocessor.

9/9/2024 PRESENTATION 11
TITLE
Features of 8086
Microprocessor:
• It is a 16-bit Microprocessor introduced by INTEL in
the year 1978. It requires +5V DC power supply.
• 8086 has a 20-bit address bus can access up to 220
memory locations (1 MB).
• Address ranges from 00000H to FFFFFH
• The 8086 can generate 16-bit I/O address; hence it
can access 2^16 = 65536(64K)
• I/O ports.
• It has 16-bit data bus, so it can read data from or write
data to memory and ports either 16 bits or 8 bits at a
time
9/9/2024 PRESENTATION 12
TITLE
Features of 8086
Microprocessor:
• The 8086 has multiplexed address and data
bus which reduced the number of pins needed
(AD0-AD15)
• It is available in 40 pin Dual In line
Package(DIP).
• It consists of 29,000 HMOS transistors.
• It has 6 bytes Queue It provides 14, 16-bit
registers.
• Clock frequency ranges from 5MHz to 10 MHz
9/9/2024 PRESENTATION 13
TITLE
Features of 8086
Microprocessor:
• It uses two stages of pipelining, i.e. Fetch Stage and
Execute Stage, which improves performance.
•8086 is designed to operate in two
modes Minimum Mode
•The minimum mode is selected by applying logic 1
to the MN/MX input pin • This is a single
microprocessor configuration.
Maximum Mode
•The maximum mode is selected by applying logic 0
to the MN/MX input pin • This is a multi
microprocessor configuration.
9/9/2024 PRESENTATION 14
TITLE
Components of
Microprocessor

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TITLE
Working
Principle of
Microprocessor
The microprocessor follows a sequence to
:
execute the instruction:
1. Fetch
2. Decode
3. Execute

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TITLE
Memory Segmentation
• Segmentation is the process of dividing.
•The available memory space is divided into
"chunks" called segments. Such a memory is known
as segmented memory and each segment has its
own base address.
•It is basically used to enhance the speed of
execution, so that the processor is able to fetch and
execute the data from the memory easily and fast.

9/9/2024 PRESENTATION 17
TITLE
Memory Segmentation in
8086:

9/9/2024 PRESENTATION 18
TITLE
Memory segments
1. Code segment: It holds the instruction codes of a
program.
2. Data segment: It holds the data, variables and
constants given in the program
3. Extra segment: It also holds the data of
certain string instructions.
4. Stack segment: It is used as a stack and it is used
to store the return address. It holds addresses and
data of subroutines.

9/9/2024 PRESENTATION 19
TITLE
Offset Address:
To address a specific memory location within a
segment we need an offset address.
The offset address is also 16-bit wide and it is
provided by one of the associated pointer or index
register

9/9/2024 PRESENTATION 20
TITLE
Pointers and index registers
contain offset address:
Stack Pointer and Base Pointer:
SP (Stack Pointer) : This is the 16-bit register. It
points to the program stack in stack segment.
BP (Base Pointer) : BP is also the 16-bit register. It
points to data in stack segment.
Source index: It is of 16 bits, It is used to point the
memory locations in the data segment for source
data.
Destination index: It is of 16 bits It is used to point
the memory locations in the data segment for
9/9/2024
destination data. PRESENTATION
TITLE
21
Calculating Physical
Address:
How can a 20-bit address be obtained, if there are
only 16-bit registers? Address Adder:
The BIU contains a dedicated adder which is used to
generate the 20bit physical address.
This address is formed by adding an 16 bit segment
address and a 16 bit offset address.

9/9/2024 PRESENTATION 22
TITLE
Architecture of 8086
Microprocessor:

9/9/2024 PRESENTATION 23
TITLE
1. The Bus Interface Unit
(BIU):
• It generates the 20 bit physical address for
memory access.
• It fetches instructions from the memory.
• It transfers data to and from the memory and I/O.
• Maintains the 6 byte prefetch instruction queue
(supports
pipelining).

9/9/2024 PRESENTATION 24
TITLE
BIU mainly
contains
• 4 segment
registers
• 6-byte pre-fetch
queue
• Address Generation
Unit
• Instruction Pointer

9/9/2024 PRESENTATION 25
TITLE
Address Generation
Unit:
•The physical address of the instruction is
achieved by combining the segment address
with that of the offset address.

9/9/2024 PRESENTATION 26
TITLE
6-byte pre-fetch queue
• This queue is used in 8086 in order to perform
pipelining.
•As at the time of decoding and execution of the
instruction in EU, the BIU fetches the sequential
upcoming instructions and stores it in this queue.
•The size of this queue is 6-byte. This means at
maximum a 6-byte instruction can be stored in this
queue.
• The queue exhibits FIFO behavior, first in first out.

9/9/2024 PRESENTATION 27
TITLE
Instruction
Pointer:
The Instruction Pointer is a register that holds the
address of the next instruction to be fetched from
memory.

9/9/2024 PRESENTATION 28
TITLE
4 Segment Registers
1. Code Segment Register: It is a 16-bit register
and holds the address of the instruction or
program stored in the code segment of the
memory.
2. Stack segment register: The Stack segment
register is usually used to store information about
memory segment. It handles memory to store
data and addresses during execution.

9/9/2024 PRESENTATION 29
TITLE
4 Segment Registers
3.Data segment register: It holds the address of
the data segment. The data segment stores the
data in the memory whose address is present in
this 16-bit register.
4.Extra segment register: Here the starting
address of the extra segment is present. This
register basically contains the address of the string
data.

9/9/2024 PRESENTATION 30
TITLE
9/9/2024 PRESENTATION 31
TITLE
2. The Execution Unit
(EU):
1. EU contains Control Unit, ALU, Pointer and Index
register, Flag register, General Purpose Register,
Operands
2. EU: Fetches instructions from the Queue in BIU,
decodes and executes arithmetic and logic
operations using the ALU.
3. Sends control signals for internal data transfer
operations within the microprocessor

9/9/2024 PRESENTATION 32
TITLE
9/9/2024 PRESENTATION 33
TITLE
Control Unit:
It’s directs the operation of the processor.
It also signals the ALU to perform the desired
operation ALU:
It handles all arithmetic and logical operations, like
+, −, ×, /, OR, AND, NOT operations.

9/9/2024 PRESENTATION 34
TITLE
Register Organization:
A register is a very small amount of fast
memory that is built in the CPU (or Processor) in
order to speed up the operation.
Register is very fast and efficient than the other
memories like RAM, ROM, external memory etc,.
The 8086 microprocessor has a total of fourteen
registers that are accessible to the programmer.

9/9/2024 PRESENTATION 35
TITLE
9/9/2024 PRESENTATION 36
TITLE
General purpose
registers:
There are 8 general purpose registers, i.e., AH, AL,
BH, BL, CH, CL, DH, and DL.
AX register
This is the accumulator.
It is of 16 bits and is divided into two 8-bit registers
AH and AL to also perform 8-bit instructions.
It is used to stores the 16-bit/8 bit result of certain
ALU operations. BX register This is the base register.
It is of 16 bits and is divided into two 8-bit registers
BH and BL to also perform 8-bit instructions. It is
used to store the starting base address of the
memory area within the data segment.
9/9/2024 PRESENTATION 37
TITLE
General purpose
registers:
BX register
This is the base register. It is of 16 bits and is divided
into two 8-bit registers BH and BL to also perform 8-
bit instructions.
It is used to store the starting base address of the
memory area within the data segment.
CX register
This is the counter register.
It is of 16 bits and is divided into two 8-bit registers
CH and CL to also perform 8-bit instructions.
It is referred to as counter. Used to hold the count
9/9/2024value in SHIFT, ROTATE and LOOP instructions.
PRESENTATION 38
TITLE
General purpose registers:
DX register
This is the data register.
It is of 16 bits and is divided into two 8-bit registers
DH and DL to also perform 8-bit instructions.

9/9/2024 PRESENTATION 39
TITLE
Pointer and Index Registers:
SP (Stack Pointer):
is the 16-bit register. It points to the program stack in
stack segment. SP is used during instructions like
PUSH, POP, CALL, RET etc.
BP (Base Pointer) :
BP is also the 16-bit register. It points to data in
stack segment. BP can hold offset address of any
location in the stack segment. It is used to access
random locations of the stack.

9/9/2024 PRESENTATION 40
TITLE
Pointer and Index Registers:
Source index:
It holds offset address in Data Segment
during string operations
Destination index:
It is of 16 bits It holds offset address in Extra
Segment during string operations This register is
used to hold I/O port address for I/O instruction

9/9/2024 PRESENTATION 41
TITLE
Flag Register:
Flag register holds the status of the result
generated by the ALU.
The 8086 microprocessor has a 16 bit register for flag
register. In this register 9 bits are active for flags.
In that 9 flags, they are divided into 2 groups
– Conditional Flags and Control Flags

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TITLE
Flag Register:

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TITLE
6 Status Control
flags:
1. carry flag(CF) flags:
1. trap flag(TF)
2. parity flag(PF) 2. interrupt flag(IF)
3. auxiliary carry 3. direction flag(DF)
flag(AF)
4. zero flag(Z) Operand: It is a temporary
5. sign flag(S) register and is used by the
processor to hold the
6. overflow flag (O) temporary values at the time
Status flags are of operation.
updated after every
arithmetic and logic
operation.
9/9/2024 PRESENTATION 44
TITLE
Programming
Model:
The programming model of the 8086
considered to be program visible because its
registers are used during application
programming and are specified by the
instructions.
•Other registers, are considered to be program
invisible because they are not addressable directly
during applications programming,
• But may be used indirectly during system
programming.
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TITLE
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TITLE
Logical and Physical
Address
Addresses within a segment can range from address
00000h to address 0FFFFh. This corresponds to the
64K-bytelength of the segment. An address within a
segment is called an offset or logical address.

9/9/2024 PRESENTATION 47
TITLE
9/9/2024 PRESENTATION 48
TITLE
Addressing modes
of 8086
The 8086 microprocessors have 8 addressing
modes.
Two addressing modes have been provided for
instructions which operate on register or
immediate data.
These two addressing modes are:
Register Addressing: In register addressing, the
operand is placed in one of the 16-bit or 8-bit
general purpose registers.
Immediate Addressing: In immediate
addressing, the operand is specified in the
9/9/2024 instruction itself. PRESENTATION
TITLE
49
Addressing modes of 8086
The remaining 6 addressing modes specify the
location of an operand which is placed in a memory.
Direct Addressing: In direct addressing mode, the
operands offset is given in the instruction as an 8-
bit or 16-bit displacement element.
Register Indirect Addressing: The operand's offset is
placed in any one of the registers BX, BP, SI or DI as
specified in the instruction.

9/9/2024 PRESENTATION 50
TITLE
Addressing modes of 8086
Based Addressing: The operand's offset is the sum of
an 8-bit or 16-bit displacement and the contents of
the base register BX or BP. BX is used as base
register for data segment, and the BP is used as a
base register for stack segment.
Indexed Addressing: The offset of an operand is the
sum of the content of an index register SI or DI and an
8-bit or 16-bit displacement.
Offset (Effective Address) = [SI or DI + 8-bit
or 16-bit displacement]
9/9/2024 PRESENTATION 51
TITLE
Addressing modes
of 8086
Based Indexed Addressing: The offset of operand is
the sum of the content of a base register BX or BP
and an index register SI or DI.
Effective Address (Offset) = [BX or BP] + [SI or DI]
Here, BX is used for a base register for data segment,
and BP is used as a base register for stack segment.
Based Indexed with Displacement: In this mode of
addressing, the operand's offset is given by:
Effective Address (Offset) = [BX or BP] + [SI or DI]
+ 8-bit or 16-bit displacement

9/9/2024 PRESENTATION 52
TITLE
9/9/2024 PRESENTATION 53
TITLE
Instruction Set of 8086:
The sequence of commands used to tell a
microcomputer what to do is called a program,
Each command in a program is called an
instruction
The entire group of instructions that a
microprocessor supports is called Instruction
Set.
8086 has more than 20,000 instructions.

9/9/2024 PRESENTATION 54
TITLE
Classification of
Instruction Set:
1. Data Transfer Instructions
2. Arithmetic instructions
3. Bit Manipulation Instructions
4. Program Execution Transfer
Instructions
5. String Instructions
6. Processor Control Instructions

9/9/2024 PRESENTATION 55
TITLE
Data Transfer Instructions: These instructions
are used to transfer data from source to
destination. The operand can be a constant,
memory location, register or I/O port address.
Instructions to transfer a word.
Data Transfer
Instructions: MOV
PUSH
POP
PUSH
A
POPA
XCHG
9/9/2024
XLAT PRESENTATION
TITLE
56
Arithmetic Instructions: This instructions
are use to perform the arithmetic
operations like +,-
,*,/,etc. Instructions to perform addition
Arithmetic
AD Instructions:
DAA
D DAS
AD NEG
C CMP
SU MUL
B IMUL
SB
B
INC
9/9/2024 PRESENTATION 57
TITLE
Bit Manipulation Instructions:
These instructions are used at the bit level
i.e. operations like logic &shift etc These
instructions can be used for: Testing a zero
bit Set or reset a bit Shift bits across
registers

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TITLE
Program Execution Transfer Instructions:
These instructions cause change in the
sequence of the execution of instruction.
This change can be through a condition or
sometimes unconditional. The conditions
are represented by flags.
Program Execution Transfer
Instructions: CALL
RE
T
JMP
Jxx
Loo
9/9/2024 p PRESENTATION
TITLE
59
9/9/2024 PRESENTATION 60
TITLE
String Instructions: String in assembly language
is just a sequentially stored bytes or words.
There are very strong set of string instructions in
8086. By using these string instructions, the size
of the program is considerably reduced.
String
Instructions:
CMPS
SCAS
MOV
S
REP
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TITLE
Processor Control Instructions:
These instructions control the processor
itself.8086 allows to control certain control
flags that: Causes the processing in a certain
direction processor synchronization if more
than one microprocessor attached.
ST
C
CL
C
CM
C
9/9/2024 PRESENTATION 62
TITLE

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