ASSIGNMENTS

 Chapter 1: Introduction (4hr) Fixed and floating point representation

4
1. Logic gates and Boolean algebra Chapter 3: Common digital components (6hr)

2
1. Integrated circuit
2. Combinational circuit

3
2. Decoder, multiplexer and registers
3. Flip flops

1
3. Binary counter
4. Sequential circuit
4. Memory units
 Chapter 2: Number system and codes (4hr)

1. Data types
5
2. Complements

Henry Hexmoor B.
By Haftom 05/01/2025 1
CHAPTER FOUR
2
REGISTER TRANSFER AND MICROOPERATIONS

By Haftom B. 05/01/2025
CONTENTS
 Register Transfer

 Bus and Memory Transfers

 Arithmetic Microoperations

 Logic Microoperations

 Shift Microoperations

 Arithmetic Logic Shift Unit

SIMPLE DIGITAL SYSTEMS

 Combinational and sequential circuits can be used to create simple

digital systems.
 These are the low-level building blocks of a digital computer.
 Simple digital systems are frequently characterized in terms of
 the registers they contain, and
 the operations that they perform.
 Typically,
 What operations are performed on the data in the registers
 What information is passed between registers
 Register Transfer Language

MICROOPERATIONS (1)

 The operations on the data in registers are called

microoperations.
 The functions built into registers are examples of
microoperations
Shift
Load
Clear
Increment
…
 Register Transfer Language

MICROOPERATION (2)
• An elementary operation performed (during one clock pulse), on the
information stored in one or more registers.

Registers ALU 1 clock cycle

(R) (f)

R  f(R, R)

f: shift, load, clear, increment, add, subtract, complement,

and, or, xor, …
 Register Transfer Language

ORGANIZATION OF A DIGITAL SYSTEM

Definition of the (internal) organization of a computer

• Set of registers and their functions
• Microoperations set : Set of allowable microoperations
provided by the organization of the computer
• Control signals that initiate the sequence of
microoperations (to perform the functions)
 Register Transfer Language

REGISTER TRANSFER LEVEL(RTL)

 Viewing a computer, or any digital system, in this way is
called the register transfer level
 RTL is used to describe CPU organization in high-level form.
 This is because we’re focusing on
 The system’s registers
 The data transformations in them, and
 The data transfers between them.
 Register Transfer Language

REGISTER TRANSFER LANGUAGE

 Rather than specifying a digital system in words, a specific notation

is used, register transfer language
 For any function of the computer, the register transfer language can
be used to describe the (sequence of) microoperations
 RTL is used to express how the computer works
 Register transfer language
 A symbolic language not executed by computer
 A convenient tool for describing the internal organization of
digital computers
 Can also be used to facilitate the design process of digital
systems.
 Register Transfer Language

DESIGNATION OF REGISTERS

 Registers are designated by capital letters, sometimes followed by

numbers (e.g., A, R13, IR)
 Often the names indicate function:
 MAR - memory address register
 PC - program counter
 IR - instruction register
 Registers and their contents can be viewed and represented in
various ways
MAR
 A register can be viewed as a single entity:

 Registers may also be represented showing the bits of data they

contain.
 Register Transfer Language

DESIGNATION OF REGISTERS
• Designation of a register
- a register
- portion of a register
- a bit of a register
• Common ways of drawing the block diagram of a register
•The clock is not included as a variable in RTL

Register Showing individual bits

R1 7 6 5 4 3 2 1 0
15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields
 Register Transfer

REGISTER TRANSFER
 Copying the contents of one register to another is a register
transfer
 A register transfer is indicated as
R2  R1
 In this case the contents of register R1 are copied (loaded) into
register R2
 A simultaneous transfer of all bits from the source R1 to the
destination register R2, during one clock pulse
 Note that this is a non-destructive; i.e. the contents of R1 are
not altered by copying (loading) them to R2
 Register Transfer

REGISTER TRANSFER
 A register transfer such as
R3  R5
Implies that the digital system has
 the data lines from the source register (R5) to the destination
register (R3)
 Parallel load in the destination register (R3)
 Control lines to perform the action
 Register Transfer

CONTROL FUNCTIONS
 Often actions need to only occur if a certain condition is true
 This is similar to an “if” statement in a programming language
 In digital systems, this is often done via a control signal, called a
control function
 If the signal is 1, the action takes place
 This is represented as:
P: R2  R1
Which means “if P = 1, then load the contents of register R1 into
register R2”, i.e., if (P = 1) then (R2  R1)
 Register Transfer

HARDWARE IMPLEMENTATION OF
CONTROLLED TRANSFERS
Implementation of controlled transfer
P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

Timing diagram t t+1

Clock

Load
Transfer occurs here

• The same clock controls the circuits that generate the control
function and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
 Register Transfer

SIMULTANEOUS OPERATIONS
 If two or more operations are to occur simultaneously, they
are separated with commas

P: R3  R5, MAR  IR
 Here, if the control function P = 1, load the contents of R5
into R3, and at the same time (clock), load the contents of
register IR into register MAR
 Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Examples

Capital letters Denotes a register MAR,
R2
& numerals
Parentheses () Denotes a part of a register R2(0-7), R2(L)
Arrow  Denotes transfer of information R2  R1
Colon : Denotes termination of control function P:
Comma , Separates two micro-operations A  B, B 
A
 Register Transfer

CONNECTING REGISTRS
 In a digital system with many registers, it is impractical to have data
and control lines to directly allow each register to be loaded with the
contents of every possible other registers
 To completely connect n registers  n(n-1) lines
 O(n2) cost
 This is not a realistic approach to use in a large digital system
 Instead, take a different approach
 Have one centralized set of circuits for data transfer – the bus
 Have control circuits to select which register is the source, and which
is the destination
 Bus and Memory Transfers

BUS AND BUS TRANSFER

• Bus is a path(of a group of wires) over which information is transferred,
from any of several sources to any of several destinations.
From a register to bus: BUS  R

Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX MUX MUX MUX

x
select
y

4-line bus
 Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D 0 D1 D2 D 3
z E (enable)
Select 2x4
w
Decoder

Three-State Bus Buffers

Normal input A Output Y=A if C=1
High-impedence if C=0
Control input C

Bus line with three-state buffers

Bus line for bit 0
A0
B0
C0
D0

S0 0
Select 1
S1 2
Enable 3
 Bus and Memory Transfers

BUS TRANSFER IN RTL

 Depending on whether the bus is to be mentioned explicitly or
not, register transfer can be indicated as either
R2 R1

or BUS R1, R2  BUS

 In the former case the bus is implicit, but in the latter, it is

explicitly indicated
MEMORY (RAM) Bus and Memory Transfers

 Memory (RAM) can be thought as a sequential circuits

containing some number of registers
 These registers hold the words of memory
 Each of the r registers is indicated by an address
 These addresses range from 0 to r-1
 Each register (word) can hold n bits of data
 Assume the RAM contains r = 2k words. data input lines

 It needs the following n

 n data input lines address lines

k
RAM
 n data output lines Read
unit
Write
 k address lines
n
 A Read control line data output lines
 A Write control line
 Bus and Memory Transfers
MEMORY TRANSFER
 Collectively, the memory is viewed at the register level as a device, M.
 Since it contains multiple locations, we must specify which address in
memory we will be using
 This is done by indexing memory references
 Memory is usually accessed in computer systems by putting the
desired address in a special register, the Memory Address Register
(MAR, or AR)
 When memory is accessed, the contents of the MAR get sent to the
memory unit’s address lines
M
Read
Memory
AR
unit Write

Data out Data in

 Bus and Memory Transfers

MEMORY READ
 To read a value from a location in memory and load it into a
register, the register transfer language notation looks like this:

R1  M[MAR]
 This causes the following to occur
 The contents of the MAR get sent to the memory address
lines
 A Read (= 1) gets sent to the memory unit
 The contents of the specified address are put on the
memory’s output data lines
 These get sent over the bus to be loaded into register R1
 Bus and Memory Transfers

MEMORY WRITE
 To write a value from a register to a location in memory looks like
this in register transfer language:
M[MAR]  R1

 This causes the following to occur

 The contents of the MAR get sent to the memory address lines
 A Write (= 1) gets sent to the memory unit
 The values in register R1 get sent over the bus to the data input
lines of the memory
 The values get loaded into the specified address in the memory
 Bus and Memory Transfers

SUMMARY OF R. TRANSFER MICROOPERATIONS

A B Transfer content of reg. B into reg. A

AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
ABUS  R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR
 Arithmetic Microoperations

MICROOPERATIONS
• Computer system microoperations are of four types:

1. Register transfer microoperations Already Discussed

2. Arithmetic microoperations
3. Logic microoperations
4. Shift microoperations
 Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS
 The basic arithmetic microoperations are
 Addition
 Subtraction
 Increment
 Decrement
 The additional arithmetic microoperations are
 Add with carry
 Subtract with borrow
 Transfer/Load
 etc. …
 SUMMARY OF TYPICAL ARITHMETIC MICRO-OPERATIONS

 R3  R1 + R2 Contents of R1 plus R2 transferred to R3

 R3  R1 - R2 Contents of R1 minus R2 transferred to R3
 R2  R2’ Complement the contents of R2
 R2  R2’+ 1 2's complement the contents of R2
(negate)
 R3  R1 + R2’+ 1 subtraction
 R1  R1 + 1 Increment
 R1  R1 - 1 Decrement

Henry Hexmoor
By Haftom B. 05/01/2025 29
 Arithmetic Microoperations

BINARY ADDER / SUBTRACTOR / INCREMENTER

B3 A3 B2 A2 B1 A1 B0 A0

Binary Adder C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

Binary Incrementer A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
 Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0
A0 X0 C0
S1 D0
S0 FA
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
S1 FA D1
S0
B1 0 4x1 Y1 C2
1 MUX
2
3
A2 X2 C2
S1 FA D2
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
S0 FA
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A
 Logic Microoperations
LOGIC MICROOPERATIONS
 Specify binary operations on the strings of bits in registers
 Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
 useful for bit manipulations on binary data
 useful for making logical decisions based on the bit value
 There are, in principle, 16 different logic functions that can be defined over
two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
 However, most systems only implement four of these 0 1 0 0 0 … 1 1 1
 AND (), OR (), XOR (), Complement/NOT 1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1
 The others can be created from combination of these
 Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary vars.
n
- n binary vars → 2 2 functions

• Truth tables for 16 functions of 2 variables and the corresponding 16 logic micro-
operations x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
 Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC

MICROOPERATIONS
Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S 0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement
 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

 Logic microoperations can be used to manipulate individual bits

or a portions of a word in a register
 Consider the data in a register A. In another register, B, is bit
data that will be used to modify the contents of A
 Selective-set AA+B
 Selective-complement AAB
 Selective-clear A  A • B’
 Mask (Delete) AA•B
 Clear AAB
 Insert A  (A • B) + C
 Etc.…..
 Logic Microoperations

SELECTIVE SET

 In a selective set operation, the bit pattern in B is used

to set certain bits in A
1100 At
1010 B
1110 At+1 (A  A + B)

 If a bit in B is set to 1, that same position in A gets set

to 1, otherwise that bit in A keeps its previous value
 Logic Microoperations

SELECTIVE COMPLEMENT

 In a selective complement operation, the bit pattern in B is used to

complement certain bits in A
1100 At
1010 B
0110 At+1 (A  A  B)
 If a bit in B is set to 1, that same position in A gets complemented
from its original value, otherwise it is unchanged
 Logic Microoperations

SELECTIVE CLEAR

 In a selective clear operation, the bit pattern in B is used to clear

certain bits in A

1100 At
1010 B
0100 At+1 (A  A  B’)

 If a bit in B is set to 1, that same position in A gets set to 0, otherwise it

is unchanged
 Logic Microoperations

MASK OPERATION

 In a mask operation, the bit pattern in B is used to clear certain bits

in A
1100 At
1010 B
1000 At+1 (A  A  B)

 If a bit in B is set to 0, that same position in A gets set to 0, otherwise

it is unchanged
 Logic Microoperations

CLEAR OPERATION

 In a clear operation, if the bits in the same position in A

and B are the same, they are cleared in A, otherwise they
are set in A

1100 At
1010 B
0110 At+1 (A  A  B)
 Logic Microoperations

INSERT OPERATION
 An insert operation is used to introduce a specific bit pattern into A
register, leaving the other bit positions unchanged
 This is done as
1. A mask operation to clear the desired bit positions, followed by
2. An OR operation to introduce the new bits into the desired positions
 Example
 Suppose you wanted to introduce 1010 into the low order four bits of A:
 1101 1000 1011 0001 A (Original)
 1101 1000 1011 1010 A (Desired)

 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits
1101 1000 1011 1010 A (Desired)
 Shift Microoperations

LOGICAL SHIFT
 In a logical shift the serial input to the shift is a 0.
 A right logical shift operation:
0

 A left logical shift operation:

0

 In a Register Transfer Language, the following notation is used

 shl for a logical shift left
 shr for a logical shift right
 Examples:
 R2  shr R2
 R3  shl R3
 Shift Microoperations

CIRCULAR SHIFT
 In a circular shift the serial input is the bit that is shifted
out of the other end of the register.
 A right circular shift operation:

 A left circular shift operation:

 In a RTL, the following notation is used

 cil for a circular shift left
 cir for a circular shift right
 Examples:
 R2  cir R2
 R3  cil R3
LOGICAL VERSUS
ARITHMETIC SHIFT
 A logical shift fills the newly created bit
position with zero:
0
CF

• An arithmetic shift fills the newly created bit position with

a copy of the number’s sign bit:

CF
 Shift Microoperations

ARITHMETIC SHIFT
 An left arithmetic shift operation must be checked for the
overflow 0
sign
bit

V Before the shift, if the leftmost two bits differ,

the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
 Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

0 for shift right (down)

Serial Select
input (IR) 1 for shift left (up)

S
MUX H0
0
1
A0

A1 S
MUX H1
0
A2 1

A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)
 Shift Microoperations

ARITHMETIC LOGIC SHIFT UNIT

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi
Ai
Circuit
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with
borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A
into F
1 1 X X X F = shl A Shift left A into
F
 APPLICATION OF SHIFT
 Bitwise Multiplication: SHL can perform multiplication
by powers of 2.
o Shifting any operand left by n bits multiplies the operand
by 2n.
o For example, shifting the integer 5 left by 1 bit yields the
product
o of 5 x 21 = 10:
mov dl,5 dl= 00000101
shl dl,1 dl=00001010
o Exercise what will be the value of the Dl=5 in decimal after SHl by
3 is performed
o mov dl,5 dl= 00000101
Henry Hexmoor shl dl,3
By Haftom B. dl=_______________ 05/01/2025 48
 CONT..
o Bitwise Division: Logically shifting an unsigned integer
right by n bits divides the operand by 2n.
 In the following statements, we divide 32 by 2 1, producing 16:
mov dl,32 ; dl=100000
shr dl,1 ; dl=010000 cf=0
 Exercise , write an assembly program that divide 32 by 2 3
using SHR:
mov dl,32 ; dl=______________
shr dl,3 ; dl=______________ cf=______
Henry Hexmoor
By Haftom B. 05/01/2025 49
 THE END THANKS

?
Henry Hexmoor
By Haftom B. 05/01/2025 50