FIRMW
FIRMW
Firmware
• Agenda
– Firmware & Bootloader
– General Process of a firmware
– ARM Firmware Suite
– Redboot (Redhat)
– Sandstone (Sloss)
10.1 Firmware and Bootloader
Definitions
A minimal system
A Real Case: Sandstone
• Implementation
– It is specific to the ARM Evaluator-7T platform.
– This example shows you How a simple platform
be set.
10.2.1 Directory layout of
Sandstone
– OBJS = sand.o
– all : ${OBJS}
– armlink -o ../image/sand.elf ${OBJS}
– fromelf -bin -o ../image/rom.bin
../image/sand.elf
– sand.o : ../src/sand.s
– armasm -o $@ $<
10.2.2 Sandstone Code
Structure
– sandstone_init1
– LDR r3, =SYSCFG
– LDR r4, =0x03FFFFA0 ; b[31:16]=base,
[15:0]=cfg
» ; Disable both the “cache” and “write-
buffer”
– STR r4, [r3]
– ……...
– B sandstone_memorycode
• Note
– SYSTEM is a self-reference register. Its default
address is 0x3ff00000 (arch-dependent).
10.2.2.3 Remap Memory
• As you see,
– when the platform is powered up, only ROM is
assigned a location in the memory map.
– The two SRAM bank (0 and 1) are not available.
• We should
– bring in the two SRAM banks, and
– remap the ROM to a new location
Remap the ROM, and Setup
SRAM
– LDR lr, =sandstone_init2
– LDR r4, =0x1800000
– ADD lr,lr,r4 ; calculate the absolute address
– ADRL r0, memorymaptable_str ; get address of table
– LDMIA r0, {r1-r12}
– LDR r0, =EXTDBWTH ; =(SYSCFG + 0x3010)
– STMIA r0, {r1-r12} ; setup DBus Width
– MOV pc, lr ; JUMP to remapped memory
(*)
– memorymaptable_str
– DCD rEXTDBWTH ; ROM0(Half), ROM1(Word), ROM1(Word), rest Disabled
– DCD rROMCON0 ; 0x1800000 ~ 0x1880000, RCS0, 4Mbit, 4cycle, ROM
– DCD rROMCON1 ; 0x0000000 ~ 0x0040000, RCS1, 256KB, 2cycle,
SRAM1
– DCD rROMCON2 ; 0x0040000 ~ 0x0080000, RCS2, 256KB, 2cycle,
SRAM2
– sandstone_init2
– B sandstone_serialcode
– sandstone_serialcode
– // UART Control: Clearing
– LDR r1, =UART0_BASE
– ADD r1, r1,#UCON
– MOV r2, #0
– STR r2, [r1]
– ADRL r0,sandstone_banner
– print_loop
– print_wait
– LDR r3,=UART0_BASE
– ADD r3,r3,#USTAT
– LDR r4,[r3]
– MOV r5, #USRTxHoldEmpty
– AND r4,r4,r5
– CMP r4,#0
– BEQ print_wait
–
UART (4) Printing char
– LDR r3,=UART0_BASE
– ADD r3,r3,#UTXBUF
– STR r1,[r3]
– LDRB r1,[r0]
– ADD r0,r0,#1
– CMP r1,#0
– BNE print_loop
– B sandstone_load_and_boot
– sandstone_banner
– DCB "\n\r*\n\r"
– DCB "\n\rSandstone Firmware (0.01)\n\r"
– DCB "- platform ......... e7t\n\r"
– DCB "- status ........... alive\n\r"
– DCB "- memory ........... remapped\n\r"
– DCB "\n\r+ booting payload ...",0
10.2.2.5 Bootloader
Copy Payload and Relinquish Control
– ALIGN 4
– sandstone_load_and_boot