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Lecture 3

The document outlines the instruction cycle of a CPU, which consists of three main stages: fetch, decode, and execute. It explains the role of various registers such as the Program Counter (PC), Memory Address Register (MAR), Memory Buffer Register (MBR), and Instruction Register (IR) in facilitating these stages. Additionally, it describes the continuous operation of the CPU during instruction execution and the components involved in each stage of the cycle.

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solimanmarwan121
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2 views

Lecture 3

The document outlines the instruction cycle of a CPU, which consists of three main stages: fetch, decode, and execute. It explains the role of various registers such as the Program Counter (PC), Memory Address Register (MAR), Memory Buffer Register (MBR), and Instruction Register (IR) in facilitating these stages. Additionally, it describes the continuous operation of the CPU during instruction execution and the components involved in each stage of the cycle.

Uploaded by

solimanmarwan121
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Lecture 3

Computer Architecture
&Organization

prepared by
Ibrahim Shawky Farahat
Instruction Cycle
 An instruction cycle, also known as a fetch-decode-
execute cycle, is the basic operation performed by a
central processing unit (CPU) to execute an instruction.

 It is the time in which a single instruction is fetched


from memory, decoded, and executed

 It Consist of three steps:


 Fetch
 Decode
 Execute
Fetch Cycle

 In this cycle a next instruction is loaded (read) from


memory into the processor

 Program Counter (PC) holds address of next


instruction to fetch

 Processor fetches instruction from memory location


pointed to by PC

 Increment PC to hold the next instruction

 Instruction loaded into Instruction Register (IR)


Decode Cycle

 In decode cycle, the CPU interprets the


instruction and determines what operation
needs to be performed

 The instruction is divided into two main


parts: operation code (opcode ) and operand.

 Then, The decoder in the control unit works


out what the instruction means – what has to
be done to the data.
Execute Cycle
 In the execute cycle, the CPU performs the
operation specified by the instruction.

 There are many operation that can CPU done


 Processor-memory
 data transfer between CPU and main memory
 Processor I/O
 Data transfer between CPU and I/O module
 Data processing
 Some arithmetic or logical operation on data
 Control
 Combination of above
Registers
 Set of registers (storage in CPU)
 General purpose register
 Register that used for any purpose

 Specific purpose register


 Register that used for specific purpose
 Memory Buffer Register (MBR)
 Memory Address Register (MAR)
 Instruction Register (IR)
 Program Counter (PC)
 Accumulator (AC)
Registers
 Program counter (PC) Contains the address
of the next instruction-pair to be fetched
from memory.


Memory Buffer Register (MBR) (also known as
memory data register (MDR)) is the register in a
computer's processor that stores the data being
transferred to and from the immediate access storage.

 Memory Address Register (MAR) is the


CPU register that either stores the memory address
from which data will be fetched to the CPU, or the
address to which data will be sent and stored.
Registers
 Accumulator (AC) is a register that holds the
results of ALU operations

 Current instruction register (CIR) or Instruction


Register IR is a register (exist in control unit )
that holds the instruction currently being
executed or decoded.
Describe the stages of the fetch-decode-execute cycle, stating the
components involved and their functions in the cycle.
9
 This process happens continuously whilst the computer is on and uses a number of
registers:
 PC "Program Counter".

 MAR "Memory Address Register".

 MDR "Memory Data Register".

 CIR "Current Instruction Register".

 It also uses the two main units in the CPU; the control unit and the arithmetic logic
unit.

 During the fetch phase the next instruction address is copied from the PC into the
MAR which then fetches the instruction at that location using the address bus.
 The instruction is held in the MDR register and duplicated into the CIR register.
 The PC then increments by one.

 During the decode stage, the instruction in the CIR is decoded using decoder.

 Finally, the instruction is carried out in the execute stage


Example of Program Execution
Example of Program Execution

MAR= MAR=
300 940
Example of Program Execution

MAR=
301 MAR=
941
Example of Program Execution

MAR= MAR=
302 941
Questions

 How many operations can be done in this


computer?
 Answer:

 How many words in the memory?


 Answer:
+
Questions

 Mention the stages of the instruction cycle?

 Describe the stages of the fetch-decode-execute cycle,


stating the components involved and their functions in the
cycle.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


New Mansoura University
Faculty of Computer Science
and Engineering

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