Chapter 3

Assembly level machine organization

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Basic organization of the von Neumann machine
• John von Neumann, a Hungarian-American mathematician and physicist, first
proposed the von Neumann architecture in the mid-20th century.

• He is also considered a founder of computer science, along with Alan Turing.

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Computer Organization | Von Neumann architecture
• Von-Neumann computer architecture design was proposed in 1945.
• It was later known as Von-Neumann architecture.
• Historically there have been 2 types of Computers:
1. Fixed Program Computers – Their function is very specific and they
couldn’t be reprogrammed, e.g. Calculators.
2. Stored Program Computers – These can be programmed to carry out
many different tasks, applications are stored on them, hence the name.
Modern computers are based on a stored-program concept introduced by
John Von Neumann. In this stored-program concept, programs and data are
stored in the same memory.
This novel idea meant that a computer built with this architecture would be
much easier to reprogram. 3
• The basic structure is like this

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• It is also known as ISA (Instruction set architecture) computer and is
having three basic units:
1. The Central Processing Unit (CPU)
2. The Main Memory Unit
3. The Input/output Device
• 1. Central Processing Unit: The central processing unit is defined
as it is an electric circuit used for the executing the instruction of
computer program.
• It has following major components:
• 1.1 Control Unit(CU)
• 1.2 Arithmetic and Logic Unit(ALU)
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• Control Unit –
A control unit (CU) handles all processor control signals. It directs all
input and output flow, fetches code for instructions, and controls how data
moves around the system.

• The control unit (CU) in a CPU directs the operation of the processor,
interpreting instructions, coordinating the execution of operations, and
managing the flow of data between the CPU, memory, and peripheral devices.

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• The CU fetches instructions from memory and decodes them, determining the
sequence of operations needed to execute them.

• Data flow control: It directs the flow of data between the CPU, memory, and
other components, ensuring that data is moved to the correct locations at the
right time.

• Coordination of Operations: The CU ensures that different parts of the CPU,

like the Arithmetic Logic Unit (ALU), work together in a coordinated way to
execute instructions correctly.

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• Control Signals: It generates control signals to manage the operations of the
CPU, such as telling the ALU what operation to perform or when to read data
from memory.

• Program Counter management: The CU uses a program counter (PC) to

keep track of the address of the next instruction to be executed.

• Interfacing with Input/Output: The CU also manages the interaction

between the CPU and input/output devices, allowing the computer to interact
with the outside world.

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• Arithmetic and Logic Unit (ALU) –
The arithmetic logic unit is that part of the CPU that handles all the
calculations the CPU may need, e.g. Addition, Subtraction, Comparisons.

• It performs Logical Operations, Bit Shifting Operations, and Arithmetic

operations.

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• Registers – Registers refer to high-speed storage areas in the CPU.

• The data processed by the CPU are fetched from the registers.

• There are different types of registers used in architecture :-

1. Accumulator: Stores the results of calculations made by ALU. It holds the intermediate
of arithmetic and logical operations. it acts as a temporary storage location or device.

2. Program Counter (PC): Keeps track of the memory location of the next instructions to
be dealt with. The PC then passes this next address to the Memory Address Register
(MAR).

3. Memory Address Register (MAR): It stores the memory locations of instructions that
need to be fetched from memory or stored in memory.
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4. Memory Data Register (MDR): It stores instructions fetched from
memory or any data that is to be transferred to, and stored in, memory.

5. Current Instruction Register (CIR): It stores the most recently fetched

instructions while it is waiting to be coded and executed.

6. Instruction Buffer Register (IBR): The instruction that is not to be

executed immediately is placed in the instruction buffer register IBR.

7. Instruction Register(IR) : Holds the last instruction fetched.

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• Buses – Data is transmitted from one part of a computer to another,
connecting all major internal components to the CPU and memory, by
the means of Buses. Types:
1. Data Bus: It carries data among the memory unit, the I/O devices,
and the processor.
2. Address Bus: It carries the address of data (not the actual data)
between memory and processor.
3. Control Bus: It carries control commands from the CPU (and
status signals from other devices) in order to control and
coordinate all the activities within the computer.

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• Input/output Devices – Program or data is read into main memory
from the input device or secondary storage under the control of
CPU input instruction.

• Output devices- are used to output information from a computer.

• If some results are evaluated by the computer and it is stored in the

computer, then with the help of output devices, we can present them
to the user.

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Instruction set and types(data manipulation, control, I/O)

• A computer instruction is a binary code that controls how a

computer performs micro-operations in a series.

• Every computer has its own set of instructions.

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Instruction sets
• A set of codes that can only be understood by a processor of the computer or CPU .

• These codes and machine languages are generally present as 1s and 0s.

• The movements of bits and bytes are controlled by these instruction sets present in the
processor.

Some common examples of instruction sets are:

1. JUMP – jump instruction set is used to jump to any designated address of RAM.

2. ADD – add instruction set is used to add any two numbers together.

3. LOAD – load instruction set is used to load any required information from the RAM to the
CPU.
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• Types of instruction set

• 1. Reduced instruction set computer (RISC)

• RISC has only a few cycles per instruction.

• It has a simpler form than a complex set of instructions.

• RISC is also used in many supercomputers.

• For example, it uses a summit, which is a supercomputer.

• It was the world’s fastest supercomputer as per data in 2018.

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2. Minimal instruction set computers (MISC)

• A few codes and a set of instructions are basic for any processor.

• They also include sub-codes. As a result, they are smaller and faster.

• A disadvantage of MISC is that it has more sequential dependencies.

3. Complex instruction set computer (CISC)

• CISC is a set of instructions with a few instructions per program.

• A CISC has fewer instructions than RISC.

4. Explicitly parallel instruction computing (EPIC)

• This is an instruction set that permits microprocessors that help to execute instructions in
parallel software. EPIC intends to give a simpler performance. 18
5. Very long instruction word (VLIW)

• VLIW exploits parallelism at the instruction level. By this set of instructions, instructions are
processed in sequence only in the CPU.

• This set of instructions improves the performance of the CPU.

• 6. Zero instruction set computer (ZISC)

• The instructions that do not include microinstructions are known as ZISC. They are based on
the pattern matching and can be compared to networks of synapses and neurons.

7. One instruction set computer (OISC)

• The OISC set of instructions uses only one instruction for a machine language.

• This set of instructions is used to teach computer architecture and to compute structural
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computing research.
• Instruction sets category based on their function, including.

• data manipulation, control, and I/O:

1. Data manipulation

• These instructions perform arithmetic, logic, and shift operations.

• Some examples of data manipulation instructions include:

I. arithmetic instructions,

II. logical and bit manipulation instructions,

III. and shift instructions.

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• Arithmetic instruction

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• logical and bit manipulation instructions

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• Typical Shift Instructions

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2. Data movement (I/O)

• These instructions transfer data among processor registers and

input/output devices.

• For example, a load instruction transfers data from memory to a

processor register, while a store instruction transfers data from a
processor register to memory.

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3. Program flow control
• These instructions provide decision making capabilities and change the path taken by the

program when executed.

• Sequential Execution: By default, a program executes instructions in the order they appear in

memory.

• Control Flow Instructions: These instructions alter the normal sequential flow, allowing the

program to jump to different parts of the code based on conditions or events.

• Program Counter (PC): The PC holds the memory address of the next instruction to be

executed.

• Control flow instructions modify the PC, causing the program to jump to a different address
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• Common Control Flow Instructions:

• Jumps (Unconditional):

• These instructions force the program to jump to a specific address, regardless

of any conditions.

• Conditional Jumps: These instructions check a condition (e.g., a flag,

register value) and jump to a different address only if the condition is met.

• Calls (Subroutine Calls): These instructions save the current PC (return

address) and jump to a subroutine (a block of code that performs a specific
task).
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• Returns: These instructions restore the PC to the return address, allowing the
program to resume execution after the subroutine is finished.

• Interrupts: These are special events that can cause the program to jump to a
dedicated interrupt handler, allowing the system to respond to external
events.

• Loops: These instructions allow a block of code to be executed repeatedly

until a certain condition is met.

• Stack Operations: Instructions that manipulate the stack, which is used for
storing return addresses, function arguments, and other temporary data.
• Machine Control Instructions: Instructions that control the execution of the
processor, such as halting, starting, or setting flags. 30
Control unit; instruction fetch, decode, and execution

• In computer organization, an instruction cycle, also known as a

fetch-decode-execute cycle

• It is the basic operation performed by a central processing unit

(CPU) to execute an instruction.

• The instruction cycle consists of several steps, each of which

performs a specific function in the execution of the instruction.

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1. Fetch: In the fetch cycle, the CPU retrieves the instruction from memory. The
instruction is typically stored at the address specified by the program counter
(PC). The PC is then incremented to point to the next instruction in memory.

2. Decode: In the decode cycle, the CPU interprets the instruction and determines
what operation needs to be performed. This involves identifying the opcode and
any operands that are needed to execute the instruction.

3. Execute: In the execute cycle, the CPU performs the operation specified by the
instruction. This may involve reading or writing data from or to memory,
performing arithmetic or logic operations on data, or manipulating the control
flow of the program. 32
• These cycles are the basic building blocks of the CPU’s operation
and are performed for every instruction executed by the CPU.

• By optimizing these cycles, CPU designers can improve the

performance and efficiency of the CPU, allowing it to execute
instructions faster and more efficiently.

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The Instruction Cycle

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• The Indirect Cycle is always followed by the Execute Cycle.
The Interrupt Cycle is always followed by the Fetch Cycle. For both
fetch and execute cycles, the next cycle depends on the state of the
system.

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Assembly/machine language programming
• What is Assembly Language?

• It is a low-level language that allows users to write a program using

alphanumeric mnemonic codes, instead of numeric code for a set of instructions
examples of large assembly language programs from this time are IBM PC DOS.

• Assembly-level language is a low-level language that is understandable by

machines whereas High-level language is human-understandable language.

• Examples: x86, ARM Assembly, MIPS Assembly

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 What is High-Level Language?

What is High-Level Language?

• It is a machine-independent language. It enables a user to write a

program in a language that resembles English words and familiar
mathematical symbols, COBOL was the first high-level language.

• Examples of high-level language are python, c#, Java, C++, etc.

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 Instruction formats
• In computer architecture, an instruction format defines the layout and structure of a machine-
level instruction.

• It specifies how bits are grouped to indicate the operation to be performed, the location of
operands (data), and how to access them.

• Essentially, it's a blueprint for the CPU to interpret and execute a given instruction.

• Key Components of an Instruction Format:

• Opcode (Operation Code): This field indicates the specific operation the CPU should
perform, such as add, subtract, load, or store.

• Operands: These fields specify the data or memory locations the operation will act
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upon. Operands can be register addresses, memory addresses, or literal data values.
• Addressing Modes: These fields define how operands are accessed.

• Examples include direct addressing, indirect addressing, and register

addressing.

• The instruction format directly influences how the CPU fetches, decodes, and
executes instructions, making it a vital concept in computer organization.

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• Types of Instruction Formats.
• Based on the number of address fields used in the instruction, instruction formats
are classified into zero, one, two, and three-address formats.

• Each has distinct characteristics and uses in different types of instruction formats
in computer architecture.

• 1. Zero-Address Instructions

• It operates without specifying any operands explicitly. Typically used in stack-

based architectures, these instructions rely on the stack to store operands.

• The operations are performed on the top of the stack, and the results are also
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stored on the stack.
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• 2. One-Address Instructions
• It specifies a single operand, typically held in an accumulator.
• The accumulator is an implicit register used in the operation.
• The result can either be stored in the accumulator or another location.

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• 3. Two-Address Instructions
• It allows for two operands to be specified.
• These operands can be registers or memory locations.
• The result can overwrite one of the source operands or can be stored in a
separate location

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• 4. Three-Address Instructions

• It specifies three operands contains two source operands and one destination
operand.

• This format allows for more complex operations and direct representation of
expressions.

• It is most commonly used in high-level language compilers and optimizers.

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Advantages of Instruction Formats in Computer Organization

• Here are the advantages of Instruction formats in computer organization:

• Allows predictable and efficient processing of instructions.

• Easier hardware design with consistent instruction structure.

• Reduces overhead and optimizes memory management.

• Simple structure speeds up instruction decoding.

• Simplifies code generation for better performance.

• Ensures software portability across systems.

• Accommodates a wide range of instructions

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Disadvantages of Instruction Formats in Computer Organization

• Here are the disadvantages of instruction formats in computer organization:

• Balancing flexibility and efficiency can be difficult.

• Fixed format may restrict available instructions.

• Padding or unused bits reduces memory efficiency.

• Complex formats can slow down decoding.

• More complex formats may reduce speed.

• May not scale with new technologies.

• More bits can waste memory and bandwidth

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Addressing Modes

• In computer architecture, addressing modes define the methods by

which instructions specify the operand or data location to be
accessed during program execution.

• Addressing modes determine how the CPU retrieves data from

memory or registers, performs calculations, and stores results

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• Here are common addressing modes found in computer architectures:

1. Immediate Addressing:

The operand value is directly encoded within the instruction itself.

• Example: MOV R1, #10 (Move immediate value 10 into register R1).

2. Register Addressing:

- The instruction specifies one or more register operands.

- Example: ADD R1, R2 (Add the contents of register R2 to register R1).

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3. Direct Addressing:
• The memory address of the operand is directly provided in the
instruction.
Example: LOAD R1, 0x1000 (Load the value at memory address
0x1000 into register R1).
4. Indirect Addressing:
- The instruction encodes a memory address that points to the actual
operand.
- Example: LOAD R1, (R2) (Load the value from the memory
address stored in register R2 into register R1).

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5. Indexed Addressing:
• - An indexed register and an offset are used to calculate the memory
address of the operand.
• - Example: LOAD R1, (R2 + 10) (Load the value at the memory address
obtained by adding the contents of R2 and 10 into register R1).
6. Base Register Addressing:
• - An address is calculated by adding a base register value and an offset.
• - Example: LOAD R1, (R2 + offset) (Load the value at the memory address
obtained by adding the contents of R2 and the offset value into register R1).
7. Auto increment and Auto decrement Addressing:
• - The memory address is automatically incremented or decremented after
the operation.
• - Example: LOAD R1, (R2)+ (Load the value at the memory address stored in
R2 into R1 and increment the value in R2). 54
Subroutine call and return mechanism

• Subroutine call and return mechanisms allow a program to execute a block of

code (a subroutine) and then resume execution at the point it was called from.

• This is achieved by storing the return address (the instruction following the
call) on a stack, jumping to the subroutine's entry point, and then, after the
subroutine completes, popping the return address from the stack to resume
execution.

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• Here's a more detailed explanation:

• 1.Call: When a subroutine is called, the current instruction pointer (or program counter) is
stored on a stack.

• This pointer indicates the address of the next instruction to be executed after the subroutine
completes.

• The program then jumps to the subroutine's entry point, where the subroutine's code begins.

• 2.Subroutine Execution: It may receive arguments, process data, and potentially return a
value.

• The subroutine may also modify the values of registers or other memory locations, but it
should generally return them to their original state before returning to the caller. 56
• 3. Return: When the subroutine completes its task, it executes a RETURN
instruction (or a similar instruction).

• The return instruction pops the saved return address from the stack.

• The program counter is then set to the retrieved return address, causing
execution to resume at the instruction immediately following the CALL
instruction.

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• Von Neumann bottleneck
Whatever we do to enhance performance, we cannot get away from the fact that
instructions can only be done one at a time and can only be carried out
sequentially.

• Both of these factors hold back the competence of the CPU.

• This is commonly referred to as the ‘Von Neumann bottleneck’.

• We can provide a Von Neumann processor with more cache, more RAM, or
faster components This architecture is very important and is used in our PCs
and even in Super Computers.
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