Module 1
Module 1
Embedded system
General Purpose Computing System Embedded System
Performance is the key deciding factor in the selection Application-specific requirements (like performance,
of the system. Always, ‘Faster is Better’ power requirements, memory usage, etc.) are the key
deciding factors
Less/not at all tailored towards reduced operating Highly tailored to take advantage of the power saving
power requirements, options for different levels of modes supported by the hardware and the operating
power management. system
Response requirements are not time-critical For certain category of embedded systems like mission
critical systems, the response time requirement is
highly critical
Need not be deterministic in execution behaviour Execution behaviour is deterministic for certain types
of embedded systems like ‘Hard Real Time’ systems
• The term RISC stands for Reduced Instruction Set Computing. As the
name implies, all RISC processors/controllers possess lesser number
of instructions typically in the range of 30 to 40.
• CISC stands for Complex Instruction Set Computing. From the
definition itself it is clear that the instruction set is complex and
instructions are high in number.
• From a programmers point of view RISC processors are comfortable
since s/he needs to learn only a few instructions, whereas for a CISC
processor s/he needs to learn more number of instructions and
should understand the context of usage of each instruction.
Programmable Logic Devices (PLDs):
• A complex programmable logic device (CPLD) is a programmable logic device with complexity between
that of PALs and FPGAs, and architectural features of both.
• CPLDs, by contrast, offer much smaller amounts of logic - up to about 10,000 gates.
• CPLDs offer very predictable timing characteristics and are therefore ideal for critical control
applications.
• CPLDs such as the Xilinx Cool Runner series also require extremely low amounts of power and are very
inexpensive, making them ideal for cost-sensitive, battery-operated, portable applications such as
mobile phones and digital handheld assistants.
ADVANTAGES OF PLDs:
• Bipolar: A bipolar stepper motor contains single winding per phase. For
reversing the motor rotation the current flow through the windings is reversed
dynamically. It requires complex circuitry for current flow reversal
• Full Step In the full step mode both the phases are energised
simultaneously. The coils A, B, C and D are energised in the following
order:
• Wave Step:In the wave step mode only one phase is energised at a
time and each coils of the phase is energised alternatively. The coils A,
B, C, and D are energised in the following order:
Half Step It uses the combination of wave and full step. It has the
highest torque and stability. The coil energising sequence for half step is
given below.
5. The I/O Subsystem – I/O Devices – Relay:
• An electro mechanical device which acts as dynamic path selectors for signals and power.
• The „Relay‟ unit contains a relay coil made up of insulated wire on a metal core and a metal armature
with one or more contacts.
• Relay‟ works on electromagnetic principle.
• When a voltage is applied to the relay coil, current flows through the coil, which in turn generates a
magnetic field.
• The magnetic field attracts the armature core and moves the contact point.
• The movement of the contact point changes the power/signal flow path.
• The Relay is normally controlled using a relay driver circuit connected to the port pin of the
processor/controller.
• A transistor can be used as the relay driver. The transistor can be selected depending on the relay
driving current requirements.
6. The I/O Subsystem – I/O Devices -Piezo Buzzer:
• A Piezo buzzer contains a piezoelectric diaphragm which produces audible sound in response to the voltage applied to
it.
• Piezoelectric buzzers are available in two types 1.Self-driving 2.External driving
• Self-driving contains are the necessary components to generate sound at a predefined tone.
• External driving piezo Buzzers supports the generation of different tones.
• The tone can be varied by applying a variable pulse train to the piezoelectric buzzer.
• A Piezo Buzzer can be directly interfaced to the port pin of the processor/Controller.
The I/O Subsystem – I/O Devices – Push button switch:
The switch is normally in the open state and it makes a circuit contact when it is pushed or pressed in the „Push to
Make‟ configuration.
In the „Push to Break‟ configuration, the switch is normally in the closed state and it breaks the
circuit contact when it is pushed or pressed
The push button stays in the „closed‟ (For Push to Make type) or „open‟ (For Push to Break type) state as long as it
is kept in the pushed state and it breaks/makes the circuit connection when it is released.
Push button is used for generating a momentary pulse
Keyboard:
• Keyboard is an input device for user interfacing. If the number of keys
required is very limited, push button switches can be used and they
can be directly interfaced to the port pins for reading.
• However, there may be situations demanding a large number of keys
for user input (e.g. PDA device with alpha-numeric keypad for user
data entry).
• Matrix keyboard is an optimum solution for handling large key
requirements. It greatly reduces the number of interface connections.
• The 16 keys are arranged in a 4 column × 4 Row matrix. Figure 2.24
illustrates the connection of keys in a matrix keyboard.
• In a matrix keyboard, the keys are arranged in matrix fashion (i.e. they
are connected in a row and column style). For detecting a key press, the
keyboard uses the scanning technique, where each row of the matrix is
pulled low and the columns are read.
• This process is repeated until the scanning for all rows are completed.
When a row is pulled low and if a key connected to the row is pressed,
reading the column to which the key is connected will give logic 0.
• The software key de-bouncing technique doesn’t require any additional
hardware and is easy to implement. In the software de-bouncing
technique, on detecting a key-press, the key is read again after a de-
bounce delay.
• If the key press is a genuine one, the state of the key will remain as
‘pressed’ on the second read also.
• Pull-up resistors are connected to the column lines to limit the current
that flows to the Row line on a key press.
• Programmable Peripheral Interface ( PPI):
• Programmable Peripheral Interface (PPI) devices are used for extending
the I/O capabilities of processors/controllers. Most of the
processors/controllers provide very limited number of I/O and data
ports and at times it may require more number of I/O ports than the
one supported by the controller/processor. A programmable peripheral
interface device expands the I/O capabilities of the processor/controller.
• 8255A is a popular PPI device for 8bit processors/controllers.
• 8255A supports 24 I/O pins and these I/O pins can be grouped as either
three 8-bit parallel ports (Port A,Port B and Port C) or two 8bit parallel
ports (Port A and Port B) with Port C in any one of the following confi
gurations:
(1) As 8 individual I/O pins
(2) Two 4bit ports namely Port CUPPER (CU) and Port CLOWER (CL)