Course Code: EEE 324

Course Title: Digital

Electronics Circuit
Units: 3
Lecturer: Dr. A.S.
Oluwole
 PRODUCT-OF-
The SUMS (POS)
product-of-sums (POS) format of a Boolean
expression is much like the SOP format with its two
levels of logic (not counting inverters). The
difference is that the outputs of multiple OR gates
are combined with a single AND gate which outputs
the final result. The expression below adheres to the
format of a POS expression. An expression is said to
be in product-of-sums form when all sums are the
sums of only single variables
.
This form is a logic expression normally
used in a logic circuit design. Product-
of-sums (POS) form, consists of two or
more OR terms (sums) that are ANDed
together. Each OR term contains one
or more variables in complemented or
uncomplemented form. Here are some
product-of-sum expressions.
 (A++C)(A+C)
(A+)(+D)F
(A+C)(B+)(+C)(A++)
These three equations are in
POS form.
In this example, the sum (OR) of A, B, and C is inverted
thereby adding a third level of logic: A, B, and C are OR'ed
together then inverted and then OR'ed with D before going
to the AND gate. Getting this expression to adhere to the
proper POS format where the NOT is distributed to the
individual terms is not as easy as it was with the SOP. Often
times it is easier to determine the truth table for the
function and then convert that truth table to the correct
POS format. This will be shown in a later section in this
chapter. As far as hardware is concerned, POS expressions
take the output of OR gates and connect them to the inputs
of a single AND gate. The sample circuit shown in Figure 6-5
CONVERTING POS TO TRUTH TABLE
Converting a POS expression to a truth table
follows a similar process as the one used to
convert an SOP expression to a truth table. The
difference is this: where the SOP conversion
focuses on rows with a one output, the POS
conversion focuses on rows with a zero output. We
do this because the OR gate has an output of zero
on exactly one row while all of the other rows
If we invert one of the inputs, this moves
the row with the zero output to another
position. There is still only one row
outputting a zero. The row with the zero
output is the row where all of the inputs
equal zero. If one of the inputs is inverted,
then its non-inverted value must be one
for the OR gate to output a zero. Figure 6-6
shows a few examples of this behavior.
Therefore, to convert a POS expression to a
truth table, examine each of the sums to
determine where the sum is equal to zero.
When that sum is equal to a zero, a zero will
also be present at the final output of the circuit.
When a sum does not contain all of the circuit's
inputs, then more than one row will get a zero
output from the OR gate. Every time an input
drops out of a sum, the number of rows with a
zero output from that OR gate is doubled.
For example, if a POS expression uses as its inputs A,
B, C, and D, then a sum within that expression that
uses only B, C, and D as inputs will have two rows with
zero outputs and a sum using only A and C as inputs
will have four rows with zero outputs. The output of
the first sum is equal to zero only when all of the
inputs, A, B and the inverse of D, are equal to zero.
This occurs in two places, once for C=0 and once for
C=1. Therefore, the output of a product-of-sums
circuit with this OR expression in it will have a zero in
the rows where A=0, B=0, C=0, and D=1 and where
The next sum uses only B and C from the four
inputs. Therefore, there must be four rows with
outputs of zero. This is because A and D have no
effect on this sum and can have any of the four
states: A=0 and D=0; A=0 and D=1; A=1 and D=0;
or A=1 and D=1. A single variable sum as shown
in the last column of the truth table in Figure 6-
8 will force zeros to be output for half of the
input conditions. In the case of this truth table,
the inverse of A equals zero when A equals 1.
 APPLICATIONS OF
BOOLEAN ALGEBRA
MINTERM AND
MAXTERM
EXPANSIONS
MINTERM AND MAXTERM
EXPANSIONS
 SIMPLIFICATION OF
LOGIC EXPRESSIONS
USING KARNAUGH
MAPS
With the introduction of SOP and POS functions in
the previous lecture, we learned how to convert a
truth table to a Boolean expression, and if necessary,
a digital circuit. Recall that in the SOP form of a
Boolean expression, each row with an output of one
corresponded to a product. The OR of all of the
products produced an expression that satisfied the
truth table, but not necessarily one that was
reduced to its simplest form. For example, the truth
table below has four rows, each of which
corresponds to a one output.
The intersection of each row and column corresponds to a
unique set of input values. For example, the left column of
the Karnaugh map in Figure 7-1 represents the outputs
when the input B equals zero and the right column
represents the outputs when the input B equals one. The
top row represents the outputs when A equals zero and
the bottom row represents the outputs when A equals
one. Therefore, the left, top cell corresponds to A=0 and
B=0, the right, top cell corresponds to A=0 and B=1, and so
on. Figure 7-2 shows how the rows of a two-input truth
table map to the cells of the Karnaugh map. The variables
labelled Sn in the figure represent the binary output values.
The purpose of Karnaugh maps is to rearrange
truth tables so that adjacent cells can be
represented with a single product using the
simplification described above where OR'ing
anything with its inverse equals one. This requires
adjacent cells to differ by exactly one of their input
values thereby identifying the input that will drop
out. When four rows or columns are needed as
with a 3- or 4-input Karnaugh map, the 2-bit Gray
code must be used to ensure that only one input
differs between neighbouring cells.
Take for example the three-input Karnaugh map
shown in Figure 7-3. The four rows are each
identified with one of the potential values for A
and B. This requires them to be numbered 00-
01-11-10 in order to have only one input change
from row to row.
If we were to use the normal convention for binary
counting to number the four rows, they would be
numbered 00-01-10-11. In this case, moving from
the second to the third row would result in A
changing from 0 to 1 and B changing from 1 to 0.
This means two inputs would change with a vertical
movement between two cells and we would lose the
simplification benefit we get using Karnaugh maps.
Figure 7-4 shows a four-input Karnaugh map. Notice
that the Gray code had to be used for both the rows
and the columns.
Note that mapping the outputs from a larger truth table
to a Karnaugh map is no different than it was for the two-
by-two map except that there are more cells. We are
limited to four input variables when it comes to using
Karnaugh maps on paper. Remember that the purpose of
a Karnaugh map is to rearrange the truth table so that
adjacent cells can be combined allowing for a term to
drop out. In other words, the key to the effectiveness of a
Karnaugh map is that each cell represents the output for a
specific pattern of ones and zeros at the input, and that to
move to an adjacent cell, one and only one of those
inputs can change.
Take for instance the Karnaugh map in Figure 7-
4. The cell in the third column of the second row
represents the condition where A=0, B=1, C=1,
and D=1. Moving to the cell immediately to the
left will change only C; moving right will change
D; moving up changes B; and moving down
changes A. Therefore, there is an adjacent cell
that represents a change in any of the four input
variables.
If we were to add a fifth variable, not only would we
need to double the number of cells in our map, we
would also need to make sure that there were five
directions to move adjacently out of every cell in the
map. This is impossible to do and remain in two
dimensions. A second layer of sixteen cells would
have to be added on top of the four-input Karnaugh
map to give us a fifth direction, i.e., perpendicular to
the page. Although this can be done with a
computer, we will not be addressing maps with
more than four input variables here.