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Unit 3fundamnetal Concept & Processor Organization

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0% found this document useful (0 votes)
9 views51 pages

Unit 3fundamnetal Concept & Processor Organization

Uploaded by

terepapakamaal
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 51

Fundamental Concepts and Processor

Organization

1
Single Bus CPU Organization

Fig:refer from Carl Hamacher.. page 413 2


Register Transfer

3
Introduction to register
Register

• A very fast computer memory, used to store data/ instruction in execution

• is a group of flip flops, each flip flop capable of storing one bit of
information

• n bit register has a n group of of flip flops capable of storing n bit of


information of n bits

• Registers used by CPU are termed as processor registers, it may hold


instruction , storage address or data.

• Computer needs processor registers to manipulate data and a register for


holding storage address
4
Common Used Registers
• Accumulator: Most common register , used to store data taken out from the
memory.

• General Purpose Register: Store data immediate results during program execution.

• Special General Purpose Registers: These registers are for computer system

* MAR: Holds the address of memory

* MBR: Stores instructions and data received and sent from the memory

* PC: Points to the next instructions to be executed.

* IR: Holds the instruction to be executed 5


Register Transfer
The availability of hardware logic circuits that can perform a stated micro
operation and transfers the result of the operation to the same or another
register.

6
Register and Memory Configuration of basic
Computer

7
Basic symbols used for Register transfer

8
Register Transfers
Internal processor
b us

• The input and output gates for


R i in

R i register Ri are controlled by signals


isRin and Riout .
R i out

Y in

• Rin Is set to1 – data available on


Y
common bus are loaded into Ri.
Constant 4

Select MUX

• Riout Is set to1 – the contents of


A

ALU
B
register are placed on the bus.
Z in

Z
• Riout Is set to 0 – the bus can be used
for transferring data from other
Z out
registers .
Fig.:Input and output gating for the registers

Fig:refer from Carl Hamacher page 416

9
10
Performing an Arithmetic or Logic Operation
• ALU gets the two operands from MUX and bus. The result is temporarily
stored in register Z.

• First operand is always send to Register Y and Second is directly send to


point B of ALU

• What is the sequence of operations to add the contents of register R2 to


those of R3 and store the result in R4?

1. R2out, Yin

2. R3out, SelectY, Add, Zin

3. Zout, R4in
11
Step 1: Output of the register R1 and input of the register Y are enabled, causing the
contents of R1 to be transferred to Y.

Step 2: The multiplexer’s select signal is set to select Y causing the multiplexer to
gate the contents of register Y to input A of the ALU.

Step 3: The contents of Z are transferred to the destination register R3.

12
Fetching a Word from Memory
• Address into MAR; issue Read operation; data into MDR.

13
Fetching a Word from Memory
• The response time of each memory access varies (cache miss, memory-mapped
I/O,…).

• To accommodate this, the processor waits until it receives an indication that the
requested operation has been completed (Memory-Function-Completed, MFC).

• Move (R1), R2
⮚MAR ← [R1]
⮚Start a Read operation on the memory bus
⮚Wait for the MFC response from the memory
⮚Load MDR from the memory bus
⮚R2 ← [MDR]

Signals activated are


R1out,MARin,Read
MDRinE,WMFC
MDRout, R2in 14
Storing a word in memory
• Address is loaded into MAR

• Data to be written loaded into MDR.

• Write command is issued.

• Example:Move R2,(R1)

R1out,MARin

R2out,MDRin,Write

MDRoutE, WMFC 15
Execution of a complete Instruction
To execute an instruction, the processor has to perform the following steps:
• Fetch the contents of the memory location pointed to by the PC. The
contents of this location is the instruction to be executed; hence they are
loaded into the IR. (Fetch phase)
IR ← [[PC]]
• Increment the PC to point to the next instruction. Assuming that the
memory is byte addressable, the PC is incremented by 4. (Fetch phase)
PC ← [PC] + 4
• Carry out the operation specified by the instruction in the IR.(Execution
phase)

16
Execution of a complete Instruction
• Consider the instruction Add (R3), R1 This adds the contents of a memory
location pointed to by R3 to register R1.

• Executing this instruction requires the following actions


1. Fetch the instruction
2. Fetch the first operand (the contents of the memory location
pointed to by R3)
3. Perform the addition
4. Load the result into R1
17
Control sequence for execution of the instruction
Add (R3),R1.
Step Action
1.PCout , MARin , Read, Select4,Add, Zin
2.Zout , PCin , Yin , WMFC
3.MDRout , IR in
4.R3out , MARin , Read
5.R1out , Yin , WMFC
6.MDRout , SelectY, Add, Zin
7.Zout ,R1n ,End
18
Micro-operations
• The microoperations most often encountered in digital computers
are classified into four categories:

1. Register transfer microoperations


2. Arithmetic microoperations (on numeric data stored in the
registers)
3. Logic microoperations (bit manipulations on non-numeric
data)
4. Shift microoperations 19
Logic Micro-operations

20
Logic Micro-operations

21
Logic Micro-operations

22
Logic Micro-operations

23
Logic Micro-operations

24
Logic Microoperations Hardware
Implementation

• The hardware implementation of logic microoperations requires


that logic gates be inserted for each bit or pair of bits in the
registers to perform the required logic function

• Most computers use only four (AND, OR, XOR, and NOT) from
which all others can be derived.

25
Logic Microoperations Hardware
Implementation

26
Logical Micro-operations
• Let R1 = 10101010, and R2 = 11110000
• Then after “Operation”, R0 Becomes:

R0 Operation
01010101 R0  R1
11111010 R0  R1  R2
10100000 R0  R1  R2
01011010 R0  R1  R2

27
Shift Microoperations

• Shift micro-operations are those micro-operations that are used


for the serial transfer of information.
• These are also used in conjunction with arithmetic micro-
operation, logic micro- operation, and other data-processing
operations
• There are three types of shift micro-operations:
1.Logical Shift
2.Arithmetic Shift
3.Circular Shift

28
1. Logical Shift Microoperations

• It transfers the 0 zero through the serial input. We use the symbols
‘<<‘ for the logical left shift and ‘>>‘ for the logical right shift.
• Following are the two ways to perform the arithmetic shift.
1. Logical Left Shift
2. Logical Right Shift

29
Logical Left Shift Microoperations
• In this shift, one position moves each bit to the left one by one. The
Empty least significant bit (LSB) is filled with zero (i.e, the serial
input), and the most significant bit (MSB) is rejected.
• The left shift operator is denoted by the double left arrow key (<<).
The general syntax for the left shift is shift-expression << k.

30
Logical Right Shift Microoperations
• In this shift, each bit moves to the right one by one and the least
significant bit(LSB) is rejected and the empty MSB is filled with zero.
• The right shift operator is denoted by the double right arrow key (>>).
The general syntax for the right shift is “shift-expression >> k”.

31
2. Arithmetic Shift Microoperations

• The arithmetic shift micro-operation moves the signed binary number


either to the left or to the right position.
• Following are the two ways to perform the arithmetic shift.

1. Arithmetic Left Shift


2. Arithmetic Right Shift

32
Arithmetic Left Shift Microoperations
• In this shift, each bit is moved to the left one by one. The empty least
significant bit (LSB) is filled with zero and the most significant bit
(MSB) is rejected. Same as the Left Logical Shift.

33
Arithmetic Right Shift Microoperations
• In this shift, each bit is moved to the right one by one and the least
significant(LSB) bit is rejected and the empty most significant bit(MSB)
is filled with the value of the previous MSB.

34
3. Circular Shift Microoperations

• The circular shift circulates the bits in the sequence of the register
around both ends without any loss of information.
• Following are the two ways to perform the circular shift.
1.Circular Shift Left
2.Circular Shift Right

35
Circular Left Shift Microoperations
• In this micro shift operation each bit in the register is shifted to the left
one by one. After shifting, the LSB becomes empty, so the value of the
MSB is filled in there.

36
Circular Right Shift Microoperations
• In this micro shift operation each bit in the register is shifted to the right
one by one. After shifting, the MSB becomes empty, so the value of the
LSB is filled in there.

37
Arithmetic Microoperations
• In general, the Arithmetic Micro-operations deals with the operations
performed on numeric data stored in the registers.
• The basic Arithmetic Micro-operations are classified in
categories:
1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift
• Some additional Arithmetic Micro-operations are classified as:
1.Add with carry
2.Subtract with borrow
3.Transfer/Load, etc.

38
The following table shows the symbolic representation
of various Arithmetic Micro-operations.
Symbolic
Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are transferred to R3.

R2 ← R2' Complement the contents of R2 (1's complement)

R2 ← R2' + 1 2's complement the contents of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

39
Control Unit

• To execute an instruction, the control unit of the CPU must generate


the required control signal in the proper sequence.

• There are two approaches used for generating the control signals in
proper sequence

1. Hardwired Control Unit


2. Micro-programmed Control Unit.

40
Hardwired Control Unit

41
Hardwired Control Unit

42
Detailed Block Description

43
Detailed Block Description

44
Advantage & Disadvantage

45
Microprogrammed Control Unit

• Control signals are generated by a program similar to machine


language programs.

• Sequence of control steps required to perform


ADD (R3), R1 operations are

46
Control sequence for execution of the instruction
Add (R3),R1.
Step Action
1.PCout , MARin , Read, Select4,Add, Zin
2.Zout , PCin , Yin , WMFC
3.MDRout , IR in
4.R3out , MARin , Read
5.R1out , Yin , WMFC
6.MDRout , SelectY, Add, Zin
7.Zout ,R1n ,End
47
Basic Organization of Microprogrammed Control
Unit

48
Microprogrammed Control Unit

49
Difference between Hardwired &
Microprogrammed Control Unit
Micro-programmed Control Unit
Point Hardwired Control Unit

Microcode stored in memory


Implementation Fixed set of logic gates and circuits

More flexible, easier to modify


Flexibility Less flexible, difficult to modify

Supports complex instruction sets


Instruction Set Supports limited instruction sets

Complex design, more difficult to implement


Complexity of Design Simple design, easy to implement

Slower operation due to microcode decoding


Speed Fast operation

Easier to debug and test


Debugging and Testing Difficult to debug and test

Larger size, higher cost


Size and Cost Smaller size, lower cost

Easier to upgrade and maintain


Maintenance and Upgradability Difficult to upgrade and maintain

50
THANK YOU
51

Vishwakarma Institute of Technology, Pune

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