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Exp2b Partb 23EE10073

The document outlines an experiment involving the design and simulation of common collector (CC) and cascaded common emitter-common collector (CE-CC) amplifiers. It details the circuit parameters, operating points, and observations from LTspice simulations, highlighting the performance characteristics and advantages of the CC amplifier. Key takeaways include the benefits of high input impedance, enhanced gain and bandwidth in cascaded configurations, and the limitations of class A amplifier power efficiency.

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thaletipothurajuaaryan
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13 views14 pages

Exp2b Partb 23EE10073

The document outlines an experiment involving the design and simulation of common collector (CC) and cascaded common emitter-common collector (CE-CC) amplifiers. It details the circuit parameters, operating points, and observations from LTspice simulations, highlighting the performance characteristics and advantages of the CC amplifier. Key takeaways include the benefits of high input impedance, enhanced gain and bandwidth in cascaded configurations, and the limitations of class A amplifier power efficiency.

Uploaded by

thaletipothurajuaaryan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Experiment-2

Part - A

Electronics Circuits Lab Group - 7

Submitted by :
Name: Aaryan TP
Roll No: 23EE10073
Objective:
1. Design and simulate a common collector amplifier.
2. Observe the performance of the CC amplifier.
3. Design and simulate a directly coupled CE-CC amplifier.
4. Compare the advantages of CE-CC amplifier with respect to a CE amplifier.
5. Examine the power efficiency limitations of a class A amplifier.
Circuit Diagram
Circuit Diagram
Determination of Parameter Values:
• The bias resistor values (R1, R2, R3) were chosen
based on the following conditions:
• Supply voltage: Vcc = 12V
R1 = 29.5k
• Desired collector current: IC1 ≈ 2mA r2 = 30.5k
• IR1 ≤ 0.1 × IC1 to ensure proper biasing r3 = 2.7
• Target output voltage: VOUT ≈ 5.4V
• A 1 nF capacitor was used for output coupling.
• In the cascaded CE-CC design, the CC stage was
directly coupled to the CE amplifier, eliminating the
need for a DC decoupling capacitor.
Operating point
• In a common collector (emitter follower) circuit, the
operating point is determined by the resistor values
chosen in the circuit. The emitter voltage is set by the
voltage divider and emitter resistor , ensuring the
transistor operates in the active region.
• VCE = 6.56V.
• IE =1.2mA
• And the maximum output swing is observed at
6.2Vpp(peak to peak) without any significant distortion at
frequency 100 KHz from the simulation in LTspice.
Experimental set-up in LTspice
LTSpice simulation of ac analysis of CE amplifier
Observations from LTspice simulation
• Gain Plot (Magnitude Response)
• Starts at 0 dB at low frequencies (voltage gain ≈ 1, as expected for an
emitter follower).
• Acts as a low-pass filter, allowing low frequencies and attenuating high
frequencies.
• Gain drops at higher frequencies due to transistor parasitic capacitances
and external capacitors
• The -3 dB cutoff frequency marks the transition from the passband to
attenuation.

• Phase Plot (Phase Response)


• Near 0° phase shift at low frequencies (output follows input with minimal
delay).
• Phase shift gradually decreases as frequency increases.
PART-B _Objectives
•Cascade a CE amplifier designed before (in previous experiment)
with the CC amplifier without using any d.c. decoupling capacitor and
remove the base bias circuit of the CC stage as shown in Fig. 3.b.
• Construct the circuit in the simulation environment and observe the
operating points of the transistors.
•Observe gain of the cascaded amplifier through transient simulation
for 10 frequencies spreading over a wide range of frequency [say,
100Hz to 20MHz].
•Observe gain and phase plot of the cascaded amplifier (CE-CC)
through a.c. analysis over a wide range of frequency [say, 20Hz to
100MHz].
•Observe gain and phase plot of the CE amplifier (loaded with 1nF
capacitor) through a.c. analysis over the same frequency range and
compare
LTSpice simulation
● The bode plot of frequency analysis is shown in the above image , gain plot is like a band
pass filter and phase plot decreases with 2 poles . Gain is constant at mid-band
frequency range , i.e 1kHz to 10MHz .
● The bode plot of frequency analysis is shown in the above image , gain plot is like a
high pass filter and phase plot decreases with 1 poles . Gain is constant from 100Hz
to 50KHz
Key Takeaways and conclusions
1.Common Collector amplifiers provide high input impedance and low output
impedance, making them suitable as buffer stages.
2.The cascaded CE-CC amplifier enhances gain and bandwidth while maintaining
signal integrity.
3.Direct coupling eliminates the need for decoupling capacitors but requires careful
biasing.
4.The power efficiency of class A amplifiers remains low due to continuous power
dissipation.
5.Simulation results closely match theoretical predictions, validating design principles.

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