SPI Update
SPI Update
PROTOCOL???
TYPES:
I. INTER SYSTEM PROTOCOL
II. INTRA SYSTEM PROTOCOL
PARALLEL VS SERIAL
COMMUNICATION
In parallel communication, the bits of data are sent all at the same time, each
through a separate wire.
Parallel transmission of the letter “C” in binary (01000011):
serial communication, the bits are sent one by one through a single wire.
Serial transmission of the letter “C” in binary (01000011):
THUMB RULE FOR ANY LEARNING
SPI – Serial Peripheral Interface
WHO – Motorola
WHEN – 1970
Why – high speed data exchange at short range, send data between
controllers and small peripherals
Where – shift register, sd card, sensors, memory devices, LCDs
WhaT
Full duplex communication
Single master – multi slave architecture
High speed communication [Hz, kHz or MHz]
Push-Pull hardware pin drivers
Four wire / pin serial bus
o MOSI / Master Out Slave In – Output data from the master device to
the input of the slave device
o MISO / Master In Slave Out – Output data from a slave device to the
input of the master device
o SCLK / Serial Clock – Clock driven by the master device to slave
device, used to synchronize the data bits
o SS / Slave Select – Select signal (active low) driven by the master
device to individual slave devices, used to select the target slave
(also called CE / CS)
Flexible protocol – no constrains on data length, framing, addressing
Short distance communication, usually on the same PCB / system
Term Description
APPLICATIONS
• MMC or SD card including SDIO variant.
• sensors i.e. temperature and pressure, analog to digital converter (ADC), digital to analog
converter (DAC).
• audio or video codec’s, digital potentiometers, canon EF lens mount in camera.
• Flash and EEPROM memories.
• real time clocks, LCD and LED.
• communications such as Ethernet, USB, USART, CAN, IEEE 802.15.4, and IEEE 802.11.
HOW SPI WORKS
SPI has following four lines MISO, MOSI, SS, and CLK
MISO (Master in Slave Out) - The Slave line for sending data to the master.
MOSI (Master Out Slave In) - The Master line for sending data to the peripherals.
SCK (Serial Clock) - The clock pulses which synchronize data transmission generated by the
master.
SS (Slave Select) –Master can use this pin to enable and disable specific devices.
STEPS OF SPI DATA TRANSMISSION
1. The master outputs the clock signal:
2. The master switches the SS/CS pin to a low voltage state, which
activates the slave:
3. The master sends the data one bit at a time to the slave along the MOSI line.
The slave reads the bits as they are received:
4. If a response is needed, the slave returns data one bit at a time to the master
along the MISO line. The master reads the bits as they are received:
MULTIPLE SLAVES
STEPS OF SPI
PROVIDE CLOCK SIGNAL (SCLK)
SPI communication always initiated by the master since the
Master configures and send the clock signal to slave deivces
SELECT SLAVE DEVICE
Master can choose which slave it wants by setting the slave’s
CS/SS line to a low voltage level.
Multiple slaves connected through parallel wires.
MOSI/MISO
Master sends data to the slave bit by bit through MOSI.
Slave receives the data sent from Master at MOSI pin.
Slave send the data back to the master through MISO pin.
INDEPENDENT VS DAISY CHAINED
SPI
INDEPENDENT SPI
MASTER sends the data to each slave & slave gives response to master
DAISY CHAINED SPI
Master sends the data to slave, slave sends the data to next slaves, last slave
sends response to master.
HOW SPI Hardware WORKS
• Master will generate clock whenever it wants to write data to a Slave device.
• After 8 clock pulses data in the master device (A7 ~ A0) is transferred to slave device
• Data in the slave device (B7 ~ B0) is transferred to the master device.
SPI BUFFER
• Buffer Register - acts as an interface between user (processor, programmer) and SPI.
• Usually shift register won’t be directly accessible, So if we need to transmit data, we will write it to the
buffer register.
• Buffer will automatically written to shift register when it is free and transmission will start.
• Similarly data is received in the shift register is automatically transferred to buffer register once the
reception is complete.
• Buffer register will avoid all glitches that can happen if we try to read or write to shift register directly
while transmission is taking place.
ADVANTAGES OF SPI
Full duplex communication
High throughput
Push pull driver provides better signal integrity
No data frame length limit
Uses 4 wires
Transceivers are not needed
Galvanic isolation possible
DISADVANTAGE OF SPI
Slaves should have tri-state buffer for MISO pin so that they can disconnect the line when the Master has not selected the device.
This is necessary for multi slave communication
No hardware flow control
No hardware slave acknowledgement
No hardware error checking
Short distance communiaction
Single master protocol
SPI REGISTER CONFIGURATION