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Asynchronous Counter

Counters are sequential circuits that count pulses and can produce a sequence of states, with applications in frequency division and pulse stretching. They can be categorized into asynchronous and synchronous types, with the MOD number representing the total different states in a counter. The number of flip-flops required for designing a counter is determined by the formula 2^N >= M, where M is the number of possible states.

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Ruturaj Nakum
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5 views4 pages

Asynchronous Counter

Counters are sequential circuits that count pulses and can produce a sequence of states, with applications in frequency division and pulse stretching. They can be categorized into asynchronous and synchronous types, with the MOD number representing the total different states in a counter. The number of flip-flops required for designing a counter is determined by the formula 2^N >= M, where M is the number of possible states.

Uploaded by

Ruturaj Nakum
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Count

ers
• A counter is a sequential circuit that counts pulses and produces a sequences or
mod(States).
• Uses
 Frequency Division
 To Count no. of Clock cycle Applied
 Used for Pulse Stretching

• MOD no of Counter
 Total no of Different States in Counter
Ex. 0 – 1 – 4 – 7 – 6 : MOD no. 5
 After Application of MOD no Counter will go to it’s Starting State.
.

• Types
1. Asynchronous Counter
2. Synchronous Counter
MOD of Counter Concept
• Let’s Understand with a Example
• MOD : 0 – 1 – 3 – 2 MOD no : 4
QA QB
• QA • QB
0 0
Ton = 2 clk Ton = 2 clk
0 1 Toff = 2 clk Toff = 2 clk
1 1 TQA = 4 clk TQA = 4 clk
fQA = fclk / 4 fQB = fclk / 4
1 0

Clk

QA

QB
What is an Asynchronous Counter?
• The flip-flops are not clocked simultaneously (Different Clocks). The output of one
flip-flop acts as the clock input for the next flip-flop.
• Execution Slower (why)
• Only Fixed Sequence is Possible
• Propagation Delay Accumulated is increase as per going to block.

• Up Sequence
• Down Sequence Possible Sequence
• BCD counter
1 Q0 1 Q1 1 Q2 1 Q3

1 Q0’ 1 Q1’ 1 Q2’ 1 Q3’

CLK
No. of Flip-Flop are Required for designing
a Counter
• Mode M Counter  N flip-flop
• Where 2^N >= M
• M is nothing but no of possible states

• Ex : counting Sequence
• 0-1-2-3-4-5-6-7 and repeat it
• Than N = 3 that means No of Flip flops are three
• And by the using of we can generate a total 8 mods

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