COMMUNICATION

PROTOCOLS

SANJAY S B
 COMMUNICATION PROTOCOLS

SPI, I2C, and UART are ideal for communication between microcontrollers and between
microcontrollers and sensors where large amounts of high speed data don’t need to be
transferred.

We have Serial and Parallel communication:

Parallel Serial

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 SERIAL PERIPHERAL INTERFACE

I2C and UART, data is sent in packets, limited to a specific number of bits. Start and stop
conditions define the beginning and end of each packet, so the data is interrupted during
transmission.

• Unique benefit of SPI is the fact that data can be transferred without interruption.
• Any number of bits can be sent or received in a continuous stream.

Devices communicating via SPI are in a master-slave relationship.

• The master is the controlling device (usually a microcontroller)

• The slave (usually a sensor, display, or memory chip)

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 SPI CONTINUED

Wires Used 4
Max Speed Up to 10 Mbps
Synchronous or Async Sync
Serial or Parallel Serial
Max # of Masters 1
Max # of Slaves Theoretically Infinite

But in practical the number of slaves is limited by the load capacitance of the system,
which reduces the ability of the master to accurately switch between voltage levels.

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 SERIAL PERIPHERAL INTERFACE

MOSI Line for the master to send data to the slave. (MSB First)
MISO Line for the slave to send data to the master. (LSB First)
SCLK Line for the clock signal.
SS/CS Line for the master to select which slave to send data.

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 WORKING OF SPI
Clock
• The clock signal synchronizes the output of data bits from the master to the sampling
of bits by the slave.
• One bit of data is transferred in each clock cycle.
• Speed of data transfer is determined by the frequency of the clock signal.
• SPI communication is always initiated by the master.
The clock signal in SPI can be modified using the properties of clock polarity and clock
phase.
These two properties work together to define when the bits are output and when they are
sampled.

Clock polarity (CPOL) can be set by the master to allow for bits to be output and
sampled on either the rising or falling edge of the clock cycle.

Clock phase (CPHA) can be set for output and sampling to occur on either the first
edge or second edge of the clock cycle, regardless of whether it is rising or falling.
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 WORKING OF SPI
Slave select:
• The master can choose which slave it wants to talk to by setting the slave’s CS/SS line
to a low voltage level.
• In the idle, non-transmitting state, the slave select line is kept at a high voltage level.
• Multiple CS/SS pins may be available on the master, which allows for multiple slaves to
be wired in parallel.
• If only one CS/SS pin is present, multiple slaves can be wired to the master by daisy-
chaining.

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 WORKING OF SPI
MOSI/MISO:
The master sends data to the slave bit by bit, in serial through the MOSI line.
The slave send data back to the master through the MISO line in serial.

Data From Master to Slave usually MSB first

Data From Slave to Master usually LSB first

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WORKING OF SPI

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 PRO’S AND CON’S OF SPI
Advantages

• No start and stop bits, so the data can be streamed continuously without interruption
• No complicated slave addressing system like I2C
• Higher data transfer rate than I2C (almost twice as fast)
• Separate MISO and MOSI lines, so data can be sent and received at the same time

Disadvantage

• Uses four wires (I2C and UARTs use two)

• No acknowledgement that the data has been successfully received (I2C has this)
• No form of error checking like the parity bit in UART Only allows for a single master

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MODES OF SPI

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 SPI MODES AND CLOCK CONFIGURATION

Mode 0: CPOL = 0, CPHA = 0

Clock idles low.
Data is captured on the rising edge and changed on the falling edge.

Mode 1: CPOL = 0, CPHA = 1

Clock idles low.
Data is captured on the falling edge and changed on the rising edge.

Mode 2: CPOL = 1, CPHA = 0

Clock idles high.
Data is captured on the falling edge and changed on the rising edge.

Mode 3: CPOL = 1, CPHA = 1

Clock idles high.
Data is captured on the rising edge and changed on the falling edge.

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TIMING REQUIREMENT IN SPI (ADS1118

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UART

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 UNIVERSAL ASYNCHRONOUS RECEIVER
TRANSMITTER
https://www.ti.com/lit/ug/sprugp1/sprugp1.pdf
UART, which stands for Universal Asynchronous Receiver-Transmitter, is a hardware
communication protocol used for asynchronous serial communication between devices.

UART does not require a clock signal to synchronize the sender and receiver. Instead,
both Transmitter and Receiver should be preconfigured with the same baud rate.

It uses start and stop bits to indicate the beginning and end of a data packet.

This protocol requires only two wires TX and RX.

UART can transmit and receive data simultaneously, allowing for full-duplex
communication.

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 APPLICATION OF UART

• UART widely used in microcontroller to communicate with sensors, actuators and other
microcontroller.
• It I often used to connect Microcontrollers with computer using USB to UART convertor
for debugging.
• Many modem and communication devices uses UART.
• UART is commonly used in GPS, Bluetooth and other wireless communication module.

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The UART peripheral is based on the industry standard TL16C550 asynchronous
communications element

TL16C550 : Single UART with 16-Byte FIFOs and Auto Flow Control

The UART contains a programmable baud generator that takes an input clock and divides
it by a divisor in the range between 1 and ( - 1) to produce a baud clock (BCLK).

Two 8-bit register fields (DLH and

DLL), called divisor latches, hold this
16-bit divisor.

DLH holds the most significant bits of

the divisor, and DLL holds the least
significant
bits of the divisor. 20
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UART SIGNAL DESCRIPTION

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 DATA FORMAT

The UART transmits in the following format:

1 START bit + data bits (5, 6, 7, 8) + 1 PARITY bit (optional) + STOP bit (1, 1.5, 2)

The UART receives in the following format:

1 START bit + data bits (5, 6, 7, 8) + 1 PARITY bit (optional) + 1 STOP bit
(any other STOP bits transferred with the above data are not detected)

The UART transmitter section includes a transmitter hold register (THR) and a transmitter
shift register (TSR)

The UART receiver section includes a receiver shift register (RSR) and a receiver buffer
register (RBR).

Based on the settings chosen in LCR (Line control register), the UART receiver accepts
the above mentioned format from the transmitting device.

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IER: register hold the status
signal like receive and transmit
line status.

DLL & DLH: Hold the divisor

value.

RBR & THR: transmit and receiver

buffer.

LCR: controls the divisor latch

access and specifying the stop
bit.

LSR : Indicates the status of

register like THR empty, Break
Indicator, Parity error, FIFO error.

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 PRO’S AND CON’S OF SPI
Advantage:
• UARTs are simple and they only rely on two wires.
• They possess a parity bit in order to check for errors in data packets.
• If both sides are set up for structural data change it can happen.
• UART is a widely used method.

Disadvantage:
• The data frame is limited to 9 bits.
• The baud rates of the receiving and transmitting UAT must be within ten percent.

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I2C

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 INTER INTEGRATED CIRCUIT
I2C, which stands for Inter-Integrated Circuit, is a synchronous serial communication
protocol developed by Philips (now NXP Semiconductors) for connecting low-speed
devices like microcontrollers, sensors, EEPROMs, and other peripherals in embedded
systems.

I2C is also called as “Open drain communication protocol”

• lines (2 Wire Communication)

• SDA : Serial Data Line
• SCL : Serial Clock Line
• Half duplex (Bidirectional)
• Rate of communication
• Standard Mode: 100Kbps
• Fast Mode: 400Kbps
• Fast mode plus: 1Mbps, 3.4Mbps

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 I2C MODES
Figure shows the Data frame fields used in different
modes by I2C

R/W = 0 for Read, 1 for write

STA, SLA and STO is always from master

First ACK is always done by slave.

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 MULTI-MASTER ATTRIBUTION
When we have a multi-master, only one will be allowed to transfer the data to slave.

So, when we have multiple master then the data from master with lower address will
have the priority
This can be solved by ARBITRATION that uses Wired AND Logic.

Wired AND Logic:

M1: 11110101 M2: 10110101 M3: 10001010
So in wired AND logic the address is checked from MSB
• Since all M1 M2 M3 has MSB set.
• check the (MSB - 1)th bit.
• Since M1 is higher address than M2 and M3, M1 is neglected
• then check the (MSB - 3)rd bit, then M2 has higher address than M3 so neglect M2
• Hence the M3 will be the master for the I2C connection.

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 INTERFACING EEPROM AT24C04
This is a Atmel EEROM 4KB memory, we have other Atmel EEPROM like
AT24C01/02/04/08/16.
Refer this Manual for Atmel EEPROM.

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 PROTOCOL SUMMARY

SPI UART I2C

4 wire 2 Wire 2 Wire
(SCLK, MOSI, MISO, SS’)
Synchronous Asynchronous Synchronous
Full Duplex Full duplex Half duplex
Single master multiple No master, No slave Multi-Master, Multi Slave
slave
No ACK No ACK Ack based
8 – 16 bit (address + data) 5 – 8 bit data 8 bits
Mode 0, Mode 1, TX and RX mode MOMI, MOSI
Mode 3, Mode 4. SOSI, SOMI
Based on clock phase
MSB first in transmit LSB first in data format MSB or LSB in data format
LSB first in receive is configurable

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BASIC
ELECTRONICS

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APPLICATION OF PULL UP AND PULL DOWN
RESISTOR
https://www.electronics-tutorials.ws/dccircuits/voltage-divider.html

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To avoid the floating condition when using in switching conditions, we use pull up and pull
down resistor for logic level.

For example: In figure 1, when the switch is open due to external interference the switch
will be in floating condition (0 or 1), whereas in figure 2 we have Used pull up resistor.

Pull-down resistor is exactly opposite of pull-up resistor. Ex: Figure 3

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Sometimes we need to interface logic gates of different logic family.
Then we use pull-up or down resistor, because the voltage level of different logic family
will be different.
Ex: Logic level like 1.8v and 3.3v devices.
When we want to drive the devices that operate
in higher voltages than the supply voltage of the
logic gates then we use pull up resistor.

Usually pull up resistor are used with open

collector gates.

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Pull up resistor are also used in I2C protocol in slave select lines

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 HOW TO CHOOSE PULL UP RES VALUE
• Lower the value of pull up resistor, stronger is the pull.
• Higher the value of pull up resistor, weaker is the pull.

Note:
When we choose very low resistor, then excessive current flow on strong pull up lead to
more dissipation.
When we choose very high resistor, then no current may flow through peripheral and lead
to logic zero

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And in microcontrollers when we consider the input impedance, then the voltage drop
appearinf across the MC may not be sufficient, so we should choose Rp considering input
impedence of MC and also the drop due to leakage current.

For fast switching application, large value of pull up resistor should be avoided.
Typically, 5k to 50Kohms works for application.

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CAPACITOR BASICS

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 CAPACITOR BASICS

A capacitor is a device that stores electrical energy by accumulating electric charges

on two closely spaced surfaces that are insulated from each other.

• Capacitor with the larger distance between two plates has the smaller capacitance.
• Capacitor with the larger area of plates has the larger capacitance.
• Smaller capacitance charges quickly, and larger capacitance charges slowly.

Capacitance of a capacitor is the ability of the capacitor to store electrical charge,

measured in farads (F). It is defined as the ratio of the charge stored (Q) to the voltage
(V) across the capacitor, expressed by the formula C = Q/V. (SI unit coulomb/volt or
farad)
Q = CV
Where
Q – charge stored
C – Capacitance of the capacitor
V – Applied voltage
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 CAPACITOR IN SERIES
The equivalent capacitance decreases when capacitors are connected in series.

Increased Voltage Rating:

When capacitors are connected in series, the total voltage rating of the combination is
the sum of the individual voltage ratings of the capacitors. This allows the circuit to
handle higher voltages than a single capacitor could manage.

All capacitors in series will have the same charge, but the voltage across each will vary
based on their capacitance.

When capacitors are in series, the voltage across each capacitor will be different,
depending on their capacitance values. The capacitor with the smallest capacitance will
have the highest voltage across it

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 CAPACITOR IN PARALLEL
When capacitors are connected in parallel, the total capacitance () is the sum of the
individual capacitances. The formula for calculating the total capacitance in parallel is:

In a parallel configuration, all capacitors experience the same voltage across their
terminals. The voltage rating of the parallel combination is determined by the lowest
voltage rating of the individual capacitors.

If one capacitor in a parallel configuration fails (for example, short-circuits), the other
capacitors can continue to function.

When connecting capacitors in parallel, it is important to ensure that they have the same
voltage rating to avoid overvoltage conditions on any individual capacitor.

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 APPLICATION OF CAPACITOR

Series Capacitors: Useful for increasing voltage ratings, creating voltage dividers, tuning
circuits, and designing high-pass filters.

Parallel Capacitors: Ideal for increasing total capacitance, smoothing power supplies,
decoupling in digital circuits.

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