Comparator

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 Comparator
• It is a combinational logic circuit.

•Digital Comparator is used to compare the value of two

binary digits.

•There are two types of digital comparator

(i) Identity Comparator
(ii) Magnitude Comparator.

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 Types
•IDENTITY COMPARATOR:
This comparator has only one output terminal for when
A=B, either A=B=1 (High) or A=B=0 (Low)

•MAGNITUDE COMPARATOR:
This Comparator has three output terminals namely
A>B, A=B, A<B. Depending on the result of comparison,
one of these output will be high (1)

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 Comparators
• A comparator compares a two n-bit binary values to
determine which is greater or if they are equal
• Consider the simple 1-bit comparator to illustrate the
design
• It is possible to extend the design for multi-bit numbers

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 Equality Comparator
Design a logic circuit which will
compute
F0 = (A = B)
XNOR
X Y Z
X 0 0 1
Z 0 1 0
Y 1 0 0
1 1 1

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2-bit Equal Comparator Truth Table

b1 b0 a1 a0 F0 b1 b0 a1 a0 F0
0 0 0 0 1 1 0 0 0 0
0 0 0 1 0 1 0 0 1 0
0 0 1 0 0 1 0 1 0 1
0 0 1 1 0 1 0 1 1 0
0 1 0 0 0 1 1 0 0 0
0 1 0 1 1 1 1 0 1 0
0 1 1 0 0 1 1 1 0 0
0 1 1 1 0 1 1 1 1 1

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 Solution

You can show,


F0  a1  b1 a 0  b0 

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 N-bit Equal Comparator
  
F0  an  1  bn  1  a1  b1 a 0  b0 

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 Not Equal Comparator
• Design a logic circuit which will compute

F = (A <> B)
F = (A = B)
i.e. Just invert our Equal Comparator circuit

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 Magnitude Comparator
• Design a logic circuit which will compute

F2 = (A>B)
F1 = (A<B)
Let’s develop a truth table for 2-bits

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 2-bit Magnitude (unsigned)
Comparator
Truth Table
b1 b0 a1 a0 F2 F1 b1 b0 a1 a0 F2 F1

0 0 0 0 0 0 1 0 0 0 0 1

0 0 0 1 1 0 1 0 0 1 0 1
0 0 1 0 1 0 1 0 1 0 0 0
0 0 1 1 1 0 1 0 1 1 1 0
0 1 0 0 0 1 1 1 0 0 0 1
0 1 0 1 0 0 1 1 0 1 0 1
0 1 1 0 1 0 1 1 1 0 0 1
0 1 1 1 1 0 1 1 1 1 0 0

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 You can show

F2 a1 b1  a0 b1 b0  a1a0 b0
F1 a1b1  a1 a0b0  a0b1b0

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 1-bit Comparator

x y x> x= x<
y y y
x>
y
CMP x=
y
x<
y
x y

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8-bit comparator
xn>yn x>
xn=y y
CMP x=
n y
xn<y x<
n y
x y

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1 bit comparators

• X>Y only if Xi=1, Yi=0

• X<Y only if Xi=0, Yi=1
• X=Y only if Xi=Yi=0 or
Xi=Yi=1
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1 bit comparator with propagated
inputs

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 N bit comparator

• If: X = Yin is active then the numbers are equal so far

• If X>Yin or X<Yin is active, that value is simply passed through;
This corresponds to the case where we have checked the high-
order bits and already know which value is larger.

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 Comparators (computer
intelligence?)
• Let's build a comparator circuit for two 4-bit
positive binary numbers.
A3
• Nine inputs, three A2 A>B
A1
outputs (three 512 A0 A=B
entries truth tables?)
A<B
B3
B2
B1
B0
ENABLE

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 Designing Comparators
Functionally
1. Build a one-bit comparator
B 0 1 A>B : AB'
A
0 A=B A<B A=B : A'B' + AB

1 A>B A=B A<B : A'B

OR What?
A
A>B

B A=B

A<B
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 Designing Comparators
Functionally
2. Add an enable line

A A>B

A=B
B

Enable

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Build a four-bit Comparator (from four
one-bit ones)

Not bad

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 Combinational Multiplier

Basic Concept
multiplicand 1101 (13)
product of 2 4-bit numbers
multiplier * 1011 (11) is an 8-bit number
1101
1101
Partial products
0000
1101

10001111 (143)

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 Multiplication
• Example: 1100 : 1210
0101 : 510
1100

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 Multiplication
• Example: 1100 : 1210
0101 : 510
1100
0000

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 Multiplication
• Example: 1100 : 1210
0101 : 510
1100
0000
1100

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 Multiplication
• Example: 1100 : 1210
0101 : 510
1100
0000
1100
0000

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 Multiplication
• Example: 1100 : 1210
0101 : 510
1100
0000
1100
0000
00111100 : 6010

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 Multiplication
• Example: 1100 : 1210 multiplicand
0101 : 510 multiplier
1100
0000 partial
1100 products
0000
00111100 : 6010 product
• M x N-bit multiplication
– Produce NM-bit partial products
– Sum these to produce M+N-bit product

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 General Form
• Multiplicand: Y = (yM-1, yM-2, …, y1, y0)
• Multiplier: X = (xN-1, xN-2, …, x1, x0)

 M1   N1
 N1 M 1
• Product: P   y j 2 j    xi 2i    xi y j 2i  j
 j 0   i 0  i 0 j 0

y5 y4 y3 y2 y1 y0 multiplicand
x5 x4 x3 x2 x1 x0 multiplier
x0y5 x0y4 x0y3 x0y2 x0y1 x0y0
x1y5 x1y4 x1y3 x1y2 x1y1 x1y0
x2y5 x2y4 x2y3 x2y2 x2y1 x2y0 partial
x3y5 x3y4 x3y3 x3y2 x3y1 x3y0 products
x4y5 x4y4 x4y3 x4y2 x4y1 x4y0
x5y5 x5y4 x5y3 x5y2 x5y1 x5y0
p11 p10 p9 p8 p7 p6 p5 p4 p3 p2 p1 p0 product

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 16X16 Mult. Dot Diagram
• Each dot represents a bit

x0

partial products

multiplier x
x15

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 Combinational Multiplier

Partial Product Accumulation

A3 A2 A1 A0

B3 B2 B1 B0

A3 B0 A2 B0 A1 B0 A0 B0

A3 B1 A2 B1 A1 B1 A0 B1

A3 B2 A2 B2 A1 B2 A0 B2

A3 B3 A2 B3 A1 B3 A0 B3

S7 S6 S5 S4 S3 S2 S1 S0

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 Partial Product Accumulation

A 3 B3 A 3 B2 A 2 B3 A 3 B1 A 2 B2 A 1 B3 A 3 B0 A 2 B1 A 1 B2 A 0 B3 A 2 B0 A 1 B 1 A 0 B 2 A 0 B 1 A 1 B 0 A 0 B0

FA HA HA HA

FA FA FA FA

FA FA HA FA

S7 S6 S5 S4 S3 S2 S1 S0

Note use of parallel carry-outs to form higher order sums

12 Adders, if full adders, this is 6 gates each = 72 gates

16 gates form the partial products

total = 88 gates!

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 Another Representation of the Circuit
Sum In X Cin

Y
FA
A
CO
B
CI
Building block: full adder + and
S

Cout Sum Out

A3 A2 A1 A0
B0
A3 B0 A2 B0 A1 B0 A0 B0
C C C C
S S S S
B1
A3 B1 A2 B1 A1 B1 A0 B1
C C C C
S S S S
B2
A3 B2 A2 B2 A1 B2 A0 B2
C C C C
S S S S
B3
A3 B3 A2 B3 A1 B3 A0 B3
C
S S S S
P7 P6 P5 P4 P3 P2 P1 P0

4 x 4 array of building blocks 33

Parallel Binary Multiplier

P C
Y Y
X

CO

X PO

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One-Bit Multiplier Cell
P C
Y Y
X

CO

X PO

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2-bit by 2-bit Binary Multiplier
With J multiplier bits and K multiplicand bits – need JxK
AND gates and (J-1) K-bit adders to produce J+K bits

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4-bit by 3-bit Binary Multiplier
With J=3 (A0A1A2) multiplier bits, K=4 (B3B2B1B0) multiplicand bits –
need 12 (JxK) AND gates, 2 (J-1) 4-bit(K-bit) adders to produce
7(J+K) bits

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Thank You!

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