Computer Organization

and Architecture(COA)
BCA-203
Unit-1
 Digital Electronics

• Digital electronics is the branch of electronics that deals with the study of
digital signals and the components that use or create them.
 Computer Architecture Vs Computer
Organization
• Computer architecture refers to the design of the internal workings of a
computer system, including the CPU, memory, and other hardware
components.

• Computer organization refers to the operational units and their

interconnections that implement the architecture specification. It deals
with how the components of a computer system are arranged and how
they interact to perform the required operations.
• In summary, Computer Architecture is focused on the design of the
internal workings of a computer system, while Computer Organization is
focused on the implementation of that design.

• Computer Architecture is concerned with the high-level design decisions,

while Computer Organization deals with the low-level implementation
details.
 Signal
• A signal is an electromagnetic or electrical current that is used for
carrying data from one system or network to another.

• There are two main types of signals: Analog signal and Digital signal.
 Analog Signals
• Analog signals were used in many systems to produce signals to carry
information.
• These signals are continuous in both values and time.
• The use of analog signals has declined with the arrival of digital signals.
• In short, to understand analog signals – all signals that are natural or come
naturally are analog signals.
 Digital Signals
• Unlike analog signals, digital signals are not continuous, but signals are
discrete in value and time.
• These signals are represented by binary numbers and consist of different
voltage values.
 Boolean Algebra
• Boolean algebra is the category of algebra in which the variable’s values are
the truth values, true and false, ordinarily denoted 1 and 0 respectively.
• Boolean algebra was invented by George Boole in 1854.
• It is used to analyze and simplify digital circuits or digital gates.
• It is also called Binary Algebra or logical Algebra.
• It has been fundamental in the development of digital electronics.
• The important operations performed in Boolean algebra are: conjunction
(∧), disjunction (∨) and negation (¬).
• Hence, this algebra is far way different from elementary algebra where the
values of variables are numerical and arithmetic operations like addition,
subtraction is been performed on them.
 Boolean Algebra Operations
The basic operations of Boolean algebra are as follows:
• Conjunction or AND operation
• Disjunction or OR operation
• Negation or Not operation
 Boolean Expression
• A logical statement that results in a Boolean value, either be True or
False, is a Boolean expression.
• Boolean expressions are the statements that use logical operators, i.e.,
AND, OR, XOR and NOT. Thus, if we write X AND Y = True, then it is a
Boolean expression.
 Truth Table
• The truth table is a table that gives all the possible values of logical
variables and the combination of the variables.
• It is possible to convert the Boolean equation into a truth table. The
number of rows in the truth table should be equal to 2n, where “n” is the
number of variables in the equation.
• For example, if a Boolean equation consists of 3 variables, then the
number of rows in the truth table is 8. (i.e.,) 23 = 8.
Boolean Algebra Truth Table
 Boolean Algebra Rules
• Variable used can have only two values. Binary 1 for HIGH and Binary 0 for
LOW.
• The complement of a variable is represented by an overbar.
• OR-ing of the variables is represented by a plus (+) sign between them.
For example, the OR-ing of A, B, and C is represented as A + B + C.
• Logical AND-ing of the two or more variables is represented by writing a
dot between them, such as A.B.C. Sometimes, the dot may be omitted like
ABC.
 Laws of Boolean Algebra
• Commutative law
• Associative law
• Distributive law
• AND law
• OR law
• Inversion law
• De Morgan’s Law/Theorem
• Absorption Law
 Commutative Law
This law states that no matter in which order we use the variables. It means
that the order of variables doesn't matter. The order of the input variables
does not matter at all.

For two variables, the commutative law of addition is written as:

A+B = B+A

For two variables, the commutative law of multiplication is written as:

A.B = B.A
 Associative Law
• This law states that the operation can be performed in any order when
the variables priority is same. As '*' and '/' have same priority.

For three variables, the associative law of addition is written as:

A + (B + C) = (A + B) + C

For three variables, the associative law of multiplication is written as:

A(BC) = (AB)C
 Distributive Law
• According to this law, if we perform the OR operation of two or more
variables and then perform the AND operation of the result with a single
variable, then the result will be similar to performing the AND operation of
that single variable with each two or more variable and then perform the
OR operation of that product. This law explains the process of factoring.

For three variables, the distributive law is written as:

A(B + C) = AB + AC (OR Distributive Law)
A+(BC)=(A+B).(A+C) (AND Distributive Law)
 AND Laws
• These laws use the AND operation. Therefore they are called AND laws.

A.0=0 (Annulment Law)

A.1=A (Identity Law)
A.A=A (Idempotent Law)
A . A’= 0 (Complement Law)
 OR Laws
• These laws use the OR operation. Therefore they are called OR laws.

A+0=A (Identity Law)

A+1=1 (Annulment Law)
A+A=A (Idempotent Law)
A + A’= 1 (Complement Law)
 Inverse Law or NOT Law
• In Boolean algebra, the inversion law states that double inversion of
variable results in the original variable itself.

A’’=A (Double Negation or Double Complementation Law)

 De Morgan’s Law/Theorem
• De Morgan’s First Law states that (A.B)’ = A’+B’.
• De Morgan’s Second law states that (A+B)’ = A’. B’.
 Absorption Law
• This law enables a reduction in a complicated expression to a simpler one
by absorbing like terms.
A + (A.B) = A.1+A.B=A[1+B]=A.1=A
A.(A+B)=A.A+A.B=A+A.B=A
A+A’.B=(A+A’)(A+B)=1(A+B)=A+B
A.(A’+B)=A.A’+AB=0+A.B=AB
 Boolean Postulates
• These are a set of Mathematical Laws which can be used in the
simplification of Boolean Expressions.
 Duality Theorem
• The principle of duality is an important concept in Boolean algebra,
particularly in proving various theorems.
• Briefly stated, the principle of duality pronounces that given an
expression which is always valid in boolean algebra, the dual expression is
also always valid.
• The dual expression is found by replacing all + operations with (.), all (.)
operation with (+) all 1's by 0's, and all 0's by 1's.
• As an example given the expression.
A(B+C)=A.B+A.C
The dual of the expression is:
A+(B.C)=(A+B)(A+C)
 Simplification of Boolean
Expression
Question: AB + A (B+C) + B (B+C)

Solution:
AB + A (B+C) + B (B+C)
AB + AB + AC + BB + BC {Distributive law; A (B+C) = AB+AC, B (B+C)
= BB+BC}
AB + AB + AC + B + BC {Idempotent law; BB = B}
AB + AC + B + BC {Idempotent law; AB+AB = AB}
AB + AC +B {Absorption law; B+BC = B}
B + AC {Absorption law; AB+B = B}
Hence, the simplified Boolean function will be B + AC.
 Logic Gates
• A logic gate is a digital gate that allows data to be transferred. Logic gates,
use logic to determine whether or not to pass a signal.
• A logic gate is a device that acts as a building block for digital circuits.
• Logic Gates are important digital devices that are mainly based on the
Boolean function.
• Logic gates are used to carry out logical operations on single or multiple
binary inputs and give one binary output.
• In simple terms, logic gates are the electronic circuits in a digital system.
Types of Logic Gates
Logic
Gates

Basic Universal Arithmetic

Gates Gates Gates

AND NAND XOR

OR NOR XNOR

NOT
 OR Gate
• An OR gate is a digital circuit that has two or more inputs and produces an
output, which is the logical OR of all those inputs.
• In an OR gate, the output of an OR gate attains state 1 if one or more
inputs attain state 1.
• This logical OR is represented with the symbol ‘+’.
• The Boolean expression of the OR gate is Y = A + B, read as Y equals A ‘OR’
B.
 AND Gate
• An AND gate is a digital circuit that has two or more inputs and produces
an output, which is the logical AND of all those inputs.
• In the AND gate, the output of an AND gate attains state 1 if and only if all
the inputs are in state 1.
• The Boolean expression of AND gate is Y = A.B
 NOT Gate
• A NOT gate is a digital circuit that has single input and single output.
• The output of NOT gate is the logical inversion of input.
• Hence, the NOT gate is also called as inverter.
• In a NOT gate, the output of a NOT gate attains state 1 if and only if the
input does not attain state 1.
• The Boolean expression is Y= A’
• It is read as Y equals NOT A.
 Universal Gates
• A universal gate is a gate which can implement any Boolean function
without need to use any other gate type.
• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR gates are
economical and easier to fabricate and are the basic gates used in all IC
digital logic families.
 NAND Gate
• The NAND gate represents the complement of the AND operation.
• Its name is an abbreviation of NOT AND.
• The graphic symbol for the NAND gate consists of an AND symbol with a
bubble on the output, denoting that a complement operation is
performed on the output of the AND gate.
• The Boolean expression of the NAND gate is
 NOR Gate
• The NOR gate represents the complement of the OR operation.
• Its name is an abbreviation of NOT OR.
• The graphic symbol for the NOR gate consists of an OR symbol with a
bubble on the output, denoting that a complement operation is
performed on the output of the OR gate.
• The Boolean expression of the NOR gate is:
 Exclusive-OR Gate
• XOR gate (sometimes EOR, or EXOR and pronounced as Exclusive OR) is a
digital logic gate that gives a true (1 or HIGH) output when the number of
true inputs is odd.
• An XOR gate implements an exclusive or ( ) from mathematical logic; that
is, a true output results if one, and only one, of the inputs to the gate is
true.
• The Boolean expression of the XOR gate is:
 Exclusive-NOR Gate
• Exclusive-NOR gate or XNOR gate is formed by combining
the Exclusive-OR gate (XOR gate) and the NOT gate.
• The output of Ex-NOR gate is ‘1’, when both inputs are same.
• The Boolean expression of the XNOR gate:
 NAND Gate is a Universal Gate
• To prove that any Boolean function can be implemented using only NAND
gates, we will show that the AND, OR, and NOT operations can be
performed using only these gates.
Implementing NOT gate using NAND only
Implementing AND gate using NAND only
Implementing OR gate using NAND only
 Implementing NOT Gate using
NAND
(A.A)'=A' (Idempotent Law)
Gate
 Implementing AND Gate using
NAND Gate
((AB)' (AB)')'= ((AB)')' (By Idempotent Law)
= AB (Involution Law)
 Implementing OR Gate using
NAND Gate
((AA)'(BB)')'= (A'B')’ (By Idempotent Law)
= A''+B'' (By De Morgan’s Law)
= A+B (By involution Law)
 Implementing NOT Gate using
NOR
(A+A)'=A' (By Idempotent Law)
Gate
 Implementing AND Gate using
NOR Gate
((A+A)'(B+B)')'= (A'+B')' (By Idempotent Law)
= A’’.B’’ (By De Morgan’s Law)
= A.B (By involution Law)
 Implementing OR Gate using
NOR Gate
((A+A)'+(B+B)')'= (A’.B’)’ (By Idempotent Law)
= A’’+B’’ (By De Morgan’s Law)
= A+B (By involution Law)
 Equivalent Gates
• NAND gate is equivalent to the inverted input OR gate:
• AND gate is equivalent to the inverted input NOR gate
• NOR gate is equivalent to the inverted input AND gate.
• OR gate is equivalent to the inverted input NAND gate:
 Applications of Logic Gates
• Logic gates are used in microcontrollers, microprocessors,
electronic and electrical project circuits, and embedded
system applications. The basic logic gates are categorized
into seven types as AND, OR, XOR, NAND, NOR, XNOR, and
NOT.
• These are used in circuits where various power sources are
available to perform the similar action. Implemented in
alarm systems and intrusion detection equipment's. Used
in industrial plants for some protective measures.
 Minterm and Maxterm
• There are two ways in which we can put the Boolean function.
• These ways are the minterm canonical form and maxterm canonical form.
• The product of all literals, either with complement or without
complement, is known as minterm.
• The sum of all literals, either with complement or without complement, is
known as maxterm.
 Minterm
• A minterm is a specific type of Boolean expression that
represents a unique combination of variables in a truth
table for which the output is TRUE (or '1’).
• Each minterm is an AND (product) of all the input variables
of a function, where each variable is either in its original
(uncomplemented) form or in its complemented (negated)
form.
• For a Boolean function with n variables, there will be 2n
minterms since each variable can be in one of two states (0
or 1) and there are n variables.
• Example:
• Consider a function with 2 variables A and B. The possible
minterms are:
1. A′B′: Corresponds to A=0,B=0
2. A′B: Corresponds to A=0,B=1
3. AB′: Corresponds to A=1,B=0
4. AB: Corresponds to A=1,B=1
• For a 3-variable function with A,B, and C as inputs, there
would be 8 minterms:
1. A′B′C′
2. A′B′C
3. A′BC′
4. A′BC
5. AB′C′
6. AB′C
7. ABC′
8. ABC
Each minterm corresponds to a unique row in the truth table
of the function.
 Maxterm
• A maxterm is a specific type of Boolean expression that
represents a unique combination of variables in a truth
table for which the output is FALSE (or '0'). Each maxterm
is an OR (sum) of all the input variables of a function,
where each variable is either in its original
(uncomplemented) form or in its complemented (negated)
form.
• For a Boolean function with n variables, there will be 2n
maxterms, just like minterms, since each variable can be in
one of two states (0 or 1) and there are n variables.
• Example:
• Consider a function with 2 variables A and B. The possible
maxterms are:
1.(A+B): Corresponds to A=0,B=0
2.(A+B′): Corresponds to A=0,B=1
3.(A′+B): Corresponds to A=1,B=0
4.(A′+B′): Corresponds to A=1,B=1
• For a 3-variable function with A,B, and C as inputs, the possible
maxterms are:
1. (A+B+C)
2. (A+B+C′)
3. (A+B′+C)
4. (A+B′+C′)
5. (A′+B+C)
6. (A′+B+C′)
7. (A′+B′+C)
8. (A′+B′+C′)

Each maxterm corresponds to a unique row in the truth table of

the function.
 Sum of Product(SoP)
• The term "Sum of Products" (SoP) typically refers to a form of
representing Boolean functions. In digital design, Boolean
functions describe how outputs relate to inputs using logic gates.
• In a Sum of Products expression, a function is written as a sum
(logical OR) of product terms (logical ANDs). Each product term is
an AND of literals, where a literal is either a variable or its
negation.
• For instance, consider the Boolean function F for inputs A,B, and C:
F=A′BC+AB′C′+ABC′
• In this example:
1.A′BC is the first product term (or minterm).
2.AB′C′ is the second product term.
3.ABC′ is the third product term.
• All the product terms are ORed together to create the full
SoP expression.
• To determine the function's value:
• For each minterm, if all the literals evaluate to '1' (or true),
then that minterm evaluates to '1'.
• The function's value will be '1' if at least one minterm
evaluates to '1'. If no minterms evaluate to '1', the
function's value is '0'.
• The Sum of Products form is widely used in digital design
because it directly relates to the implementation with AND
and OR gates.
• Consider a function F of inputs A,B, and C:
• To get the SoP expression:
1.Identify the rows where the output F is 1.
2.Write down the product (AND) expression for each of
those rows.
3.Sum (OR) all those product expressions together.
1. Rows where F=1 are:
• A=0,B=0,C=1
• A=0,B=1,C=0
• A=1,B=0,C=0
• A=1,B=1,C=0

2. Product expressions for these rows are:

• A′B′C (Where A′ is the complement of A)
• A′BC′
• AB′C′
• ABC′

3. Summing them together, we get: F=A′B′C+A′BC′+AB′C′+ABC′

 Product of Sum(Pos)
• The term "Product of Sums" (PoS) is another form of
representing Boolean functions, which is opposite to the
Sum of Products (SoP) form. In a Product of Sums
expression, a function is written as a product (logical AND)
of sum terms (logical ORs). Each sum term is an OR of
literals, where a literal is either a variable or its negation.
• For instance, consider the Boolean function G for inputs
A,B, and C: G=(A+B′+C)(A′+B+C′)
• In this example:
1.(A+B′+C) is the first sum term (or maxterm).
2.(A′+B+C′) is the second sum term.
• Both sum terms are ANDed together to create the full PoS
expression.
• To determine the function's value:
• For each maxterm, if any of the literals evaluates to '1' (or
true), then that maxterm evaluates to '1'.
• The function's value will be '1' if all maxterms evaluate to
'1'. If any maxterm evaluates to '0', the function's value is
'0'.
• The Product of Sums form can be derived from a truth
table by looking at the rows where the function is '0' and
writing the sum term (which will be '0' for that row) and
then ANDing all these sum terms together. It's worth noting
that while SoP directly relates to an implementation with
AND and OR gates, PoS does the same but can sometimes
be more concise for certain functions.
• Consider a function G of inputs A,B, and C:
• To get the PoS expression:
1.Identify the rows where the output G is 0.
2.Write down the sum (OR) expression for each of those
rows, such that the ORed expression evaluates to 0 for that
row.
3.Product (AND) all those sum expressions together.

1. Rows where G=0 are:

1.A=0,B=0,C=1
2.A=0,B=1,C=0
3.A=1,B=0,C=0
2. Sum expressions for these rows (OR expressions which
are '0' for that row):
• (A+B+C′) for A=0,B=0,C=1
• (A+B′+C) for A=0,B=1,C=0
• (A′+B+C) for A=1,B=0,C=0

3. Multiplying them together, we get: G=(A+B+C′)(A+B′+C)

(A′+B+C)

This is the PoS expression for the given truth table. It should
be noted that in the PoS form, the product expression will
be '0' if any of the OR expressions inside the parentheses
evaluate to '0'.
 Karnaugh Map
• K-Map was developed by Maurice Karnaugh in the year of
1953.
• A Karnaugh map or a K-map refers to a pictorial method that is utilised to
minimise various Boolean expressions without using the Boolean algebra
theorems along with the equation manipulations.
• A Karnaugh map can be a special version of the truth table.
• We can easily minimise various expressions that have 2 to 4 variables
using a K-map.
 Rules for creating groups in K-
map
• Groups can be vertical or Horizontal but can’t be diagonal.
• Overlapping Allowed.
• Groups should be as large as possible.
• Group must contain 2n cells.
 Solving an Expression Using K-Map
• Here are the steps that are used to solve an expression using the K-
map method:
1. Select a K-map according to the total number of variables.
2. Identify maxterms or minterms as given in the problem.
3. For SOP, put the 1’s in the blocks of the K-map with respect to the
minterms (elsewhere 0’s).
4. For POS, putting 0’s in the blocks of the K-map with respect to the
maxterms (elsewhere 1’s).
5. Making rectangular groups that contain the total terms in the
power of two, such as 2,4,8 ..(except 1) and trying to cover as many
numbers of elements as we can in a single group.
6. From the groups that have been created in step 5, find the product
terms and then sum them up for the SOP form.
 SoP FORM
• 3 variables K-map:
Z = ∑A, B, C (1, 3, 6, 7)
• From the red group, the product term would be — A’C
• From the purple group, the product term would be — AB
• If we sum these product terms, then we will get this final
expression (A’C+AB)
2. 4 variables K-map:
F (P, Q, R, S) = ∑(0, 2, 5, 7, 8, 10, 13, 15)
• From the red group, the product term would be — QS
• From the purple group, the product term would be — Q’S’
• If we sum these product terms, then we will get this final
expression (QS + Q’S’)
• Minimize the following boolean function-
• F(A, B, C, D) = Σm(0, 1, 2, 5, 7, 8, 9, 10, 13, 15)
F(A, B, C, D)= BD + C’D + B’D’
• Minimize the following boolean function-
• F(A, B, C, D) = Σm(0, 1, 3, 5, 7, 8, 9, 11, 13, 15)
F(A, B, C, D)= D + B’C’
• Simplify the following 4-variable Boolean function in SOP form to
obtain the minimal SOP expression.
• F(A,B,C,D)= Σm(0,1,3,5,6,7,10,13,14,15)
• F=A’D+BD+BC+ACD’+A’B’C’
• Minimize: A’B’C’D’+A’B’CD’+AB’C’D’+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’B’CD’+AB’C’D’+AB’C’D+AB’CD+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’B’CD’+BC’D’+BCD’+AB’C’D’+AB’D+AB’CD’
• Minimize: A’B’C’D’+AB’CD’+AB’C’D’+ABCD
• Minimize: A’B’C’D’+A’B’C’D+A’BC’D+A’BCD+ABCD+ABCD’+AB’C’D’+AB’CD’
• Minimize: A’B’C’D’+A’B’C’D+A’B’CD+A’BC’D’+A’BC’D+A’BCD+ABC’D’+ABC’D+ABCD
• Minimize: A’B’C’D’+A’B’CD+A’BC’D’+A’BCD+ABC’D’+ABC’D+ABCD+AB’C’D’+AB’CD
• Minimize: C’+ABCD
 PoS FORM
1. 3 variables K-map
F (A, B, C) = π(0,3,6,7)
• From the purple group, the terms would be- AB
• If we take the complement of these two A’B’
• And then sum up them (A’ + B’)
• From the blue group, the terms would be- BC
• When we take the complement of these terms- B’C’
• And then sum them up (B’ + C’)
• From the red group, the terms would be A’ B’ C’
• If we take the complement of the two terms A B C
• And then sum them up (A + B + C)
• If we take the product of these three terms, then we will
get this final expression – (A’ + B’) (B’ + C’) (A + B + C)
2. 4 variables K-map
F (A, B, C, D) = π (3, 5, 7, 8, 10, 11, 12, 13)
• From the blue group, the terms would be BC’D
• We take their complement and then sum them (B’ +
C+ D’)
• From the purple group, the terms would be AB’C
• We take their complement and then sum them
(A’+B+C’)
• From the red group, the terms would be AC’D’
• We take their complement and then sum them
(A’+C+D)
• From the pink group, the terms would be A’CD
• We take their complement and then sum them
(A+C’+D’)
• Finally, we will express these in the form of the product –
 Don’t Care Condition
• One of the very significant and useful concepts in simplifying the output
expression using K-Map is the concept of “Don’t Care”.
• The “Don’t Care” conditions allow us to replace the empty cell of a
K-Map to form a grouping of the variables which is larger than that of
forming groups without don’t care.
• A Don’t Care cell can be represented by a cross(X) or minus(-) or phi(Φ)
in K-Maps representing an invalid combination.
• A Don’t Care cell can be represented by a cross(X) or
minus(-) or phi(Φ) in K-Maps representing an invalid
combination.
Minimize the following function in SOP minimal form
using K-Maps: F(A, B, C, D) = m(1, 2, 6, 7, 8, 13, 14,
15) + d(3, 5, 12)
• Therefore,
f = AC'D' + A'D + A'C + AB
• SOP Form: BC’+A’C’D+ABD+A’CD’

Take Complement

POS Form: (B’+C)(A+C+D’)(A’+B’+D’)(A+C’+D)

Minimize F(A,B,C,D) = m(0,1,2,3,4,5) +
d(10,11,12,13,14,15) in POS minimal form
The POS form of the given function is:
F(A,B,C,D) = M(6,7,8,9) + d(10,11,12,13,14,15)
• SOP Form: A+BC

Take Complement

POS Form: A’(B’+C’)

• Minimize the following boolean function-
• F(A, B, C, D) = Σm(1, 3, 4, 6, 8, 9, 11, 13, 15) + Σd(0, 2, 14)
F(A, B, C, D)= AD + B’D + B’C’ + A’D’
• Minimize the following boolean function-
• F(A, B, C) = Σm(1, 2, 5, 7) + Σd(0, 4, 6)
F(A, B, C)= B’ + A + C’
 Combinational Logic Circuits
• Combinational logic circuits are a fundamental category of
digital circuits wherein the outputs are solely determined
by the current inputs, with no memory or feedback from
past states.
• These circuits rely on the combination of logic gates to
produce a specific output based on input combinations.
 Characteristics of Combinational
Logic Circuits
• No Memory: The output depends only on the current values of the
inputs. There's no internal state or memory of previous inputs.

• Instantaneous Output: As soon as the inputs change, the outputs will start
to change. There might be a tiny propagation delay due to the physical
characteristics of the gates, but this delay is ideally minimized.
 Types of Combinational Logic
Circuits
• Multiplexers (MUX): They select one of many inputs to forward to the output
based on a set of selection lines.
• Demultiplexers (DEMUX): The opposite of a MUX; it takes a single input and
routes it to one of many outputs.
• Encoders: Converts an N-bit input code to a binary code of M bits where M < N.
• Decoders: The opposite of an encoder. It converts an N-bit input into a
maximum of 2^N outputs.
• Adders: Used to add two binary numbers. The simplest form is the half adder,
which can be expanded to a full adder, and then multiple full adders can be
chained to create multi-bit adders.
• Comparators: These circuits compare two binary numbers to determine equality
or which one is greater.
 Sequential Logic Circuits
• Sequential logic circuits are a type of digital circuits where
the output is not only dependent on the current inputs but
also on the past history of inputs.
• This memory of past inputs gives rise to the concept of a
"state" in sequential circuits, allowing them to be used for
more complex applications compared to combinational
circuits.
 Characteristics of Sequential
•
Logic Circuits
Memory: Sequential circuits have memory elements that store information
about past inputs, allowing the output to be dependent on both current and
past inputs.

• State: These circuits can exist in one of a number of different states,

determined by the values stored in their memory elements.

• Clock Signal: Many sequential circuits are synchronized by a clock signal, which
controls when the circuit can transition from one state to another.
 Types of Sequential Logic
Circuits
• Flip-Flops: The simplest memory elements, storing a single bit of information.
Types include SR, JK, D, and T flip-flops.
• Registers: Groups of flip-flops used to store multi-bit values.
• Counters: Sequential circuits that increment or decrement a number stored in
a register, often in response to a clock signal.
• Shift Registers: A series of flip-flops where the output of one flip-flop is the
input of the next.
 Adder
• An adder is a digital circuit that performs addition of numbers.
• In many computers and other types of processors, adders are used
not only in the arithmetic logic units but also in other parts of the
processor, where they compute addresses, table indices, and similar
operations.
• There are several types of adder designs, including:
 Half Adder
 Full Adder
 Ripple Carry Adder
 Carry Lookahead Adder (CLA)
 Carry Select Adder
 Carry Skip Adder
 Binary Coded Decimal (BCD) Adder
 Half Adder
• The half adder is a basic building block for more complex adder circuits such as
full adders and multiple-bit adders.
• It performs binary addition of two single-bit inputs, A and B, and provides two
outputs, SUM and CARRY.
• The SUM output is the least significant bit (LSB) of the result, which is the XOR
of the two inputs A and B.
• The CARRY output is the most significant bit (MSB) of the result, indicating
whether there was a carry-over from the addition of the two inputs. The
CARRY output is the AND of the two inputs A and B.
• Sum = A XOR B
• Carry = A AND B
 Advantages of Half Adder
• The half adder, while simple on its own, forms a
fundamental building block for designing more complex
digital addition circuits.
• For example, two half adders can be combined with an OR
gate to create a full adder, which can then be used to
construct multi-bit binary adders like the ripple-carry
adder.
 Limitations of Half Adder
• The half adder cannot accept a carry input from a previous
stage. Hence, it's only useful for adding the least
significant bits in a multi-bit binary addition where there is
no carry input. For all other bits, a full adder, which can
handle a carry input, is used.
Half Adder using NAND Gates
only
Half Adder using NOR Gates
only
 Full Adder
• The half adder is used to add only two numbers. To overcome this
problem, the full adder was developed. The full adder is used to add three
1-bit binary numbers A, B and Carry C. The full adder has three input
states and two output states i.e., Sum and Carry.
• Sum=x’y’z+xy’z’+x’yz’+xyz = x y z

• Carry=xy+xz+yz = (x y)z+xy
 Half Subtractor
• The half subtractor is also a building block for subtracting
two binary numbers.
• It has two inputs and two outputs. This circuit is used to
subtract two single bit binary numbers A and B. The 'diff'
and 'borrow' are two output states of the half subtractor..
In the subtraction (A-B), A is called a Minuend bit and B is called
as Subtrahend bit.
The Boolean expression of the Half Subtractor circuit is
given below:
• Diff= A XOR B (A⊕B)
• Borrow= not-A AND B (A'.B)
Half Subtractor using NAND
Gates only
Half Subtractor using NOR
Gates only
 Full Subtractor
• The Half Subtractor is used to subtract only two numbers. To overcome
this problem, a full subtractor was designed. The full subtractor is used to
subtract three 1-bit numbers A, B, and C, which are minuend, subtrahend,
and borrow, respectively. The full subtractor has three input states and
two output states i.e., diff and borrow.
Diff(D) = x ⊕ y ⊕ z

Borrow (out) = (x ⊕ y )’z+x’ y

 Parallel Binary Adder/Ripple
Adder
• A single full adder performs the addition of two one bit numbers and an
input carry.
• But a Parallel Adder is a digital circuit capable of finding the
arithmetic sum of two binary numbers that is greater than one bit in
length by operating on corresponding pairs of bits in parallel.
• It consists of full adders connected in a chain where the output carry
from each full adder is connected to the carry input of the next higher
order full adder in the chain.
• A n bit parallel adder requires n full adders to perform the operation. So
for the two-bit number, two adders are needed while for four bit number,
four adders are needed and so on.
 Parallel Subtractor
• A Parallel Subtractor is a digital circuit capable of finding the arithmetic
difference of two binary numbers that is greater than one bit in length by
operating on corresponding pairs of bits in parallel.
• The parallel subtractor can be designed in several ways including
combination of half and full subtractors, all full subtractors or all full
adders with subtrahend complement input.
 Advantages of Parallel
Adder/Subtractor
• The parallel adder/subtractor performs the addition operation faster as
compared to serial adder/subtractor.
• Time required for addition does not depend on the number of bits.
• The output is in parallel form i.e all the bits are added/subtracted at the
same time.
• It is less costly.
 Disadvantages of Parallel
Adder/Subtractor
• Each adder has to wait for the carry which is to be generated from the
previous adder in chain.
• The propagation delay( delay associated with the travelling of carry bit) is
found to increase with the increase in the number of bits to be added.
 4-bit binary Adder-Subtractor
• In Digital Circuits, A Binary Adder-Subtractor is capable of both the
addition and subtraction of binary numbers in one circuit itself.
• The circuit consists of 4 full adders since we are performing operations on
4-bit numbers. There is a control line K that holds a binary value of either
0 or 1 which determines that the operation is carried out is addition or
subtraction.
A B =AB’ + A’B

A 0 =A.0’ + A’.0 = A

A 1=A.1’ + A’.1 = A’

Note: If C=0, the circuit work as Adder.

If C=1, the circuit work as Subtractor.