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Adc

The document discusses interfacing Digital-to-Analog (DAC) and Analog-to-Digital (ADC) converters without a peripheral controller, detailing circuit realizations and practical implementations. It includes programming examples for generating a continuous RAMP waveform and interfacing techniques for ADC using status checks. Various ADC conversion techniques, such as counter type and successive approximation, are also covered, highlighting their operational principles and applications.

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3 views

Adc

The document discusses interfacing Digital-to-Analog (DAC) and Analog-to-Digital (ADC) converters without a peripheral controller, detailing circuit realizations and practical implementations. It includes programming examples for generating a continuous RAMP waveform and interfacing techniques for ADC using status checks. Various ADC conversion techniques, such as counter type and successive approximation, are also covered, highlighting their operational principles and applications.

Uploaded by

2024pd0004
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 17

Interfacing DAC/ADC

without Peripheral Controller


D/A converter
FS

7
6
Digital

Analog output
D2 Vo 5 LSB
to 4
D1
Analog 3
Analog Output 2
D0
Converter 1
0
000 001 010 011 100 101 110 111

Digital Inputs

• FullScaleOutput=(FullScaleValue – 1LSBValue)
• 1MSB Value=1/2 * FSV
Circuit Realization
2.5K 4K
D3=8

5K
D2=4 Vout
10K
D1=2

20K
D0=1

• Vo= Vref/R * ( A1/2+ A2/4+…An/2n)


• Vo is proportional to values of Data Bits Value
Practical DAC : R-2R ladder
network
• Resistive Ladder Network • Require two type Resistor
R
• But small value
2R
– 5K and 10K
R Vout
+
E R
2R
G
I
S 2R
R
Resistor
T
E R R+R=2R
R 2R

2R||2R=R
Interfacing 8-bitDAC with 8085
• Design an output port with Address FFH to
interface 1408 DAC
• Write a program to generate a continuous
RAMP waveform

Output

Time
Interfacing Diagram
A15 A7
Address Bus
(16bit)
A6
A0
A5
A4
A3
A2
A1
A0
8085
MPU
D7
LE
D6
D5
D4 74LS373
D7
Data Bus (8bit) 1408
D3 Latches
D0
D2
D1
D0
Program to generate continuous
RAMP waveform
MVI A, 00H ; Load Acc with first I/P
DTOA: OUT FFH ; Output to DAC
MVI B, COUNT ; Setup Reg. for Delay
DCR B
JNZ DELAY
INR A ; Next Input
JMP DTOA ; Go back to Output

Slope of RAMP can be varied by changing Delay


Analog to Digital Conversion
111
110

Digital output
Vi D2 101 LSB
Analog to 100
Analog Analog D1 011
Input Converter 010
D0
001
000
0 1 2 3 4 5 6 7
Analog Input

• ADC are slower then DAC


• Interfaced using Status Check
A/D Conversion Techniques
• Counter or Tracking ADC
• Successive Approximation ADC
– Most Commonly Used
• Parallel or Flash ADC
– Fast Conversion
Counter Type ADC
• Block diagram • Operation
– Reset and Start Counter
Control
– DAC convert Digital output of
Clock Logic Counter Counter to Analog signal
– Compare Analog input and
Output of DAC
• Vi < VDAC
DAC – Continue counting
Vi
• Vi = VDAC
– Stop counting
• Waveform
– Digital Output = Output of
Counter
• Disadvantage
– Conversion time is varied
• 2n Clock Period for Full Scale
input
Successive Approximation ADC
• Most Commonly used in medium
to high speed Converters
• Based on approximating the
input signal with binary code and
then successively revising this
approximation until best
approximation is achieved
• SAR(Successive Approximation
Register) holds the current binary
value
03/18/25
Generic ADC
Vinput

A/D Digital O/P

Converter
START RD

Ready
Start
Interface ADC using Status Check
A15 Vinput
Address Bus
A0 (16bit)
Digital O/P Tri-State
A/D Buffer
Converter
START RD
A7
Ready
8085
A6
Start
MPU A5
A4 IO/W
A3 82H
E1 E2 E3
D7
Data Bus (8bit) o2
D0
74
LS o1 81H
138 IO/R
o0 80H
Program to Interface ADC
OUT 82H ; Start Conversion
TEST: IN 80H ;Read DR Status
RAR ; Rotate Do to carry
JC TEST ; if Do==1 conv. done
IN 81H ; Read the output
RET ; Return
Reference
• R S Gaonkar, “Microprocessor Architecture”, Unit II preface,
Chapter 13
Thanks

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