Advanced Computer

Architecture
Unit-2
Contents
Instruction Set:
1. Characteristics
2. Operand Types
3. Operation Types
4. Addressing Modes
5. Instruction formats
CPU:
Computer Arithmetic operations:
6. ALU
7. Integer Representation and Arithmetic
8. Floating Point Representation and Arithmetic.
Instruction Cycle State Diagram
 1. Characteristics
Elements of an Instruction
• Operation code (Op code)
– Specifies the operation to be performed (e.g. ADD)
• Source Operand reference
– The operation involves one or more source operands
• Result Operand reference
– The operation may produce a result
• Next Instruction Reference
– Tell the processor to fetch next instruction...
 Simple Instruction Format

Op-codes are represented by abbreviations called mnemonics that

indicate the operation
ADD add
SUB subtract
MUL multiply
LOAD load the data from memory
STOR store the data to memory
 Instruction Types
• Data processing
• Data storage (main memory)
• Data movement (I/O)
• Program flow control
 Number of Addresses
• 3 addresses
– Operand 1, Operand 2, Result
– a = b + c;
• 2 addresses
– One address doubles as operand and result
– a=a+b
• 1 address
– Implicit second address
– Mul B
• 0 (zero) addresses
– All addresses implicit
– Uses a stack
– PUSH, POP
 Instruction Set Design
• Operation repertoire
– How many ops?

– What can they do?

– How complex are they?

• Data types

• Instruction formats
– Length of op code field

– Number of addresses

• Registers
– Number of CPU registers available

– Which operations can be performed on which registers?

• Addressing modes

RISC Vs CISC
 2. Types of Operand
The category of data are
• Addresses
• Numbers
– Binary Integer/ Binary floating point, Decimal
• Characters
– ASCII etc.
• Logical Data
– Bits or flag
 3. Types of Operation
• Data Transfer
• Arithmetic
• Logical
• Conversion
• I/O
• System Control
• Transfer of Control
 Data Transfer
• Specify
– Source
– Destination
– Amount of data

• May be different instructions for different movements

Or one instruction and different addresses
 Arithmetic
• Add, Subtract, Multiply, Divide
• Signed Integer
• Floating point ?
• May include
– Increment (a++)
– Decrement (a--)
– Negate (-a)
– Absolute
 Logical
• Bitwise operations
• AND, OR, NOT
Conversion
• E.g. Binary to Decimal

Input/Output
• May be specific instructions
• May be done using data movement instructions (memory
mapped)
• May be done by a separate controller (DMA)
Shift and Rotate Operations
 Systems Control
• Privileged instructions
• CPU needs to be in specific state
– Ring 0 on 80386+
– Kernel mode
• For operating systems use
 Transfer of Control
• Branch
– e.g. branch to x if result is zero
• Skip
– e.g. increment and skip if zero
– ISZ Register1
– Branch xxxx
• Subroutine call
– interrupt call
Branch Instruction
Nested Procedure Calls
Use of Stack
Stack Frame Growth Using Sample
Procedures P and Q
 4. Addressing Modes
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack
 Immediate Addressing
• Operand is part of instruction
• Operand = address field
• e.g. ADD 5
– Add 5 to contents of accumulator
– 5 is operand
• No memory reference to fetch data
• Fast
• Limited range
Immediate Addressing Diagram
Instruction

Opcode Operand
 Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
– Add contents of cell A to accumulator
– Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out effective address
• Limited address space
 Direct Addressing Diagram

Instruction

Opcode Address A
Memory

Operand
 Indirect Addressing
• Memory cell pointed to by address field contains the address
of (pointer to) the operand
• EA = (A)
– Look in A, find address (A) and look there for operand
• e.g. ADD (A)
– Add contents of cell pointed to by contents of A to
accumulator
 Indirect Addressing Diagram
Instruction

Opcode Address A
Memory

Pointer to operand

Operand
 Indirect Addressing
• Large address space
• 2n where n = word length
• May be nested, multilevel, cascaded
– e.g. EA = (((A)))
• Multiple memory accesses to find operand
• Hence slower
 Register Addressing
• Operand is held in register named in address filed
• EA = R
• Limited number of registers
• Very small address field needed
– Shorter instructions
– Faster instruction fetch
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
– Requires good assembly programming or compiler writing
 Register Addressing Diagram
Instruction

Opcode Register Address R

Registers

Operand
 Register Indirect Addressing
• EA = (R)
• Operand is in memory cell pointed to by contents of register R
• Large address space (2n)
• One fewer memory access than indirect addressing
Register Indirect Addressing Diagram
Instruction

Opcode Register Address R

Memory

Registers

Pointer to Operand Operand

 Displacement Addressing
• EA = A + (R)
• Address field hold two values
– A = base value
– R = register that holds displacement
– or vice versa
Displacement Addressing Diagram
Instruction

Opcode Register R Address A

Memory

Registers

Pointer to Operand + Operand

 Displacement Addressing
Three commonly used displacement addressing
• Relative addressing
• Base-register addressing
• Indexing
 Relative Addressing
• A version of displacement addressing
• R = Program counter, PC
• EA = A + (PC)
• i.e. get operand from A cells from current location pointed to
by PC
• locality of reference & cache usage
 Base-Register Addressing
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86
 Indexed Addressing
• A = base
• R = displacement
• EA = A + R
• Good for accessing arrays
– EA = A + R
– R++
 Combinations
• Postindex
• EA = (A) + (R)

• Preindex
• EA = (A+(R))
 Stack Addressing
• Operand is (implicitly) on top of stack
e.g.
– ADD Pop top two items from stack
and add
 5. Instruction Formats
• Layout of bits in an instruction
• Includes opcode
• Includes (implicit or explicit) operand(s)
• Usually more than one instruction format in an instruction set
 Instruction Length
• Affected by and affects:
– Memory size
– Memory organization
– Bus structure
– CPU complexity
– CPU speed
• Trade off between powerful instruction repertoire and saving
space
 Allocation of Bits
• Number of addressing modes
• Number of operands
• Register versus memory
• Number of register sets
• Address range
• Address granularity
6. ALU Inputs and Outputs
 7. Integer Representation and arithmetic

• Only have 0 & 1 to represent everything

• Positive numbers stored in binary
– e.g. 41=00101001
• No minus sign
• Sign-Magnitude
• Two’s compliment
 Sign-Magnitude
• Left most bit is sign bit
• 0 means positive
• 1 means negative
• +18 = 00010010
• -18 = 10010010
• Problems
– Need to consider both sign and magnitude in arithmetic
– Two representations of zero (+0 and -0)
 Two’s Compliment

• +3 = 00000011
• +2 = 00000010
• +1 = 00000001
• +0 = 00000000
• -1 = 11111111
• -2 = 11111110
• -3 = 11111101
 Range of Numbers
• 8 bit 2s compliment
– +127 = 01111111 = 27 -1
– -128 = 10000000 = -27
• 16 bit 2s compliment
– +32767 = 011111111 11111111 = 215 - 1
– -32768 = 100000000 00000000 = -215
 Conversion Between Lengths
• Positive number pack with leading zeros
• +18 = 00010010
• +18 = 00000000 00010010
• Negative numbers pack with leading ones
• -18 = 10010010
• -18 = 11111111 10010010
• i.e. pack with MSB (sign bit)
 Addition and Subtraction
• Normal binary addition
• Monitor sign bit for overflow

• Take twos compliment of subtrahend and add to minuend

– i.e. a - b = a + (-b)

• So we only need addition and complement circuits

Hardware for Addition and Subtraction
 Multiplication Example

• 1011 Multiplicand (11 dec)

• x 1101 Multiplier (13 dec)
• 1011 Partial products
• 0000 Note: if multiplier bit is 1 copy
• 1011 multiplicand (place value)
• 1011 otherwise zero
• 10001111 Product (143 dec)
• Note: need double length result
Unsigned Binary Multiplication
Execution of Example
Flowchart for Unsigned Binary
Multiplication
 Multiplying Negative Numbers
• This does not work!
• Solution 1
– Convert to positive if required
– Multiply as above
– If signs were different, negate answer
• Solution 2
– Booth’s algorithm
Booth’s Algorithm
Example of Booth’s Algorithm
 Division
• More complex than multiplication
• Negative numbers are really bad!
• Based on long division

Division of Unsigned Binary Integers

00001101 Quotient

Divisor 1011 10010011 Dividend

1011
001110
Partial
1011
Remainders
001111
1011
Remainder
100
Flowchart for Unsigned Binary Division
 8. Floating point representation and
arithmetic

• +/- .significand x 2exponent

• Misnomer
• Point is actually fixed between sign bit and body of mantissa
• Exponent indicates place value (point position)
Floating Point Examples
 Signs for Floating Point
• Mantissa is stored in 2s compliment
• Exponent is in excess or biased notation
– e.g. Excess (bias) 128 means
– 8 bit exponent field
– Pure value range 0-255
– Subtract 128 to get correct value
– Range -128 to +127
 Normalization
• FP numbers are usually normalized
• i.e. exponent is adjusted so that leading bit (MSB) of mantissa
is 1
• Since it is always 1 there is no need to store it
• (c.f. Scientific notation where numbers are normalized to give
a single digit before the decimal point
• e.g. 3.123 x 103)
IEEE 754 Formats
 FP Arithmetic +/-

• Check for zeros

• Align significands (adjusting exponents)
• Add or subtract significands
• Normalize result
FP Addition & Subtraction Flowchart
 FP Arithmetic x/

• Check for zero

• Add/subtract exponents
• Multiply/divide significands (watch sign)
• Normalize
• Round
• All intermediate results should be in double length storage
Floating Point Multiplication
Floating Point Division
End of Unit-2