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Class 10-11

The document provides an overview of various instructions used in microprocessor programming, focusing on jump, call, return, load effective address, and string instructions. It explains the differences between jump and call instructions, the types of jumps (conditional, unconditional, short, near, far), and how effective addresses are loaded. Additionally, it discusses string data transfers, input/output instructions, and the concept of interrupts in microprocessor applications.

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Ashish Goyal
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0% found this document useful (0 votes)
3 views70 pages

Class 10-11

The document provides an overview of various instructions used in microprocessor programming, focusing on jump, call, return, load effective address, and string instructions. It explains the differences between jump and call instructions, the types of jumps (conditional, unconditional, short, near, far), and how effective addresses are loaded. Additionally, it discusses string data transfers, input/output instructions, and the concept of interrupts in microprocessor applications.

Uploaded by

Ashish Goyal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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MPI Class 10 &11

Dated:25 Jan 2024


th

Jump ,Call Return,, Load


effective ,String and other instructions
Interrupts
JUMP Instructions
The continuous flow of executing a program changes
sometimes depending on some decisions.
When using CMP or TEST , Where we are comparing
two values, arithmetically or logically we have to go to
another program at other memory location , skipping
present program, depending on the outcome value of
CMP or TEST Instruction.
This is known as Jumping or Jump instruction.
When jump instruction is executied.IP automatically
What happens with jump
instruction.?
The microprocessor stops executing the present program and
Jumps to another memory location , as per the instructions given
In the program, where another program is available.

Then microprocessor executes this new program at new memory


location .
Whether microprocessor comes back to old program after
executing new program ?
No It is not possible with Jump Instructions-In CALL it will come
back
instruction pointer loaded with new memory location ,
automatically, when jump instruction is accepted.
• 10000:2000 xxx
Small Example
• 10000:2002 yyyy
• 10000:2005 yyyy
• 10000:2007zzz
• 10000:2009
• 10000:200A
• 10000:200D
• 10000:2010 JUMP 2050 instruction here suggesting to jump to 2500
memory location
• Then Instruction pointer shows next instruction as 2500 but not 2012.
• 10000:2012
• 10000:2014
• 10000:2050 xxx
Call and Return

This instruction is some what similar


to C++ functions.
In this case also microprocessor jumps
to new location and executes it and
after that return back to old program
What happens in C++,when function
is executed ?
Two Types of Jumps

• Conditional and unconditional


• In unconditional jump no need to check any
condition just like that jump
• In conditional jumps check the condition if it
is satisfied then only jump otherwise continue
the present program : Like If Else in C++
• THREE TYPES , depending upon the distance to new
memory location from the present executing memory
location
• SHORT
• NEAR
• FAR JUMP
• How to know present memory address of program ?
Classification of Jumps

• SHORT JUMP
• 2 BYTE INSTRUCTION
• WITHIN +127 OR -128 BYTES FROM PRESNET
LOCATION
• NEAR JUMP
• 3 BYTE INSTRUCTION
• WITHIN +OR – 32 K BYTES FROM PRESENT LOCATION
• FAR JUMP
• 5 BYTE INSTRUCTION
• ANY MEMORY LOCATION NO RESTRICTION
INTRASEGMENT & INTERSEGMENT
JUMPS

Short ant Near are Intersegment as they are within the


same segment
Far Jump Inter Segment as it is not within the same
segment.
2/3/5 Byte Instructions
• SHORT/RELATIVE JUMP 2BYTES
• ONE BYTE OPCODE AND ONE BYTE FOR
DISPLACEMET ADDRESS
• NEAR JUMPT 3 BYTES
• ONE BYTE OPCODE AND 2 BYTES DISPLACEMENT
HIGH & LOW
• FAR JUMP 5 BYTES
• 1 BYTE OPCODE + 2BYTES SEGMENT + 2 BYTES
OFFESET/DISPLACEMENT
• FIGURE 6.1 BREY BOOK LET
• In short jump and near jump segment address never
changes
• In far jump segment address changes
• Short & near new offset/IP address/displacement
• Far jump new segment and new
offset/IP/displacement address
CONDITIONAL JUMPS
• A condition will be tested before jumping
• If condition satisfies then only jumping other wise no
jumping
• Example:
• JC jump on carry
• check carry bit 1 ,then jump
• JE or JZ check if equal or zero then only check
• JNC jump on no carry =0
6-3 PR0CEDURES -CALL
• Call And Return
• In Call ,jumps to another Location And Comes Back To The
Same Program, after executing program at new location
• In jump Program Goes To New Location And Never Comes
Back To Old Location
• Return Compulsory In Call Program
• Near Call Once Again Distance + Or – 32k
• Far Call Any Where
• Different Addressing Modes Are Acceptable
• All seven addressing methods are acceptable
LAST BUT NOT LEAST
• Don’t Forget That IP Always Tells Where Is
Next Executable Instruction Available:
• In Case Of All Jumps All Loops All Calls IP
Address Automatically Changes
• In Case Of Call IP Restores Old Address Back
• With the help of stack
• Stack helps in storing old details
GROUP ONE
• Load effective instructions
Instructions dealing with address
• So far discussed different instructions dealing
with data only.
• But in microprocessor and other computer
applications, sometime it is required to copy or
transfer address of a memory location from one
place to other place.
• In this context there are few load instructions
available in 8086 dealing with address of a
memory location , offset address and or
segment address.
4.3 Load Effective Address
• These instructions will load address of a memory
location not dealing with data
• LEA: Load effective address : loads a 16or 32 bit
register with the offset address of the data specified by
the operand
• LDS,LES,LFS,LGS,LSS : load any 16 bit or 32 bit register
with an offset address and the DS,ES,FS, GS & SS
segment register with a segment address.
• First let us discuss with the LEA Instructions
Load Effective Address : LEA
LEA: Load Effective Address: Loads 16 bit register with
the offset address specified by operand
• LEA AX, NUMB: The AX register is loaded or stored
with the offset address of Memory location named as
NUMB
MOV AX, GLOBALVAR ; fetch the value of
GLOBALVAR into AX
LEA AX, GLOBALVAR ; fetch the address of
GLOBALVAR into AX
LEA EAX,NUMB
MOV and LEA comparison
• LEA BX,[DI]
• Load offset address specified by [DI]
contents into BX register
• MOV BX.[DI]: This instruction loads the data
at the memory addressed of [DI ] into BX
register
• LEA AX,NUMB load AX with offset address
of NUMB
LDS-LES-LSS
• LDS: DI LIST
• Load DS & DI : load DS &DI 32 bit contents of data
segment memory location LIST
• LES BX,CAT
• load ES & BX 32 bit contents of data segment memory
location CAT
• LSS DI,DATA 1
• load SS & DI or place 32 bit contents of data segment
memory location DATA1
• LFS,LGS are similar
LDS BX,[DI]
• DS initial value = 1000
• BX initial value = 6F2A
• Before executing the above instruction LDS BX,[DI]
• Take full address of memory location shown by DI register
• DI Value = 1000
• The corresponding segment is data segment DS
• To find a memory location Segment address+ offset
address
• 10000+1000 =11000
Data in four memory locations
• 11003 30
• 11002 00
• 11001 12
• 11000 7a
• Now what to do
• Load DS =3000
• Load BX=127A
• BEFORE EXECUTING THIS INSTRUCTION
• DS = 1000 BX =6F2A
• AFTER EXECUTING THIS INSTRCUTION
• DS VALUE = 3000 BX VALUE =127A
• This is LDS BX,[DI]
• Page no:129 Figure 4.17 brey book
LDS,LES,LFS,LGS,LSS
• LDS: DS SEGMENT
• LES:EXTRASEGMENT
• LFS: FS SEGMENT
• LSS: STACK SEGEMENT
• LFS LGS LSS 386 ONLY
String Instructions
• String Instructions deals with a group of data
not a single byte known as a block data.
• In C++ like Array , which deals with group of
data, here also some instructions deals with a
continuous group of data known as string.
• One article in 4th Chapter and another article
in 5th Chapter discussing about string data.
4.4 STRING DATA TRANSFERS
• FIVE INSTRUCTIONS Available For String Data Transfer
• LODS,STOS,MOVS,INS, OUTS
• What they will do?
• Transfers Byte/Word/Double Word Or Repeat
• Any helping flags available here?
• Direction flag selects auto increment(D=0) or auto decrement(D=1)
operation for DI & SI register during string operations
• Direction flag is using only with string operations
CLD: instruction clears direction flag &STD sets D Flag into 1.
• Whenever a string instruction transfer a byte data,
then
• DI and or SI registers automatically incremented or
decremented by one number as selected by you with
D Flag.
• If a word is transferred then ? Incremented or
decremented by twice.
• Similarly double word 4times and Quad word 8 times
• During the execution string instructions , memory
access occur through either or both DI and SI registers
LODS
• This Instruction transfers or loading into AL,AX,EAX with data
stored at the data segment offset address indexed by the SI
register.
• After loading AL by a byte or AX by a word the contents of SI
increment if D=0 or decrement if D=1.
• SI data INC by once for byte twice for word or
• SI data DEC by once for byte twice for word
• LODSB = AL=DS:[SI] SI = + or – 1
• LODSW = AX=DS:[SI] SI = + or – 2
• Here the source is SI and Destination is Accumalator
STOS
• This instruction is similar to LODSB but in
converse.
• Here data is stored from Accumalator into DI
• STOS instruction stored AL,AX,EAX at extra
segment memory location given by DI register
• STOSB ES:[DI] = AL DI=DI+OR -1
• STOSW ES:[DI] = AX DI=DI+ OR -2
• Source: Accumulator Destination DI
DI & SI– LODS INSTRUCTION
• During the execution of string instruction, memory
access occur through DI & OR SI registers.
• DI to access in extra segment & SI to access data
segment.
• LODSB AL= DS:[SI] SI =SI+/- 1
• LODSW AX= DS:[SI] SI = SI= SI+/-2
• STOSB ES:[DI] = AL ; DI=DI+/- 1
• STOSW ES:[DI] = AX ; DI =DI+/-2
• MOVS,INS,OUTS NOT IN 8086
• When general move instructions are
there why these two load and store are
required?
• In what way they are differ from general
move instructions ?
Other Instructions
• XCHG: Exchanges contents of a register with the
contents of any other register or memory location
• Example: XCHG AL,CL AL and CL are exchanges
• XCHG CX,BP XCHG AL,DATA2
• LAHF & SAHF To translate 8085 Software to
8086 Software through a translation program.
• XLAT: Converts the contents of the AL register
into a number stored in a memory table. Useful in
seven segments display and other applications.
Group Five -IN & OUT instructions
• These instructions to get into and out of microprocessor
from externally connected I/O devices.
• To Connect I/O devices microprocessor needs electronic
arrangement known as ports
• The data is transferred like this:
• MP –PORTS-I/O Devices : both directions possible
But no ports available with microprocessor ;Then Kaisa ?
Out source: Take the help from external sources like
memory
Microprocesso Will give you External interfacing gadgets
r required ports

8086 82C55 I/O Devices


Group Four – IN & OUT instructions
• These instruction are used to transfer data between
microprocessor and external I/O devices.
• IN : Brings data from I/O device into microprocessor
• OUT: transfers data from microprocessor to I/O Device.
• In Microprocessor the transfer takes place through
accumulator registers AL.AH,AX
• Two different methods: Fixed Port and Variable Port
• These are very important for interfacing applications
Examples
• IN AL p8 - 8 bit data is transferred into
microprocessor from I/O Port 8
• IN AX p8- 16 bit data is transferred into
microprocessor from I/O Port 8
• OUT p8,AL -8 bit data is transferred from
microprocessor into port 8
• OUT p8,AX- 16bit data is transferred from
microprocessor into port 8
• Here port address is fixed: if you want you can hava
variable port address
Variable port address
• The port address can be stored in DX register. So that
through program, DX value and subsequently port
address changes.
• In AL,DX IN AX,DX
• OUT DX,AL OUT DX,AX
• P8 8 BIT I/O PORT NUMBER OOOOH TO OOFFH
• SIXTEEN BIT I/O PORT NUBER IN DX OOOO TO FFFFH
• COM in your desktop ?
–String Comparison Instructions-V
chapter – 5.6
• So far discussed about string copying instruction in IV
Chapter
• Few More string instructions are available in V chapter
• The string data is compared with one number or with
another string:
• Two Instructions are available
• SCAS
• CMPS
SCAS-String scan instruction
• Compares the AL register with a byte in a block of memory
• Or AX register with a word in a block of memory
• Subtracts memory data from AL or AX similar to comparison
• No Flags effected and no Change in Memory or register data
• SCASB for byte
• SCASW for word comparison
• Direction flag automatically increases /decreases the DI
register similar to other string operations
Example
• 100 bytes are stored in a block of
memory
• You want to check one particular byte is
there or not.

• Similar to Control F in MS office


CMPS
• Similar to SCAS but comparison of two strings
• COMPARE STRING INSTRUCTION:
• COMPARES TWO SECTIONS OF MEMORY
DATA :8/16/32/64
• The contents of data segment memory location
addressed by SI are compared with the contents of
extra data segment memory location addressed by
DI
• After each comparison SI & DI auto increases or
decreases
INTERRUPTS
• 256 small programs available in microprocessor. They will
help the programmer in case of emergency or when some
trouble comes.
• Some of the programs automatically activates on their own
and some of them , programmer to activate.
• These are pre written programs just to help the
programmer whenever there is a trouble.
• The address of this program is available In four memory
locations
• So total 1K memory is allotted to the memory locations of
these programs
• These are known as interrupts and memory
address of each program is known as interrupt
vector and the person doing this whole
procedure is known as interrupt service
procedure

• The best example for interrupt is return button


of our system which restores all initial conditions
Interrupt means
emergency
The meaning of ‘interrupts’ is to
break the sequence of operation.
While the CPU is executing a
program,
on ‘interrupt’ breaks the normal
sequence of execution of
instructions, diverts its execution
to some other program called
Interrupt is one of the most
important features in the
microprocessor applications.
Consider a microprocessor
system receiving data and
change in status from I/O port
or device. There are two
methods available to obtain
POLLING
METHOD
In POLLING method, the microprocessor
continuously monitors the status of a
given device; when the status condition is
met, it performs the service. After that, it
moves on to the next device until each
one is serviced.
Although polling can monitor the status of
several devices and serve each of them if
certain conditions are met.
INTERRUPT
METHOD
• In INTERRUPT method, whenever any device
needs service from microprocessor, the
device notifies to processor by sending
signal (called interrupt). Upon receiving an
interrupt signal, the microprocessor holds
whatever it is doing and serves the
corresponding device. The program
associated with the interrupt is called the
interrupt service routine(ISR) or interrupt
handler
What
happens?
Whenever an interrupt occurs the
processor completes the execution of
the current instruction and starts the
execution of an Interrupt Service Routine
(ISR) or Interrupt Handler. ISR is a
program that tells the processor what to
do when the interrupt occurs. After the
execution of ISR, control returns back to
the main routine where it was
From Where interrupt
comes ?
An 8086 interrupt can come from any one the three
sources:
1. External signal: An 8086 can get interrupt from an
external signal applied to the non-maskable interrupt
(NMI) input pin, or the interrupt (INTR) input pin.
2. Special instruction: An execution of the Interrupt
instruction (INT). This is referred as software interrupt.
3. Condition produced by Instruction: An 8086 is interrupted
by some condition produced in the program by the
execution of an instruction.
Types of interrupts-
Two Types

Internal (or) Software Interrupts are


triggered by a software instruction and
operate similarly to a jump or branch
instruction.
External (or) Hardware Interrupts are
caused by an external hardware
module.
External: Maskable & Non Maskable
Hard ware
interrupts

HARDWARE INTERRUPTS are


generated by hardware devices
when something unusual happens;
this could be a key-press or a
mouse move or any other action. A
physical hardware signal comes in
this case.
Interrupts and pins-
INTR,NMI,INTA
Two pins that allow interrupt requests, INTR
and NMI
One pin that acknowledges, INTA
INTR is a maskable hardware interrupt. The
interrupt can
be enabled/disabled
NMI is a non-maskable interrupt. Interrupt is
processed in the same way as the INTR
interrupt. Interrupt type of the NMI is 2,i.e.
the address of the NMI processing routine is
INTR

INTR is a maskable interrupt


because the microprocessor
will be interrupted only if
interrupts are enabled using
set interrupt flag
instruction.
It is not compulsory to attend
N
MI

NMI It is a single non-maskable


interrupt pin (NMI) having higher
priority than the maskable
interrupt request pin (INTR)and
it is of type 2 interrupt.
Compulsory to attend
Interrupt
Priority
Interrupt Priority If two or more
interrupts occur at the same
time then the highest priority
interrupt will be serviced first,
and then the next highest
priority interrupt will be
serviced.
Software
interrupts
256 programs are available for
internal/software interrupts
Each program takes a 4 byte memory
address
So 256 X4 =1024 = 1k of memory
allotted to software interrupts
Soft ware
interrupts
Interrupt Vector Table The first 1Kbyte of
memory of 8086 (00000 to003FF) is set aside
as a table for storing the starting addresses of
Interrupt Service Procedures(ISP).
Since 4-bytes are required for storing starting
addresses of ISPs, the table can hold 256
Interrupt procedures.
The starting address of an ISP is often called the
Interrupt Vector or Interrupt Pointer
Soft ware /internal
interrupts
Software Interrupts-Type O through 255: The
8086 INT instruction can be used to trigger the
8086 to do any one of the 256 possible interrupt
types.
The instruction INT32, for example will cause
the 8086 to do a type 32 interrupt response. The
8086 will push the flag register on the stack,
reset TF and IF, and push the CS and IP values of
the next instruction on the stack. INTR
Interrupts-Types 0 through 255: The 8086 INTR
input allows some external signal
Software interrupt
examples
Divide-By-Zero Interrupt-Type 0:
Single Step Interrupt-Type 1:
Breakpoint Interrupt-Type 3:
Overflow Interrupt-Type4:
•Other
Othertype of interrupts
method are
of classification
•1. Vectored and Non vectored interrupts- The
interrupts which are having fixed address
location for ISR are called vectored interrupts.
•The interrupts which are not having fixed
address location for ISR are called non
vectored interrupts.
• 2. Maskable and Non maskable interrupts -
The interrupts which can be ignored are called
maskable interrupts. The interrupts which
cannot be ignored are called non maskable

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