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5.1 Unit5 Int-Handling

The document outlines the architecture of a processor, detailing various types of registers including memory and I/O registers, user-visible registers, and control/status registers. It explains the concept of interrupts, their types, and the general flow of interrupt processing, including the steps involved in handling interrupts. Additionally, it describes the role of interrupt handlers in managing device requests and restoring program execution.

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6 views11 pages

5.1 Unit5 Int-Handling

The document outlines the architecture of a processor, detailing various types of registers including memory and I/O registers, user-visible registers, and control/status registers. It explains the concept of interrupts, their types, and the general flow of interrupt processing, including the steps involved in handling interrupts. Additionally, it describes the role of interrupt handlers in managing device requests and restoring program execution.

Uploaded by

om61401
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Processor

• Two internal registers for memory I/O


– Memory address register (MAR)
• Specifies the address for the next read or write
– Memory buffer register (MBR)
• Contains data written into memory or receives data read from memory
• Two more for each I/O port
– I/O address register
– I/O buffer register
• User-visible registers
– Enable programmer to minimize main-memory references by optimizing register use
• Control and status registers
– Used by processor to control operation of the processor
– Used by privileged operating-system routines to control the execution of programs
User-visible registers

• May be referenced by assembly/machine language


• Available to all programs
– application programs and system programs
• Types of registers
– Data
– Address
• Index
• Segment pointer
• Stack pointer
• Address Registers
– Index
• Involves adding an index to a base value to get an address
– Segment pointer
• When memory is divided into segments, memory is referenced by a
segment and an offset
– Stack pointer
• Points to top of the system stack
Control and status registers

• Program Counter (PC)


– Contains the address of an instruction to be fetched
• Instruction Register (IR)
– Contains the instruction most recently fetched
• Program Status Word (PSW)
– Condition codes
– Interrupt enable / disable
– Supervisor / user mode
– Etc.
• Condition Codes or Flags
– Bits set by the processor hardware as a result of operations
– Examples
• Positive result
• Negative result
• Zero
• Overflow
Interrupt
• . . . a signal from a device to the processor that interrupts the normal sequence of
processor activity
• Processor checks for the signal at the end of each fetch/execute cycle
– If no interrupt, fetch the next instruction for the current program
– Otherwise . . .
• Suspend execution of the current program
• Send ACKnowledgement to allow the device to remove the signal
• Execute the interrupt handler routine
• Effect is like an unscheduled call to the interrupt handler
Simple interrupt processing
Classes of interrupts

• Program generated interrupts are often called faults or traps


Types of interrupts
 Synchronous/Asynchronous: Synchronous if it occurs at the same place, every time
the program is executed with the same data and memory allocation. Asynchronous
interrupts are those that occur unexpectedly.

 Internal/External : Internal interrupts arise from illegal or erroneous use of an


instruction or data , also called as traps. External interrupts arise from I/O devices,
timing device, circuit generated by power supply.

 Software/Hardware : Software interrupts is initiated by executing an instruction .


General flow

Process in execution
Returns

Main Process requires I/O service


Program

I/O
Interrupt

Interrupt
Service
Routine
When a program throws an interrupt a device searching routine is performed. The program is
reentered after the interrupt is handled.

Interrupt RegPC+1 Save the return


address of the
main program
PCinterrupt
addr
Interrupt Service Determine device; Execute the
Routine determine whether instructions in the
input or output; service routine
I/OA or AI/O
Interrupt return PCreg Restore the
program control
Interrupt handlers
 Interrupt handlers are the routines that are called when an interrupt is detected.

 Interrupt handlers are usually short sections of code that are designed to handle the
immediate needs of the device and return control to the operating system or user
program.

Steps in handling interrupts

 Disable further interrupts.


 Store current state of program.
 Execute appropriate interrupt handling routine.
 Restore state of program.
 Enable interrupts.
 Resume program execution.
Flowchart of basic interrupt mechanism
Fetch
Instruction

Increment PC
Decode and
Execute instr.

No
Int request line
Restore PC
active

Yes
Interrupt
Store PC service
Routine

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