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Lecture 1.2.2 (Assembly Language Instructions Instruction Cycle, Machine Language Program Execution)

The document provides an overview of assembly language instructions and the execution process within a CPU, detailing the instruction cycle which includes fetching, decoding, reading effective addresses, and executing instructions. It explains the roles of the instruction register, instruction pointer, and the stages involved in executing machine instructions. Additionally, it discusses machine cycles and bus cycles, highlighting the importance of these processes in computer organization and architecture.

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21 views

Lecture 1.2.2 (Assembly Language Instructions Instruction Cycle, Machine Language Program Execution)

The document provides an overview of assembly language instructions and the execution process within a CPU, detailing the instruction cycle which includes fetching, decoding, reading effective addresses, and executing instructions. It explains the roles of the instruction register, instruction pointer, and the stages involved in executing machine instructions. Additionally, it discusses machine cycles and bus cycles, highlighting the importance of these processes in computer organization and architecture.

Uploaded by

aashishmahajan300
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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University Institute of Engineering

Department of Computer Science & Engineering

COMPUTER ORGANIZATION & ARCHITECTURE


(23CST-204/23ITT-204)

ER. SHIKHA ATWAL


E11186

ASSISTANT PROFESSOR

BE-CSE
ASSEMBLY LANGUAGE INSTRUCTIONS

Program Execution in the CPU

It contains a special register — the instruction register — whose bit pattern


determines what the central processor unit can do. Once that action has been
completed, the bit pattern within the instruction register may be modified, and
also the central processor unit can perform the operation nominative by this next
bit pattern.
Since directions are simply bit patterns, they will be kept in memory. The
instruction pointer register continuously has the memory address of (points to)
the next instruction to be executed. So as for the management unit to execute
this instruction, it’s derived into the instruction register.
The case is as follows:
1.A sequence of instructions is stored in memory.
2.The memory address wherever the first instruction is found is copied to the
instruction pointer.
3.The CPU sends the address within the instruction pointer to memory on the
address
bus.
4.The CPU sends a “read” signal to the control bus.
5.Memory responds by sending a copy of the state of the bits at that memory
location on the data bus, that the CPU then copies into its instruction register.
6.The instruction pointer is automatically incremented to contain the address of the
next instruction in memory.
7.The CPU executes the instruction within the instruction register.
8.Go to step 3
Steps 3, 4, and 5 are called an
instruction fetch. Notice that steps 3 – 8
constitute a cycle, the instruction
execution cycle. It is shown graphically
below:
Instruction cycle

The time a microprocessor needs to fetch and execute one entire instruction is
known as an instruction cycle.

There are typically four stages of an instruction cycle that the CPU carries out-

i. Fetching the instruction: The next instruction is fetched from the memory
address that is currently stored in the program counter (PC) and stored in the
instruction register (IR). At the end of the fetch operation, the PC points to the
next instruction that will be read at the next cycle.
ii. Decode the instruction: During this cycle the encoded instruction present in
the IR (instruction register) is interpreted by the decoder.

iii. Read the effective address: In case of a memory instruction (direct or


indirect) the execution phase will be in the next clock pulse. If the instruction
has an indirect address, the effective address is read from main memory and
any required data is fetched from main memory to be processed and then
placed into data registers (Clock Pulse: T3). If the instruction is direct, nothing
is done at this clock pulse. If this is an I/O instruction or a Register instruction,
the operation is performed (executed) at clock Pulse.
iv. Execute the instruction: The control unit of the CPU passes the decoded
information as a sequence of control signals to the relevant function units of the
CPU to perform the actions required by the instruction such as reading values
from registers, passing them to the ALU to perform mathematical or logic
functions on them and writing the result back to a register.

If the ALU is involved, it sends a condition signal back to the CU. The result
generated by the operation is stored in the main memory or sent to an output
device. Based on the condition of any feedback from the ALU, Program
Counter may be updated to a different address from which the next instruction
will be fetched.
Instruction Cycle State Diagram

For an instruction cycle, various states can be null, while others can be visited
more than once. The below figure provides a large aspect of the instruction cycle
of a basic computer.
 Instruction Address Calculation − The address of the next instruction is
computed. A permanent number is inserted to the address of the earlier
instruction.
 Instruction Fetch − The instruction is read from its specific memory location
to the processor.
 Instruction Operation Decoding − The instruction is interpreted and the
type of operation to be implemented and the operand(s) to be used are decided.
 Operand Address Calculation − The address of the operand is evaluated if it
has a reference to an operand in memory or is applicable through the
Input/Output.
 Operand Fetch − The operand is read from the memory or the I/O.
 Data Operation − The actual operation that the instruction contains is executed.
 Store Operands − It can store the result acquired in the memory or transfer it to
the I/O.
Machine Instructions are commands or programs written in machine code of
a machine (computer) that it can recognize and execute.
●A machine instruction consists of several bytes in memory that tells the
processor to perform one machine operation.
●The processor looks at machine instructions in main memory one after
another, and performs one machine operation for each machine instruction.
●The collection of machine instructions in main memory is called a machine
language program.

Machine code or machine language is a set of instructions executed directly by a


computer’s central processing unit (CPU). Each instruction performs a very
specific task, such as a load, a jump, or an ALU operation on a unit of data in a
CPU register or memory. Every program directly executed by a CPU is made up
of a series of such instructions.
The general format of a machine instruction is

[Label:] Mnemonic [Operand, Operand] [;comments]

● Brackets indicate that a field is optional.


● Mnemonic is the symbol for instruction operation code.
● Label is an identifier that is assigned the address of the first byte of the
instruction in which it appears. It must be followed by “:”
● Inclusion of spaces is arbitrary, except that at least one space must be inserted.
No space would lead to an ambiguity.
● Comment field begins with a semicolon (;).

Example: Here: MOV R5, #25H ;load 25H into Register R5


What happens during Instruction Execution?
MACHINE CYCLE: The machine cycle is the number of cycles needed to do
either a fetch, read or write operation. The read or write may be more than a
single bus cycle if the transaction between the CPU and memory is longer than
the data width fetched or written.

BUS CYCLE: The bus cycle is the cycle or time required to make a
single read or write transaction between the CPU and an external device such
as external memory.

For example, on an 8085 machine, the data bus width is 8 bits. If the CPU needs
to fetch or write 16 bits of data, that will require two bus cycles and one machine
cycle as it will use a 16- bit register directly to fetch or write the data.
References

Reference Books:
 J.P. Hayes, “Computer Architecture and Organization”, Third Edition.
 Mano, M., “Computer System Architecture”, Third Edition, Prentice Hall.
 Stallings, W., “Computer Organization and Architecture”, Eighth Edition, Pearson
Education.

Text Books:
 Carpinelli J.D,” Computer systems organization &Architecture”, Fourth
Edition, Addison Wesley.
 Patterson and Hennessy, “Computer Architecture” , Fifth Edition Morgaon
Kauffman.
Reference Website

 https://www.slideshare.net/shweta-sharma99/instruction-cycle
 http://www.eie.polyu.edu.hk/~enyhchan/addrmode.pdf
 http://www.cs.uwm.edu/classes/cs458/Lecture/HTML/ch05s05.html

Video References

 https://www.youtube.com/watch?v=p9n91lXeJ8Y
 https://www.youtube.com/watch?v=3MfyrwPjYk4

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